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Bounds on Defect Level and
Fault Coverage in Linear Analog
Circuit Testing
Suraj Sindia (I.I.Sc, Bangalore)
Virendra Singh (I.I.Sc, Bangalore)
Vishwani D. Agrawal (Auburn University)
VDAT 2009
Linear Circuits – Quick Recap
Vout
1

Vin 1    R1  R 2  C2  R1C1  s  R1R 2C1C2s 2

Transfer function representation
 -1
s + a k s k

H(s) = K
k=0
 -1
s  + b k s k
λ<µ
k=0
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VDAT 2009
Circuit Parameters & Transfer Function
Coefficients

f1 and f2

f1
c1
R1

R2
C1

C2
c2
f2
Parameter Space
Maps the parameter
space & coefficient
space.
Linear functions of circuit
parameters
Can be potentially used
to track the parametric
drifts in circuit
parameters
Coefficient Space
Savir, ITC, 2002
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VDAT 2009
Background of TFC Method
p1
Coefficients as
functions of circuit
parameters
c5
c4
c2
c3
c1
p2
p3
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Closer Look at Coefficients
Hypercube distribution of ck
Legend
y = p2
Γk
p2n(1+ ρ)
Λk
Ξk
p2n
Ω
p2n(1- ρ)
(1-ρ*)p1n
p1n
(1-ρ)p1n
(1+ρ)p1n
(1+ρ*)p1n
x = p1
4
Our Work – “Bounding”
Hypercube distribution of ck

Defect Level:

Probability of a faulty chip
escaping as a fault-free or a
good chip


y = p2
Legend
Γk
p2n(1+ ρ)
Λk
Ξk
Probability of a coefficient
taking a value in the region
Λk
p2n
Fault Coverage:

Ω
Percentage of faults that a
given test method can
uncover from set of all
possible faults

p2n(1- ρ)
Probability of a coefficient
taking a value in the region
Γk
p1n
(1-ρ*)p1n
(1-ρ)p1n
(1+ρ*)p1n
x = p1
(1+ρ)p1n
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VDAT 2009
Our Work – “Bounding”

Assume an appropriate p.d.f over the region
of drift of p1,p2 Є [0,∞]




We choose Gaussian
Relevant for most of passive devices [R,L,C]
Evaluate the joint Gaussian distribution over
these regions
Validate the bounds against number of
components and coefficient of uncertainty(є)
for common circuits –

Eg.: RC Ladder network
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VDAT 2009
Equations – Two Parameter Case
 ( x  p1n )2 ( y  p2 n )2 
f p1, p 2 ( x, y) 
exp 


2
2
2
2
2

2



1
DLCk   f p1, p 2 ( x, y )dxdy
k
FCCk   f p1, p 2 ( x, y )dxdy
k
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VDAT 2009
Closed Form Expressions –
N parameters
DL  DLCk
  
 Q 
  
  
 Q 
  
FC  FCCk



Q







Q







N
       
 
Q

Q
  


   

 
 N
  pin
  Q 
 i 1  
    
   Q 
   






Q




N 1



N

 u 2 
1
exp 
Where, Q( x) 
 du
2
2 x


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VDAT 2009
Results – Plots of Expressions
DL v/s number of circuit
parameters
DL v/s є
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Simulated Plots for RC Ladder
Defect Level
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VDAT 2009
Simulated Plots for RC Ladder
Fault Coverage
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VDAT 2009
Simulation-Optimization Tradeoff
Tradeoff point
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Defect Level on Benchmarks
Circuit
Source
Component Count
Transistor
Opamp
Resistor
Defect Level(%)
Capacitor
Total(N)
Computed
Simulated
Operational
Amplifier #1
ITC ’97a
8
-
2
1
11
6.51
5.69
Con. Time State
Variable filter
ITC ’97b
-
3
7
2
12
5.89
5.23
Operational
Amplifier #2
ITC ’97c
10
-
-
1
11
6.51
5.69
Leapfrog Filter
ITC ’97d
-
6
13
4
23
1.38
1.33
Digital-to-Analog
Converter
ITC ’97e
16
1
17
1
35
0.21
0.2
Differential Amplifier
SFAa
4
-
5
-
9
7.72
6.43
-
1
3
-
4
7.78
3.75
Comparator
SFAb
Single Stage Amplifier
SFAc
1
-
5
-
6
8.73
6.17
Elliptical filter
SFAd
-
3
15
7
25
1.02
0.99
Low-Pass Filter
Lucent1
-
1
3
1
5
8.51
5.30
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VDAT 2009
Fault Coverage on Benchmarks
Circuit
Source
Component Count
Transistor
Opamp
Resistor
Fault Coverage(%)
Capacitor
Total(N)
Computed
Simulated
Operational
Amplifier #1
ITC ’97a
8
-
2
1
11
84.78
85.31
Con. Time State
Variable filter
ITC ’97b
-
3
7
2
12
87.17
87.66
Operational
Amplifier #2
ITC ’97c
10
-
-
1
11
Leapfrog Filter
ITC ’97d
-
6
13
4
23
98.05
98.19
Digital-to-Analog
Converter
ITC ’97e
16
1
17
1
35
99.75
99.78
Differential Amplifier
SFAa
4
-
5
-
9
78.75
79.18
-
1
3
-
4
Comparator
SFAb
Single Stage Amplifier
SFAc
1
-
5
-
6
Elliptical filter
SFAd
-
3
15
7
25
Low-Pass Filter
Lucent1
-
1
3
1
5
84.78
49.57
64.19
98.61
57.50
85.31
50.21
64.87
98.72
58.18
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VDAT 2009
Conclusion


Closed form expressions for bounds on
Defect Level and Fault Coverage in TFC
based test of analog circuits
Higher component count leads to



Smaller defect level
Better fault coverage
Strategy for opting between simulation and
non-linear optimization in TFC based test
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VDAT 2009
Thanks for Your Attention!