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Engineering 43
Chp 8.[7-8]
AC Analysis
Bruce Mayer, PE
Licensed Electrical & Mechanical Engineer
[email protected]
Engineering-43: Engineering Circuit Analysis
1
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
KCL & KVL for AC Analysis
 Simple-Circuit Analysis
• AC Version of Ohm’s Law → V = IZ
• Rules for Combining Z and/or Y
• KCL & KVL
• Current and/or Voltage Dividers
 More Complex Circuits
• Nodal Analysis
• Loop or Mesh Analysis
• SuperPosition
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Methods of AC Analysis cont.
 More Complex Circuits
• Thevenin’s Theorem
• Norton’s Theorem
• Numerical Techniques
– MATLAB
– SPICE
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Example
 For The Ckt At Right,
Find VS if
Vo  8V45
 Solution Plan: GND at
Bot, then Find in Order
• I3 → V1 → I2 → I1 → VS
 I3 First by Ohm
I3 
VO V 
 445 A
2
 Then V1 by Ohm
V1  (2  j 2)I3  8  45  445
 Then I2 by Ohm
I2 
V1
11.314V0

 5.657  90( A)
j 2
290
 Then I1 by KCL
I1  I 2  I 3  5.657  90  445
I1   j5.657  (2.828  j 2.828)( A)
I1  2.828  j 2.829( A)
V1  11.3140(V )
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Example cont.
Z eq
 Then VS by Ohm & KVL
VS  2I1  V1  2(2.828  j 2.829)  11.3140
VS  16.97  j5.658(V )
VS  17.888V  18.439
 Note That we have
I1 and VS
 Thus can find the
Circuit’s Equivalent
Impedance
VS
Z eq 
I1
Engineering-43: Engineering Circuit Analysis
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 Then Zeq
17.888V  18.439
Z eq 
2.828  j 2.829A
Z eq  4.00  j 2.00
Z eq  4.47226.56
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Nodal Analysis for AC Circuits
 For The Ckt at Right
Find IO
 Use Node Analysis
• Specifically a SuperNode
that Encompasses The
V-Src
V1
V2
V2
 20 

0
1  j1
1 1  j1
 And the SuperNode
Constraint
V2  V1  60
or
V1  V2  60
Engineering-43: Engineering Circuit Analysis
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 The Relation For IO
V2
IO 
( A)
1
 In SuperNode KCL
Sub for V1
V2  60
V
 20  V2  2  0
1  j1
1  j1
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Nodal Analysis cont.
 Solving for For V2
 1
1 
6
V2 
1

2


1

j
1
1

j
1
1  j1


 The Complex Arithmetic
V2
(1  j1)  (1  j1)(1  j1)  (1  j1) 2(1  j1)  6

(1  j1)(1  j1)
1  j1
4
V2
 8  j2
1 j
V2 
 Or
8  j 2 1  j   5  j 3
1
4
2
Engineering-43: Engineering Circuit Analysis
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 Recall
2
V2 V 
IO 
1
3
5
I O    j ( A)
2
2
I O  2.92 A  30.96
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Loop Analysis for AC Circuits
 Same Ckt, But Different
Approach to Find IO
 Note: IO = –I3
 Constraint: I1 = –2A0
 The Loop Eqns
LOOP 2 :
(1  j )( I1  I 2 )  60  (1  j )( I 2  I 3 )  0
LOOP 3 : (1  j )( I 2  I 3 )  1I 3  0
 Solution is I3 = –IO
 Recall I1 = –2A0
Engineering-43: Engineering Circuit Analysis
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 Simplify Loop2 & Loop3
L2 : 2 I 2  (1  j ) I 3  6  (1  j ) I1
2 I 2  (1  j ) I 3  6  (1  j )( 2)
L3 : (1  j ) I 2  (2  j ) I 3  0
 Two Eqns In Two
Unknowns
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Loop Analysis cont
 Isolating I3
(1  j)
2

 2(2  j ) I 3  (1  j )(8  2 j )
I2
 Then The Solution
I3 
10  6 j
4
 I0 
5 3
 j ( A)
2 2
 Could also use a
SuperMesh to Avoid
the Current Source
CONSTRAINT : I 2  I1  20
SUPERMESH : (1  j )I1  60  1(I 2  I 3 )  0
MESH 3 : 1(I 3  I 2 )  (1  j )I 3  0
Engineering-43: Engineering Circuit Analysis
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 The Next Step is to
Solve the 3 Eqns for
I2 and I3
 So Then Note
IO  I 2  I3
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Recall Source SuperPosition
I
=
I L2
1
L
V
1
L
 Circuit With Current
Source Set To Zero
• OPEN Ckt
 By Linearity
I L  I1L  I 2L
Engineering-43: Engineering Circuit Analysis
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+
VL2
 Circuit with Voltage
Source set to Zero
• SHORT Ckt
VL  VL1  VL2
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
AC Ckt Source Superposition
 Same Ckt, But Use
Source SuperPosition
to Find IO
 Deactivate V-Source
 The Reduced Ckt
 Combine The Parallel
(1  j )(1  j )
Impedances
Z '  (1  j ) || (1  j ) 
1
(1  j )  (1  j )
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
AC Source Superposition cont
 Find I-Src Contribution
to IO by I-Divider
Z '  1
I '0  20
 The V-Src Contribution
by V-Divider
1
 10( A)
11
 Now Deactivate the
I-Source (open it)
1 1  j 
Z "  1 || (1  j ) 
1  1  j 
Engineering-43: Engineering Circuit Analysis
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Z "  1 || (1  j )
"
Z
V1"  "
60(V )
Z 1 j
Z"
I  V 1  "
60( A)
Z 1 j
"
O
"
1
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
AC Source Superposition cont.2
 Sub for Z”
1 j
2 j
"
I0 
6 ( A)
1 j
1 j
2 j
1 j
I 
6
(1  j )  3  j
"
0
6 6
I   j ( A)
4 4
"
0
 Finally SuperPose the
Response Components
Engineering-43: Engineering Circuit Analysis
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 The Total Response
3 3
I 0  I  I  1   
2 2
'
0
"
0
5 3
 I 0   j ( A)
2 2
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt

j

Multiple Frequencies
 When Sources of Differing FREQUENCIES
excite a ckt then we MUST use Superposition
for every set of sources with NON-EQUAL
FREQUENCIES
 An Example
V2
V1
 We Can Denote the Sources as Phasors
V1  100V0
& V2  50V  10
 But canNOT COMBINE them due to
DIFFERENT frequencies
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Multiple Frequencies cont.1
 Must Use
SuperPosition for
EACH Different ω
V1
 V1 first (ω = 10 r/s)
Z L ,10  j 101
 V2 next (ω = 20 r/s)
Z L , 20  j 201
 The Frequency-1
Domain
Phasor-Diagram
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Multiple Frequencies cont.2
 The Frequency-2
Domain
Phasor-Diagram
V2
 Recover the Time
Domain Currents

 Finally Superpose


it   i' t   i" t   7.07 A cos 10t  45  2.24 A cos 20t  73.43
– Note the MINUS sign from V-src Polarity
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt

Source Transformation
 Source transformation is a good tool to reduce
complexity in a circuit
• WHEN IT CAN BE APPLIED
 “ideal sources” are not good models for
real behavior of sources
• A real battery does not produce infinite current
when short-circuited
 Resistance → Impedance Analogy
ZV
+
-
RV
VS
a
ZI
a
RI
b
IS
b
THE MODELS ARE EQUIVALENT S WHEN
ZV  Z I  Z
RV  RI  R
VS  RI S
VS  ZI S
Improved model
Improved model
for voltage source for current source
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Source Transformation
 Same Ckt, But Use
Source Transformation
to Find IO
 Start With I-Src
 Then the Reduced Circuit
V ' 8  2 j
 Next Combine the Voltage
Sources And Xform
Engineering-43: Engineering Circuit Analysis
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VS'
8 2 j
IS 

Z Series 1  j
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Source Transformation cont
 The Reduced Ckt
 Now Combine the
Series-Parallel
Impedances
IS 
8 2 j
1 j
Z p  (1  j ) || (1  j )  1
 The Reduced Ckt
Zp
 IO by I-Divider
1 4  j 4  j 1  j 
IO  I S  

2 1  j 1  j 1  j 
 IO 
5  j3
2
Engineering-43: Engineering Circuit Analysis
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
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
5  j3
2
Thevenin’s Equivalence Theorem
LINEAR CIRCUIT
May contain
independent and
dependent sources
with their controlling
variables
PART A
RTH


vTH

i
a
vO
b
_

i
LINEAR CIRCUIT
PART A
b
 Resistance to
Impedance
Analogy
vO  VO
i I
a
vO
_
LINEAR CIRCUIT
May contain
independent and
dependent sources
with their controlling
variables
PART B
PART B
VTH  VTH
RTH  ZTH
Thevenin Equivalent Circuit
for PART A
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
AC Thevenin Analysis
 Same Circuit,
Find IO by Thevenin
 Take as “Part B” Load
the 1Ω Resistor Thru
Which IO Flows
 The Thevenin Ckt
 Now Use Src-Xform
Vx  2 A0  (1  j )
Vx  (2  j 2)V
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
AC Thevenin Analysis cont.
 The Xformed
Circuit
 Another
Source
Xform
 Now the Combined 8+j2
Source and all The
Impedance are
IN SERIES
8 2j
 Find ZTH by
Deactivating the 8+j2
V-Source
• Thus VOC Determined by
V-Divider
VOC
1 j
10  j 6

(8  2 j ) 
(1  j )  (1  j )
2
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
AC Thevenin Analysis cont.2
 Then ZTH
ZTH  (1  j ) || (1  j )  1
 So The Thevenin
Equivalent Circuit
 IO is Now Simple
VOC
VTH
IO 

Z TH  1 1  1
53j
IO 
( A)
2
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Norton’s Equivalence Theorem
LINEAR CIRCUIT
May contain
independent and
dependent sources
with their controlling
variables
PART A

RN
a
vO
b
_

iN
i
i
LINEAR CIRCUIT
PART A
b
 Resistance to
Impedance
Analogy
vO  VO
i I
a
vO
_
LINEAR CIRCUIT
May contain
independent and
dependent sources
with their controlling
variables
PART B
PART B
iN  I N
RN  Z N
Norton Equivalent Circuit
for PART A
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
AC Norton Analysis
 Same Circuit,
Find IO by Norton
 Take as the “Part B”
Load the 1Ω Resistor
Thru Which IO Flows
 Shorting the Load
Yields Isc= IN
 Possible techniques to
Find ISC:
• Loops or Nodes
• Source Transformation
• Superposition
 Choose Nodes
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
AC Norton Analysis cont
 Short-Ckt Node On The
Norton Circuit
I SC
60 8  2 j
 20 

( A)
1 j
1 j
 As Before Deactivate
Srcs to Find ZN=ZTH
 Use ISC=IN, and
ZN to Find IO
• See Next Slide
ZTH  (1  j ) || (1  j )  1
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
AC Norton Analysis cont.2
 The Norton
Equivalent Circuit
with Load
Reattached
 Find IO By I-Divider
I O  I SC
I SC 4  j
1


ZN 1 11 1 j
4  j 1 j
IO 
1 j 1 j
IO


4  j    4 j  j 2  5  j 3


12  j 2
Engineering-43: Engineering Circuit Analysis
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 Same as all the Others
2
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Example
V1
 Use Nodal Analysis
to Find VO
 The KCL at Node-1
V1  1230 V1 V1 V1  VO
 

0
2
1 j2
j
 Now KCL At VO
VO  V1 VO

0
j
1
 V1  1  j VO
 Multiply Node-1 KCL
by 2j to Obtain
Engineering-43: Engineering Circuit Analysis
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j (V1  1230)  j 2V1  V1  2(V1  VO )  0
 Subbing for V1 Yields
2VO  (1  2  2 j  j )(1  j )VO  12 j30
 Factoring for VO Yields
(2  (1  3 j )(1  j )) VO  1901230
 Isolating VO
12120
12120
VO 

44j
5.65745
VO  2.121V75
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Example Alternative
 This Time Use Thevenin
to Find VO
 Take Cap & Res in
Series as the Load
 Deactivate V-Src
to Find ZTH
4 j 3
2 3  j 2
j 42  j 6 
Z TH  2 || 1 || j 2 
Z TH
Z TH
j4

 2
2  j6
2  62
 0.6  j 0.2
Engineering-43: Engineering Circuit Analysis
29
 Find VOC by V-Divider
1 || j 2
1230
2  (1 || j 2)
j2

1230
2(1  2 j )  2 j
VOC 
VOC
24120 12120

26j
1 3 j
 3.795V48.435
VOC 
VOC
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
Example Alternative cont.
 Now Apply the
Thevenin Equivalent
Circuit to the Load
 Calculate VO By
V-Divider
VO 
ZTH
 j1
ZTH
0 .6  j 0 . 2
VOC
+
-

1

1
VOC
1 j
1
 Same as Before
VOC
0.6  j 0.2  1  j
1
VO 
VOC
1.6  j 0.8
VO  0.55926.565  3.795V48.435
VO 

VO  2.121V75.00
Engineering-43: Engineering Circuit Analysis
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V0
Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt
WhiteBoard Work
 Let’s Work This Nice
Problem to Find VO
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
[email protected] • ENGR-44_Lec-08-3_AC-KVL-KCL.ppt