Download Winning by Power Jeffrey Hwang

Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
10 min to design your power supply (V)
Design a
Champion
AC Adapter
Jeffrey H. Hwang
1
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
10 min to design your power supply (V)
Two Sources:
Champion
and
FairChild
2
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
10 min to design your power supply (V)
Cost Reduction by $0.30 to $0.20
With
CM6805, CM6806, CM6903
vs.
CRM +PWM
3
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
10 min to design your power supply (V)
If the
Microprocessor
Is the brain of the system,
then the
Power Supply
is the heart.
4
10 min to design your power supply (V)
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
High Density AC Adapter
The Challenge:
High Efficiency at Low Line (90VAC)
5
10 min to design your power supply (V)
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
Typical Power vs. Efficiency
6
10 min to design your power supply (V)
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
High Density AC Adapter
7
10 min to design your power supply (V)
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
How to increase the Efficiency?
(Rule of Thumb)
•
•
Full Load due to Conduction Loss = I x I x R:
1.
Spend more money to reduce R such as reduce Rdson of Mosfet
2.
Reduce I by increasing VIN
Light Load due to Switching Loss = fsw x C x V x V:
1.
Reduce C
2.
Reduce V = ZVS
3.
Reduce fsw => Green Mode
8
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Failure Rate Vs. Temperature
9
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
It is desired to have a uniform Surface Temperature
for Convection and Radiation
By Proper Layout/Package/Enclosure
10
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Maximum Power Dissipation vs. Shape
By Proper Layout/Package/Enclosure
11
Jeffrey Hwang
Full Load Condition Analysis
10 min to design your power supply (V)
The Maximum Output Power vs. Shape
h , Po
h
, Po
By Proper Layout/Package/Enclosure
12
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Use the better Core Shape
Due to the smooth surface, it has the better heat convection
By Proper Layout/Package/Enclosure
13
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
A Good AC Adapter Layout
Keep the temperature uniform through out the board
By Proper Layout/Package/Enclosure
14
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
36W Fly Back AC Adapter Experimental Result
Design a Flyback Converter
15
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
36W Fly Back AC Adapter Experimental Result
η~85.6% @ 90VAC with full load
Design a Flyback Converter
16
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
How To Improve Flyback Transformer Power Loss?
1. Reduce the n, Turn Ratio to reduce the Secondary Peak
Current
•
When n ,Ip ,Is , D , Lm , Ls , then Maximum
Secondary Voltage .
•
When n , Ip , Is , D is , Lm , Ls ,then Maximum
Secondary Voltage .
2. Increase the Flyback input voltage
3. Use the better RM core instead of EPC core
Design Flyback Converter
17
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
How To Improve Flyback Transformer Power Loss?
Design Flyback Converter
18
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
How To Reduce Flyback Diode Rectifier Power Loss?
•
Increase the Flyback input Voltage
•
Use SR, Synchronous Rectification + DCM
•
Reduce the secondary current by reducing n, the turn
ratio of Transformer (This will increase Mosfet Loss.)
Design a Flyback Converter
19
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
How To Reduce Flyback Diode Rectifier Power Loss?
Use a Synchronous Rectifier
Design a Flyback Converter
20
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
How To Reduce Flyback Diode Rectifier Power Loss?
CCM + Synchronous Rectification has the lower efficiency
due to Trr, body diode recovery issue
21
Design a Flyback Converter
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
How To Reduce Flyback Diode Rectifier Power Loss?
CCM + Synchronous Rectification has Trr, body diode recovery issue
Design a Flyback Converter
22
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
How To Reduce Flyback Diode Rectifier Power Loss?
CCM + Synchronous Rectification has Trr, body diode recovery issue
Design a Flyback Converter
23
Jeffrey Hwang
Full Load Condition Analysis
10 min to design your power supply (V)
How To Reduce Flyback Diode Rectifier Power Loss?
DCM Efficiency vs. Input voltage
86%,
Efficiency @ 200V, Vin
CCM + Synchronous Rectification has Trr, body diode recovery issue
Design a Flyback Converter
24
Jeffrey Hwang
Full Load Condition Analysis
10 min to design your power supply (V)
How To Reduce Flyback Diode Rectifier Power Loss?
Solution:
•Use DCM + SR, Synchronous Rectifier + Vin >200V + Reduce n
CCM + Synchronous Rectification has Trr, body diode recovery issue
Design a Flyback Converter
25
Jeffrey Hwang
Full Load Condition Analysis
10 min to design your power supply (V)
How To Reduce Flyback Diode Rectifier Power Loss?
Solution:
Use DCM + SR, Synchronous Rectifier + Vin > 200V + Reduce n
Load=3A / Fans
Efficiency
90.00%
Only Schottky
85.00%
Only SR
80.00%
SR+Schottky
75.00%
60 80 100 120 140 160 180 200 220 240 260 280
Input Voltage
CCM + Synchronous Rectification has Trr, body diode recovery issue
Design a Flyback Converter
26
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
How To Improve Flyback MOSFET Power Loss?
•
•
•
•
Increase the Flyback input voltage so conduction loss
can be reduced due to D drops.
Using DCM to prevent the Trr, diode reverse current
issue
Use a lower Rdson Mosfet
Use ZVS
Design Flyback Converter
27
Jeffrey Hwang
Full Load Condition Analysis
10 min to design your power supply (V)
Conventional Flyback Converter:
LC tank’s C is due to S1
and
It is very small,
so Ring frequency
(resonant frequency) is high.
Design Flyback Converter
28
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Conventional Flyback Converter:
resonant f is high
so it is difficult to control
(manufacture control) it.
Ip
Vds,
S1
The Energy Stored in leakage inductor is wasted in the ringing.
Design Flyback Converter
29
Jeffrey Hwang
Full Load Condition Analysis
10 min to design your power supply (V)
ZVS Flyback Converter: Active Clamp
LC tank’s C is due to Cclamp~1uF
and
It is relative big,
so Ring frequency
(resonant frequency) is lower.
Design Flyback Converter
30
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
ZVS Flyback Converter: Active Clamp
The energy is stored in the core;
release to the input
Design Flyback Converter
No Ring
and
ZVS
31
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
ZVS Flyback Converter: Active Clamp
No Ring
and
ZVS
Design Flyback Converter
32
Jeffrey Hwang
Full Load Condition Analysis
10 min to design your power supply (V)
ZVS Flyback Converter: Active Clamp
4.5% Improvement
Design Flyback Converter
33
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
ZVS Flyback Converter: Active Clamp
4.5% Improvement due to:
•Energy in leakage L and Snubber is saved (Clamped)
•Energy in Vds-parasitic capacitor is saved (ZVS)
However, it is expensive:
• It needs a high side driver, an extra high side Mosfet
and a simple control circuit
• Can we do it without additional cost?
Design Flyback Converter
34
Jeffrey Hwang
Full Load Condition Analysis
10 min to design your power supply (V)
ZVS Flyback:
Secondary Synchronous Rectifier
with
CM6201 (smart driver)
LC tank’s C becomes to
Co/(n x n)~25uF to 50uF
and
It is big,
so Ring frequency
(resonant frequency) is very
low.
Design Flyback Converter
35
Jeffrey Hwang
Full Load Condition Analysis
10 min to design your power supply (V)
ZVS Flyback:
Secondary Synchronous Rectifier
with
CM6201 (smart driver)
Benefits:
• It does not need high side driver and high side mosfet
• Synchronous Rectification at DCM
Fly back full load Efficiency is increased
from
~86% to~90% at Flyback input=200V
Design Flyback Converter
36
Jeffrey Hwang
Full Load Condition Analysis
10 min to design your power supply (V)
Summary:
designing Flyback Converter @ full load & Vin=200V
Without additional cost: Efficiency~87.5% @Full load
•Vin >= 200V (with PFC-PWM combo CM6805/06/CM6903)…. Δη =3%
• n, turn ratio = 5 or 6….Reduce Is peak current
• Full load at DCM but approach to CCM….remove Trr
• ZVS by controlling LC variation….Δη=1.5%
With additional cost: Efficiency~93% @Full load
• Secondary Synchronous Rectifier +ZVS: (CM6201)
# Total additional Δ$~ $0.3 at high volume…. Δη=2%
• RM core
#Δ$ ~$0.2 at high volume….. Δη=1.5%
• ZVS Active Clamp at primary side….Δ$ ~$0.8 with Δη=2%
Without the proper design, efficiency could be below 80%.
Design Flyback Converter
37
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Choose Follower Boost Inductor
CM6805 family vs. CRM, 6561
•
•
•
•
L ↑, Efficiency ↑
For CRM, 6561, it cannot increase boost inductance.
1. L↑, frequency needs to go lower and it can go below 20Khz
2. Ton=L / Rload; for a given load, Ton is a constant
3. L ~ 471uH cannot go higher for the Po = 100W
4. Ipeak = Iin Peak x 2 (I x I x R is big; efficiency is poor!)
5. At high line and light load, frequency can go above 400Khz (EMI
issue is severe.)
For CM6805/CM6806/CM6903 fixed switching frequency=67.5Khz,
1. Lcm6805 family ~ Lcrm (67.5khz) x 5 (Optimal Inductance Value)
2. Lcrm ~ 209uH @ 90VAC
3. Loptimal = 1050 uH @ 100W to L= 698 uH @150W
4. L ↑, Efficiency ↑
5. Both the cost of Boost Mos and Boost Rectifier can be reduced
Efficiency (CCM) – Efficiency (CRM) > 3% (total system)
Design a Follower Boost PFC
38
Jeffrey Hwang
Full Load Condition Analysis
10 min to design your power supply (V)
Boost Power Dissipation Breakdown
η=91.37%, Vin=90VAC, Po=1KW
2%
1%
MOSFET
MOSFET
MOSFET
Boost 400V Cap
Design a Follower Boost PFC
39
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
η=91.37%, Vin=90VAC, Po=1KW
Design a Follower Boost PFC
40
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Power Dissipation in Boost Diode
Design a Follower Boost PFC
41
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Power Dissipation in Boost Mosfet
Dominated One
Design a Follower Boost PFC
42
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
4.5% Improvement
Design a Follower Boost PFC
43
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
PFC Boost with 380V only
Design a Follower Boost PFC
44
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Continuous Boost Follower
4.5% Improvement….cost~$0.03
Added Circuit
VlineDC needs to be closed to Dc and > = 5V.
Design a Follower Boost PFC
45
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Two Level Boost Follower
(Q1 on, 200V @ low line and Q1 off 380V @ high line)
4.0% Improvement….cost~$0.02
Added Circuit
VlineDC @ high line will turn off Q1 and
@ low line will turn on Q1.
Design a Follower Boost PFC
46
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Two Level Boost Follower
or
Continuous Boost Follower
4.0% to 4.5%
Efficiency Improvement….cost~$0.02 to $0.03
Design a Follower Boost PFC
47
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
PFC Boost Rectifier Trr issue
Design a Follower Boost PFC
48
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Use SiC to solve PFC Boost Rectifier Trr issue
Δη~1%
Δ$~$1.0
Design a Follower Boost PFC
49
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
SiC will help if the frequency is high.
Design a Follower Boost PFC
50
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Use Soft Switching to solve Trr issue
Design a Follower Boost PFC
51
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Use Soft Switching to solve Trr issue
Δη=2%
Δ$~$1.3
Design a Follower Boost PFC
52
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Bridgeless PFC
Design a Follower Boost PFC
53
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Bridgeless PFC
Δη=1%......Δ$~$0.5
Design a Follower Boost PFC
54
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Efficiency Improved due to LETE
Design a Follower Boost PFC
55
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
Efficiency Improved due to LETE
Design a Follower Boost PFC
56
10 min to design your power supply (V)
Jeffrey Hwang
Full Load Condition Analysis
CM68XX
CM68XX
Δ$ = -0.1 at no cost…Δη=1% with LETE
Design a Follower Boost PFC
57
Jeffrey Hwang
Full Load Condition Analysis
10 min to design your power supply (V)
Summary:
design a Boost PFC @ full load and Vin=90Vac
Without Cost: Efficiency~95.5% @full load
•2 level Boost Follower(200V/380V)….Δη~4%
•CM6805/CM6806/CM6903…. Δη~1%
With Cost: Efficiency~97% @full load
•SiC…. Δ$~1.0 and Δη~1%
•Soft Switching…. Δ$~1.0 and Δη~1%
•Bridgeless PFC…. Δ$~1.0 and Δη~1%
Design a Follower Boost PFC
58
Jeffrey Hwang
Full Load Condition Analysis
10 min to design your power supply (V)
Summary:
Design a Champion AC Adapter @ Full Load and Vin=90Vac
•Without Additional Cost (CM6805/CM6806/CM6903):
Efficiency~84.4% @full load & Vin = 90VAC
η pfc x η flyback = 96.5% x 87.5%= 84.4%
•With Δ$~$0.3 (CM6201):
Efficiency~86.85% @full load & Vin = 90VAC
η pfc x η flyback = 96.5% x 90%= 86.85%
•With Δ$~$3.3 :
Efficiency~90.7% @full load & Vin = 90VAC
η pfc x η flyback = 97.5% x 93%= 90.7%
Design a Follower Boost PFC
59
10 min to design your power supply (V)
Jeffrey Hwang
Build-in-Green-Mode
CM6805/CM6806/CM6903
Green Mode
The Best Way
to Save Energy
is to “Turn Off”
Your Appliance
Light Load Efficiency ↑, Goes up, as fpwm↓, Goes down
60
Jeffrey Hwang
Build-in-Green-Mode
CM6805/CM6806/CM6903
10 min to design your power supply (V)
Green Mode
User Defined GMth, Green-Mode Threshold
Light Load Efficiency ↑, Goes up, as fpwm↓, Goes down
61
10 min to design your power supply (V)
Jeffrey Hwang
Build-in-Green-Mode
CM6805/CM6806/CM6903
CM6805/CM6806/CM6903 Build-In Green
Mode Functions
•Reduce the switching frequency when the load is light
•Turn off PFC @ GMth
•Bleed Resistor can be 2 Mohm or higher
without influence the turn-on time
•Reduce operating current
Light Load Efficiency ↑, Goes up, as fpwm↓, Goes down
62
10 min to design your power supply (V)
Jeffrey Hwang
Build-in-Green-Mode
CM6805/CM6806/CM6903
Green Mode
Light Load Efficiency ↑, Goes up, as fpwm↓, Goes down
63
Jeffrey Hwang
Build-in-Green-Mode
CM6805/CM6806/CM6903
10 min to design your power supply (V)
Pulse Skipping from the controller
The Timing Diagram of fRtCt = 2 x fPWM = 4 x fPFC in CM6805, CM6806 and CM6903
RTCT
280K Hz
fRtCt
TIME
CLK
280K Hz
TIME
fpwm
CM6806
PWMCLK=
Maximum
PWM Duty Cycle
Exactly 50%
140K Hz
No Jitter
TIME
70K Hz
fpwm
CM6805
TIME
PFCCLK
70K Hz
fPFC
PFC Modulation Ramp
TIME
Light Load Efficiency ↑, Goes up, as fpwm↓, Goes down
64
Jeffrey Hwang
Build-in-Green-Mode
CM6805/CM6806/CM6903
10 min to design your power supply (V)
PWM Green Mode Pulse Skipping Timing Diagram
RTCT
Pin 7
280K Hz
CLK
280K Hz
PWMCLK=
Maximum
PWM Duty Cycle
PWM
Comparator
Output
PWM Duty
Cycle
Exactly 50%
TIME
70K Hz/ 140K Hz
TIME
70K Hz/ 140K Hz
TIME
70K Hz/ 140K Hz
TIME
No Jitter
TIME
Light Load Efficiency ↑, Goes up, as fpwm↓, Goes down
65
10 min to design your power supply (V)
Jeffrey Hwang
Build-in-Green-Mode
CM6805/CM6806/CM6903
Turn Off PFC!
When Load is below
Green Mode Threshold, GMth
Light Load Efficiency ↑, Goes up, as V↓& fpwm↓, Goes down66
10 min to design your power supply (V)
Po=100W Design for
Jeffrey Hwang
Build-in-Green-Mode
CM6805/CM6806/CM6903
V+I pin and PWMtrifault
Light Load Efficiency ↑, Goes up, as V↓& fpwm↓, Goes down67
Jeffrey Hwang
Build-in-Green-Mode
CM6805/CM6806/CM6903
10 min to design your power supply (V)
Spread Sheet for the PWM Design for a FlyBack
CM6805/CM6806 PWM SECTION for FlyBack Design
User Inputs All Resistors, inductor and VCC
Units
User Inputs the Optical Couple Current and VCC
Units
If the cell is filled with yellow color, it is a user input cell.
Flyback Input Voltage (minimum)
Flyback Output Voltage
Lm p (Primary Side Flyback Inductance)
Ls (Secondary Side Flyback Inductance)
Turn Ratio, n = Np/Ns
Switching frequency, fsw
Switching Period
Duty Cycle, D (DCM but use CCM formula)
1-D
Maximum Output Power
PWM system only efficiency
Maximum input Power
Primary Peak Current @ Full load & Steady State
Primary Peak Current with D=Dmax=50% @200V
Secondary Peak Current @200V
Rpwmsense
200
19
3.36E-04
9.33E-06
6.00
6.75E+04
1.48E-05
36.31%
63.69%
100
86%
116
3.20E+00
4.41E+00
2.65E+01
3.90E-01
V
V
H
H
200
19
3.36E-04
9.33E-06
6.00
6.75E+04
1.48E-05
36.31%
63.69%
100
86%
116
3.20E+00
4.41E+00
2.65E+01
3.90E-01
V
V
H
H
RV+I
Qphoto Couple Current @ 100% load
Voltage Drop cross RPWMRSENSE @ 100% load
Voltage Drop cross RV+I @ 100% load
Qphoto Couple Current @ 50% load
Voltage Drop cross RPWMRSENSE @ 50% load
Voltage Drop cross RV+I @ 50% load
Qphoto Couple Current @ 20% load
Voltage Drop cross RPWMRSENSE @ 20% load
Voltage Drop cross RV+I @ 20% load
RPWMTRIFAULT1
RPWMTRIFAULT2 + RNTC1
VCC=15V
PWMTRIFAULT Voltage @ 20% load VCC="B12"
PWMTRIFAULT Voltage @ 50% load VCC="B12"
Short Threshold ~
Green Mode Threshold ~
VCC=13V
PWMTRIFAULT Voltage @ 20% load VCC="B18"
PWMTRIFAULT Voltage @ 50% load VCC="B18"
Short Threshold ~
Green Mode Threshold ~
VCC=10V
PWMTRIFAULT Voltage @ 20% load VCC="B22"
PWMTRIFAULT Voltage @ 50% load VCC="B22"
Short Threshold ~
Green Mode Threshold ~
CPWMTRIFAULT
CV+I
Design OK or Not
500
5.00E-04
1.25E+00
2.50E-01
1.75E-03
6.25E-01
8.75E-01
2.50E-03
2.50E-01
1.25E+00
2.60E+03
4.20E+04
15
7.76E+00
9.71E+00
14.3
6.8
13
5.76E+00
7.71E+00
12.3
5.8
10
2.76E+00
4.71E+00
9.3
4.3
2.24E-07
1.50E-10
TRUE
Hz
S
%
%
W
%
W
A
A
A
OHM
OHM
A
V
V
A
V
V
A
V
V
OHM
OHM
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
F
F
500
5.00E-04
1.25E+00
2.50E-01
1.75E-03
6.25E-01
8.75E-01
2.50E-03
2.50E-01
1.25E+00
2.68E+03
4.20E+04
15
6.80E+00
9.57E+00
14.3
6.8
13
5.56E+00
7.57E+00
12.3
5.8
10
2.56E+00
4.57E+00
9.3
4.3
2.24E-07
1.50E-10
TRUE
Hz
S
%
%
W
%
W
A
A
A
OHM
OHM
A
V
V
A
V
V
A
V
V
OHM
OHM
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
F
F
Light Load Efficiency ↑, Goes up, as V↓& fpwm↓, Goes down68
10 min to design your power supply (V)
Jeffrey Hwang
Build-in-Green-Mode
CM6805/CM6806/CM6903
Increase Start-Up Resistor above 2M ohm
without
Increasing Turn-On Time
Light Load Efficiency ↑, Goes up, as Rac ↑,V↓& fpwm↓
69
10 min to design your power supply (V)
Jeffrey Hwang
Build-in-Green-Mode
CM6805/CM6806/CM6903
Light Load Efficiency ↑, Goes up, as Rac ↑,V↓& fpwm↓
70
10 min to design your power supply (V)
Jeffrey Hwang
Build-in-Green-Mode
CM6805/CM6806/CM6903
RAC functions:
•
Serve as a Start-Up Resistor
•
Feed-forward input Sine wave for PFC
1. Leading-edge-modulation-PFC-current-loop
slope compensation
2. Power Limit
Light Load Efficiency ↑, Goes up, as Rac ↑,V↓& fpwm↓
71
10 min to design your power supply (V)
Jeffrey Hwang
Build-in-Green-Mode
CM6805/CM6806/CM6903
Improve Efficiency @ Light Load
CM6805/CM6806:
•Reduce PWM switching frequency by pulse skipping
•Turn Off PFC @ Green-Mode Threshold, GMth
•Increase Start-Up resistor, RAC > 2M ohm
@ No Load, Pin<0.3W
Light Load Efficiency ↑, Goes up, as Rac ↑,V↓& fpwm↓
72
10 min to design your power supply (V)
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
CM6805, CM6806 and CM6903
PFC - FlyBack
AC Adapter Controller
73
10 min to design your power supply (V)
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
CM6805, CM6806 and CM6903
PFC Start Up then PWM Start Up
74
10 min to design your power supply (V)
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
CM6805, CM6806 and CM6903
PFC Soft Start with PWM Soft Start
Soft Start for both PFC and Flyback
75
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
10 min to design your power supply (V)
CM6805, CM6806 and CM6903
Speed up the PFC Voltage Loop
by 3X
Fast PFC Voltage Loop
76
10 min to design your power supply (V)
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
CM6805, CM6806 and CM6903
Error Amplifier
Transconductance Amp, GM
vs.
Operational Amp, OP
Fast PFC Voltage Loop
77
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
10 min to design your power supply (V)
CM6805, CM6806 and CM6903
Transconductance Amp, GM
vs.
Operational Amp, OP
Input Impedance Zin?
Zin ~ High
Input Impedance Zin ?
Zin ~ High
Output Impedance, Zout ?
Zout ~ High
Transconductance Amp, GM
Operational Amp, OP
Output Impedance, Zout ?
Zout ~ Low
Fast PFC Voltage Loop
78
10 min to design your power supply (V)
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
CM6805, CM6806 and CM6903
2 Main Purposes of the Error Amp
1. Force V+ = V- and it means Vfb = 2.5V
2. Compensation: It needs the Rc and Cc
Fast PFC Voltage Loop
79
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
10 min to design your power supply (V)
OP Integrator
This local feedback is bad!
CM6805, CM6806 and CM6903
VFB
The Miller Effect slows down the Vfb node.
Also, PFC Voltage Loop is very slow.
The consequence: Vfb becomes very slow.
Fast PFC Voltage Loop
80
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
10 min to design your power supply (V)
CM6805, CM6806 and CM6903
For GM,
there is no local feedback.
There is only one outer loop
and
there is no inner loop.
Vfb is a much faster node.
GM Integrator
Fast PFC Voltage Loop
81
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
10 min to design your power supply (V)
CM6805, CM6806 and CM6903
GM V 
ΔI VEAO
ΔVFB
GMV (mho)
60uA Iveao (uA)
69.3u mho
12u/div
12u/div
0uA
-208.6nA
VFB=2.51V
0
0V
2.5V
Fast PFC Voltage Loop
-60uA
3.0V VFB
82
10 min to design your power supply (V)
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
CM6805, CM6806 and CM6903
Easy to meet UL1950
83
10 min to design your power supply (V)
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
CM6805, CM6806 and CM6903
PFC Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Leading Edge Modulation PFC
Synchronize with Trailing Edge Modulation PWM
Smaller 400V Bulk Capacitor with 1% better efficiency and 30% ripple reduction
Simplest PFC control, Input Current Shaping Technique, ICST (Open Loop Current Mode)
It works for both CCM or DCM
Fixed Switching Frequency, fpfc = 67.5Khz for easy input EMI filter design
Automatic Slope Compensation with IAC
Rac at IAC pin serves as a Start-Up Resistor
3X PFC Voltage Loop
PFC has a Tri-fault protections for UL1950
PFC Soft Start
PFC OVP + VCC OVP
PFC Current Limit
Universal Input
AC Brown Out
Automatic Turn Off @ Green Mode
Easy to configure into Boost Follower
84
10 min to design your power supply (V)
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
CM6805, CM6806 and CM6903
PWM Features
•
•
•
•
•
•
•
•
•
•
•
Design for FlyBack Converter
Constant Maximum Power
Current Mode with inherent slope compensation
Constant Switching Frequency, fpwm = 67.5Khz (CM6805 and
CM6903), fpwm = 135Khz (CM6806)
Exact 50% maximum duty cycle
PWM has a PWMTri-fault protections for short and Green Mode
PWMTrifault can be programmed to turn off PFC @ Green Mode
PWMTrifault can be programmed to detect the short or can be
programmed to do thermal protection
PWM has 10 mS digital soft start
CM6805/CM6806 in 10 pin SOIC packages
CM6903 in 9 pin SIP package
85
10 min to design your power supply (V)
Jeffrey Hwang
CM6805/CM6806/CM6903/CM6201
CM6805, CM6806 and CM6903
More Features
· Input Power, Pin<0.3 W @ No Load
· 23V BiCMOS (it can drive IGBT)
· ISTART ~ 100µA
· IOPERATING ~ 2mA without load
· Industry First CM6805/CM6806 PFC-PWM Combo in 10 pin
SOIC packages
· Industry First PFC-PWM Combo CM6903 in 9 pin SIP package
86
10 min to design your power supply (V)
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
CM6805, CM6806 and CM6903
CM6903
87
10 min to design your power supply (V)
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
CM6805, CM6806 and CM6903
CM6903
88
10 min to design your power supply (V)
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
CM6805, CM6806 and CM6903
CM6903
89
10 min to design your power supply (V)
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
CM6805, CM6806 and CM6903
How does it work?
90
10 min to design your power supply (V)
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
10pin SOIC PFC-PWM combo: CM6805/CM6806
91
10 min to design your power supply (V)
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
9pin SIP PFC-PWM combo: CM6903
92
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
Circuit configuration has been modified.
10 min to design your power supply (V)
400V Rated Capacitors Can Be Used!
V OUT
R14
D1
R13
L1
R8
D12
R9
R17
L2
C21
Q2
U2
R7
C9
Z1
C10
D13
C17
D2
AC IN
C19
C1
R16
R12
RA C
D7
F1
C4
R2
R20
D5
T1
T2
C18
SR1
R15
C5
R5
Q1
V CC_CIRCLE
Q3
R10
R4
C16
D6
D3
R3
R19
D8
T1
D10
D11
D9
C13
C14
C15
R11
C11
C7
9
C8
2
IAC
VCC
VREFOK
R1C
1K ohm
R1B
RFIlter
+
400K ohm
+
+
100K ohm
.
U1
R1A
-
ISENSE
6
.
.
OUT
.
ISENSEAMP
CFilter
S
Q
4
+
SUM
R
PFCCMP
V REF OK
R
VFB
gmv
8
D8
-
RAMP
.
2.5V
.
UVLO
.
+
V CC
D4
7
.
UVLO
SS
VCC OVP
V CC
+
19.4V
C8
.
FAULTB
VEAO
.
-
18V
R11
PFCOUT
Q
C9
OSC
Tri-Fault
Detect
PFCCLKB
PFCCLKB
.
PWMCLK
.
-
PWMCLK
.
0.5V
3
VIN OK
+
V FB
-
0.75V
+
+
V REF OK
S
.
2.5V
PFC OVP
+
PWMOUT
R
R
R
2.75V
Q
Q
.
-
2.5V
1.5V
.
10mS
.
-1V
PWMCMP
.
+
.
PFC ILIMIT
D10
+
.
SS
0.5V
+
.
PWM CLK
1V
V EA O
-
PWMOFF
CM6903
fpfc= 67KHz
fpwm=67KHz
1
DCILIMIT
CM6904
fpfc= 67KHz
fpwm=134KHz
5
GND
Typical CM6805/CM6806 & CM6903 application circuit
93
10 min to design your power supply (V)
Jeffrey Hwang
CM6805, CM6806 and CM6903
PWM SECTION
94
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
10 min to design your power supply (V)
PFC Control
CM6805/CM6806/CM6903 PFC
Controller:
Leading Edge Modulation
with Input Current
Shaping Technique
(ICST)
95
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
10 min to design your power supply (V)
CM6805, CM6806 and CM6903
PFC Control
•ICST is based on the following equations:
Re 
Vin
(1)
I in
I l  I in
(2)
•Equation 2 means: average boost inductor current
equals to input current.
•Assume that input instantaneous power is about to
equal to the output instantaneous power.
Vin  I l  Vout  I d
Vout
Vin
 1
(1  d )
•For steady state and for the each phase angle, boost
converter DC equation at continuous conduction
mode is:
(3)
(4)
96
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
10 min to design your power supply (V)
CM6805, CM6806 and CM6903
PFC Control
•Rearrange above equations, (1), (2),(3), and (4) in term of Vout and d, boost
converter duty cycle and we can get average boost diode current equation (5):
Id 
(1  d )  Vout
2
(5)
Re
•Also, the average diode current can be expressed as:
1
Id 
Tsw

Toff
0
I d (t )  dt
(6)
97
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
10 min to design your power supply (V)
CM6805, CM6806 and CM6903
PFC Control
•If the value of the boost inductor is large enough, we can assume
I d (t ) ~ I d
, Id is constant during each switching period, 1/67.5khz.
•It means during each cycle or we can say during the sampling, the diode
current is a constant.
•Therefore, equation (6) becomes:
Id 
I d  toff
 I d  d  I d  (1  d )
'
Tsw
(7)
98
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
10 min to design your power supply (V)
CM6805, CM6806 and CM6903
Id  d 
'
 Id 
( d )  Vout
PFC Control
' 2
d  Vout
Re
'
Re
Vout toff
 Id 

Re Tsw
(8)
•Using this simple equation (8), we implement the PFC
control section of the PFC-PWM controller, CM6805,
CM6806, CM6903 & CM6501
99
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903
PFC Control
Review Leading Edge Modulation & Average Current Mode PFC Control
100
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903
101
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903
102
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903
2 purposes to add Isense filter:
• Protect IC during inrush current
• Using smaller inductor and still having good THD
Usually, the pole of Isense filter ~ 1/6 of the switching
frequency, and it is 67.5khz/6 = 1/(2×π×Rfilter×Cfilter)
If Rfilter =1K Ω, Cfilter=14.15nF.
103
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903D<50% needs Slope Compensation
104
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903
D<50% needs Slope Compensation
105
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903D<50% needs Slope Compensation
106
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903
D<50% needs Slope Compensation
107
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903D<50% needs Slope Compensation
108
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903D<50% needs Slope Compensation
109
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903D<50% needs Slope Compensation
110
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903D<50% needs Slope Compensation
111
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903D<50% needs Slope Compensation
112
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
10 min to design your power supply (V)
CM6805, CM6806 and CM6903D<50% needs Slope Compensation
For CM6805/CM6806 & CM6903,
Bleed Resistor Not Required
Negative Charge Pump Not Required
for the PFC section
PFC Section
113
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
CM6805, CM6806 and CM6903D<50% needs Slope Compensation
ISENSEOUT
 A  Sin(2ft)
IAC
 B  Sin(2ft)
TIME
IAC enhances the THD during light load and high line
TIME
ISENSEOUT+IAC
 ( A  B)  Sin(2ft )
TIME
114
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
10 min to design your power supply (V)
CM6805, CM6806 and CM6903
CM6800
For CM6800 family, ΔVEAO=6V-0.625V=5.375V
and
For CM6805, CM6806 and CM6903, ΔVEAO=(6V0.625V)/4=1.34V
Voltage Loop
or CM6805 Family
115
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
&
Trailing Edge Modulation PWM
CM6805/CM6806 & CM6903
PWM Control:
1.5V Precision Current CMP +
10 ms Digital Soft Start
116
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
&
Trailing Edge Modulation PWM
10 min to design your power supply (V)
V OUT
R14
D1
R13
L1
R8
D12
R9
R17
L2
C21
Q2
U2
R7
C9
Z1
C10
D13
C17
D2
AC IN
C19
C1
R16
R12
RA C
D7
F1
C4
R2
R20
D5
T1
T2
C18
SR1
R15
C5
R5
Q1
V CC_CIRCLE
Q3
R10
R4
C16
D6
D3
R3
R19
D8
T1
D10
D11
D9
C13
C14
C15
R11
C11
C7
9
C8
2
IAC
VCC
VREFOK
R1C
1K ohm
R1B
RFIlter
100K ohm
.
400K ohm
+
+
6
+
U1
R1A
-
ISENSE
.
.
OUT
.
ISENSEAMP
CFilter
S
Q
4
+
SUM
R
PFCCMP
V REF OK
R
VFB
gmv
8
D8
-
RAMP
.
2.5V
.
UVLO
.
+
V CC
D4
7
.
UVLO
SS
VCC OVP
V CC
+
19.4V
C8
.
FAULTB
VEAO
.
-
18V
R11
PFCOUT
Q
C9
OSC
Tri-Fault
Detect
PFCCLKB
PFCCLKB
.
PWMCLK
.
-
PWMCLK
.
0.5V
3
VIN OK
+
V FB
V REF OK
-
S
.
2.5V
PFC OVP
0.75V
+
+
+
R
2.75V
PWMOUT
Q
.
-
2.5V
1.5V
PWM Section
.
10mS
.
-1V
Q
R
R
+
+
.
PFC ILIMIT
D10
PWMCMP
.
.
SS
0.5V
+
.
PWM CLK
1V
V EA O
-
PWMOFF
CM6903
fpfc= 67KHz
fpwm=67KHz
1
DCILIMIT
5
GND
CM6904
fpfc= 67KHz
fpwm=134KHz
117
10 min to design your power supply (V)
Jeffrey Hwang
Input Current Shaping Technique
(ICST)
PFC with Leading Edge Modulation
118
10 min to design your power supply (V)
Jeffrey Hwang
Design High Density AC
Adapter
8 Pin 12V Secondary Fly Back Smart Driver,
CM6201
D1
R3
1
C2
2
R4
VREF
UVLO
BIAS
BG
VCC
PGND
OSC
8
VBUS
VOUT
4
VL
SRDRV
DRV
DIGITAL
CONTROL
-
C1
+
VL_VTH
-
3
DCM_DET
7
5
+
M2
PWM
-25mV
M1
VCC
AGND
R5
VREF
R6
VCC
D4
VL_VTH
VL
PGND
CM6201
R1
SRDRV
D2
AGND
DCM_DET
D3
R2
C3
119
6
10 min to design your power supply (V)
Jeffrey Hwang
Design High Density AC
Adapter
8 Pin 12V Secondary Fly Back Smart Driver,
CM6201
•
•
•
•
•
•
•
•
Pin to pin compatible with STSR30
Supply voltage range: 7 to 13.2V
Feed-Forward Peak Detect for wide input range
CCM or DCM Fly-back operation
Operating Frequency: up to 750 KHz
Automatic turn off for duty cycle less than 12.5%
Smart turn off (240nS)
Output driver: 15 Ohms sourcing and 6 Ohms
sinking capability
120
10 min to design your power supply (V)
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
24-hour Engineering Supports
• Champion Design Center
– www.champion-micro.com
• Design Excel Spread Sheets
– PWM design for Flyback Converter Section
– CM6805, CM6806, CM6903 Design Tool
121
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
10 min to design your power supply (V)
PWM design for Flyback Converter Section
CM6805/CM6806 PWM SECTION for FlyBack Design
User Inputs All Resistors, inductor and VCC
Units
User Inputs the Optical Couple Current and VCC
If the cell is filled with yellow color, it is a user input cell.
Flyback Input Voltage (minimum)
Flyback Output Voltage
Lm p (Primary Side Flyback Inductance)
Ls (Secondary Side Flyback Inductance)
Turn Ratio, n = Np/Ns
Switching frequency, fsw
Switching Period
Duty Cycle, D (DCM but use CCM formula)
1-D
Maximum Output Power
PWM system only efficiency
Maximum input Power
Primary Peak Current @ Full load & Steady State
Primary Peak Current with D=Dmax=50% @200V
Secondary Peak Current @200V
Rpwmsense
200
19
3.36E-04
9.33E-06
6.00
6.75E+04
1.48E-05
36.31%
63.69%
100
86%
116
3.20E+00
4.41E+00
2.65E+01
3.90E-01
V
V
H
H
200
19
3.36E-04
9.33E-06
6.00
6.75E+04
1.48E-05
36.31%
63.69%
100
86%
116
3.20E+00
4.41E+00
2.65E+01
3.90E-01
RV+I
Qphoto Couple Current @ 100% load
Voltage Drop cross RPWMRSENSE @ 100% load
Voltage Drop cross RV+I @ 100% load
Qphoto Couple Current @ 50% load
Voltage Drop cross RPWMRSENSE @ 50% load
Voltage Drop cross RV+I @ 50% load
Qphoto Couple Current @ 20% load
Voltage Drop cross RPWMRSENSE @ 20% load
Voltage Drop cross RV+I @ 20% load
RPWMTRIFAULT1
RPWMTRIFAULT2 + RNTC1
VCC=15V
PWMTRIFAULT Voltage @ 20% load VCC="B12"
PWMTRIFAULT Voltage @ 50% load VCC="B12"
Short Threshold ~
Green Mode Threshold ~
VCC=13V
PWMTRIFAULT Voltage @ 20% load VCC="B18"
PWMTRIFAULT Voltage @ 50% load VCC="B18"
Short Threshold ~
Green Mode Threshold ~
VCC=10V
PWMTRIFAULT Voltage @ 20% load VCC="B22"
PWMTRIFAULT Voltage @ 50% load VCC="B22"
Short Threshold ~
Green Mode Threshold ~
CPWMTRIFAULT
CV+I
Design OK or Not
500
5.00E-04
1.25E+00
2.50E-01
1.75E-03
6.25E-01
8.75E-01
2.50E-03
2.50E-01
1.25E+00
2.60E+03
4.20E+04
15
7.76E+00
9.71E+00
14.3
6.8
13
5.76E+00
7.71E+00
12.3
5.8
10
2.76E+00
4.71E+00
9.3
4.3
2.24E-07
1.50E-10
TRUE
Hz
S
%
%
W
%
W
A
A
A
OHM
OHM
A
V
V
A
V
V
A
V
V
OHM
OHM
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
F
F
500
5.00E-04
1.25E+00
2.50E-01
1.75E-03
6.25E-01
8.75E-01
2.50E-03
2.50E-01
1.25E+00
2.68E+03
4.20E+04
15
6.80E+00
9.57E+00
14.3
6.8
13
5.56E+00
7.57E+00
12.3
5.8
10
2.56E+00
4.57E+00
9.3
4.3
2.24E-07
1.50E-10
TRUE
122
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
10 min to design your power supply (V)
CM6805 CM6806 CM6903 Design Tool
CM6803 CM6804 CM6805 CM6806 CM6903 CM6904 Design Tool / Jeffrey H. Hwang
Green-Mode Design
USER INPUT INDUCTOR and CAPACITOR
Output Pow er (Watt)
300
PFC Output Voltage (V)
380
Yellow cells are for user input
CALCULATED INDUCTOR and CAPACITOR
300
380
High Line
Efficiency at High Line (%)
High Line; Maximum Line Input Voltage (Vrms) (V)
Peak Input Voltage at High Line(V)
Input Line Current at High Line (Irms) (A)
Peak High Line Current (A)
Peak High Line Sw itching Current (A)
Ripple Current at Peak High Line (%)
Ripple Current at Peak High Line (A)
Input Pow er at High Line (Watt)
System Sw itching Frequency (Hz); Fixed fsw = 67.5 Khz
Tperiod, Sw itching Cycle (Sec); Fixed fsw = 67.5 Khz
Sw itch-On-Time at Peak input voltage (Sec) Assumed in CCM
Sw itch-Off-Time at peak input voltage (Sec) Assumed in CCM
Sw itching Duty Cycle at peak input voltage (%) Assumed in CCM
96
260
367.6955262
1.201923077
1.699775916
1.87616188
9.40142561
1.76E-01
312.5
6.75E+04
1.48E-05
4.80E-07
1.43E-05
3.24E+00
96
260
367.6955262
1.201923077
1.699775916
2.124719895
50
0.424943979
312.5
6.75E+04
1.48E-05
4.80E-07
1.43E-05
3.24E+00
94
80
113.137085
3.989361702
5.641809424
6.82E+00
17.26204392
1.18E+00
319.1489362
1.04E-05
4.41E-06
7.02E+01
94
80
113.137085
3.989361702
5.641809424
7.06E+00
20.08431848
1.42E+00
319.1489362
1.04E-05
4.41E-06
7.02E+01
0.08862405
1.430E+06
5.000E+05
5.000E-04
2.50E-04
0.08862405
1.430E+06
5.000E+05
4.151E-04
9.72E-05
380
380
114
0.051466567
114
0.02
9.00E-05
1.980E+00
3.00E+06
2.98E+06
1.97E+04
1.25E+05
9.00E-05
1.980E+00
3.00E+06
2.98E+06
1.97E+04
4.86E+04
Low Line
Efficiency at Low Line (%)
Low Line; Minimum Line Input Voltage (Vrms) (V)
Peak Input Voltage at Low Line (V)
Input Line Current at Low Line (Irms) (A)
Peak Low Line Current (A)
Peak Low Line Sw itching Current (A)
Ripple Current at Peak High Line (%)
Ripple Current at Peak High Line (A)
Input Pow er at Low Line (Watt)
Sw itch-On-Time at Peak input voltage (Sec) Assumed in CCM
Sw itch-Off-Time at peak input voltage (Sec) Assumed in CCM
Sw itching Duty Cycle at peak input voltage (%) Assumed in CCM
EXTERNAL POWER COMPONENTS
RSENSE (Ohm)
RAC (Ohm)
OPTION1: RACvcc (Ohm): the resistor betw een VCC and IAC
Input Inductor for PFC Boost (H)
Output Capacitor for PFC Boost (F)
PFC Boost Output Before Droping for the Hold-Up Time Calculation
(V)
PFC Boost Output After Droping for the Hold-Up Time Calculation
(V)
Hold-Up Time (Sec)
COMPENSATION AND FEEDBACK for PFC Voltage Loop
VEAO is a GMv, a Slew Rate Enhancement Transconductance
Amplifier, a Voltage Loop Error Amplifier
GMv, Transconductance at the w orse condition (mho)
dVEAO for the maximum Pow er (V)
Rvfb1 + Rvfb2 (Ohm)
Rvfb1 (Ohm) for VFB=2.5V
Rvfb2 (Ohm) for VFB=2.5V
R1c, Compensation Resistor for ftv =20Hz (Ohm)
123
10 min to design your power supply (V)
Jeffrey HwangPFC
Input Current Shaping Technique
with Leading Edge Modulation
Summary High Density AC Adapter Design
• without additional cost
– PFC: Efficiency~95.5% without additional cost
• 2 Level Boost Follower (200V and 380V)
• Use LETE, CM6805, CM6806 and CM6903 family
– FlyBack: Efficiency~87.5% (without SR)
– FlyBack: Efficiency~90% (with SR,
CM6201)
– Total Efficiency ~ from 83.56% to 86%
124