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Input Programmable Gain Amplifier
(PGA) Design for ADC Signal
Conditioning
Oregon State Univ.
April 25th 2011
Todd Brooks
Director of Engineering
Analog & Mixed Signal Development
www.broadcom.com
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Audio Input Path Requirements
VIP
VIN
HPF
&
LPF
PGA
CTΣΔ
ADC
5
DOUT
 Supply voltage

1.3-1.5V
 Quiescent power

1.1mW
 Input impedance in Mic.-mode

300K
 Input referred noise in Mic.-mode

1.3µV
 Audio input image rejection

75dB
 Dynamic range

92dB
2
Resistive PGA
RI
RF
A
RI
RF
− Large resistor area
− Large input referred
noise
+ Good linearity
Good for low-gain mode with large amplitude inputs
3
Microphone PGA with Gm-Input
RF
Gm
A
RF
+ Large input impedance
+ Low noise
− Poor linearity with large input
signal
Good for high-gain mode with small amplitude inputs
4
Audio Input Path Requirements
VIP
VIN
HPF
&
LPF
CTΣΔ
ADC
PGA
5
DOUT
RF
Gm
A
RF
5
10mA
VX
M1
Vip
M2
VOUT
Vin
Output Current (µA)
Gm-Cell with Diff-Pair
10
5
0
-5
-10
-0.4
-0.2
0
0.2
0.4
Input Voltage (V)
− Poor linearity and gain
accuracy
+ Good input referred noise
6
Gm-Cell with Diff-Pair
1.0
Ib =10mA
VX
M1
Vip
100k
M2
VOUT
Vin
100k
VOUT(V)
0.5
0
-0.5
-1.0
-0.4
-0.2
0
0.2
0.4
Input Voltage (V)
− Peak output level, VOUT = +/- Ib*RL
7
Gm-Cell with Diff-Pair
1.0
Ib
VOUT(V)
0.5
VX
M1
Vip
M2
VOUT
Vin
0
-0.5
-1.0
− Vin = Vgs1 – Vgs2
-0.4
-0.2
0
0.2
0.4
Input Voltage (V)
− Vgs1 = sqrt(I1/b) + Vth1
− Vin = sqrt(I1/b) – sqrt(I1/b) =
Vgt1 – Vgt2
− Vin=0 at mid-level,
then I1 = I2 = Ib/2 and Vgt1 = Vgt2 = Vgt
− Vin=sqrt(2)*Vgt at full tilt, then I1 = Ib and I2 =0
8
Distortion in Input Diff-Pair
1.0
Ib
VOUT(V)
0.5
VX
M1
Vip
M2
VOUT
0
-0.5
Vin
-1.0
-0.4
-0.2
0
0.2
0.4
Input Voltage (V)
− Nonlinearity with odd-symmetry
1.0
− Requires perfectly balanced differential
− with perfect differential matching
VOUT(dB)
− Only causes odd harmonic distortion
0.5
0
-0.5
-1.0
1
2
3
Frequency (Hz)
4
5
9
Distortion in Input Diff-Pair
2.0
Ib
VX(V)
1.5
VX
M1
Vip
M2
VOUT
1.0
0.5
Vin
0
-0.4
-0.2
0
0.2
0.4
Input Voltage (V)
− Nonlinearity with even-symmetry
1.0
− Even symmetry causes rectification
VOUT(dB)
− Only causes even harmonic distortion
0.5
0
-0.5
-1.0
1
2
3
Frequency (Hz)
4
5
RS
RS
M1
M2
Vip
VOUT
Vin
Output Current (µA)
Gm-cell with Resistive Degeneration
10
5
0
-5
-10
-0.4
-0.2
0
0.2
0.4
Input Voltage (V)
− Improvement in linearity and gain accuracy
+ Good input referred noise
11
RS
RS
M1
Vip
M2
Vin
IOUT
Output Current (µA)
PGA with Resistively Degenerated
Diff Pair
10
5
0
-5
-10
-0.4
-0.2
0
0.2
0.4
Input Voltage (V)
RF
A
RF
VOUT
12
Biasing Tradeoffs in
Resistive-Degenerated Diff Pair
RS
RS
M1
RS
M2
Vip
VOUT
RS
M1
Vin
+ Bias Current Noise
common to both sides
M2
Vip
VOUT
Vin
+ Bias Current Noise
not correlated between
sides
+ Bias Current Noise has
+ Bias Current has direct
small impact on differential impact on differential
performance
performance
- Signal Swing must reduce - Signal Swing increase due
due to I*R drop across Rs
to no I*R drop across Rs
13
RS
RS
M1
M2
A
Vip
A
IOUT
Vin
Output Current (µA)
Gm-Cell with Feedback Amplifier
10
5
0
-5
-10
-0.4
-0.2
0
0.2
0.4
Input Voltage (V)
+ Use Feedback to further improve
linearity and gain accuracy
14
Gm-Cell with Differential Feedback Amp
RS
RS
MA1
M1
M2
A
Vip
MA2
A
IOUT
Vin
Differential Amplifier
− Degraded noise
15
Improved PGA Gm-Cell
RS
Vip
RS
M3
M4
M1
M2
Vin
-A
-A
IOUT
I1
Feedback Amp
I2
Feedback Amp
+ Good linearity and gain
accuracy
+ Good input referred noise
16
Improved PGA Gm-Cell (detail)
RS
Vip
RS
M3
M4
M1
M2
Vin
-A
-A
IOUT
I1
Feedback Amp
I2
Feedback Amp
+ Good linearity and gain
accuracy
+ Good input referred noise
17
Further Improved PGA Gm-Cell
RS
Vip
RS
M3
M4
M1
M2
Vin
-A
-A
IOUT
I1
Feedback Amp
I2
Feedback Amp
+ Good linearity and gain accuracy
+ Good input referred noise
+ Increase Linear Input Range – maintain constant
Vds across input devices M3/M4
18
Further Improved PGA Gm-Cell
RS
Vip
RS
M3
M4
M1
M2
Vin
-A
-A
IOUT
I1
Feedback Amp
I2
Feedback Amp
+ Increase Linear Input Range:
1. Maintain constant Vds across input devices M3/M4
2. Vary Bias Current as a function of PGA setting
a. Maintain low bias noise with high PGA gain
b. Maintain wide signal swing with low PGA gain
19
Bluetooth HID Interface Challenges
• Performance Challenges
–
–
–
–
–
–
–
High Resolution
Low Offset
Low Gain Error
Wide Supply Range
High Input Impedance
High Multiplex BW
Low Power and Cost
> 10 ENOB - Effective Number of Bits
< 1mV offset over wide supply voltage range
< 0.2% gain error over wide supply voltage range
1.6 to 3.6V to support Alkaline, Lion, Li-poly batteries
> 100kohm
capable to measure 32 distinct inputs every 240usec period
• Additional Project Challenges
– Must be based on an existing Sigma-Delta ADC
– Must support ratio-metric measurements relative to an external supply voltage
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Bluetooth HID Front-End Architecture and
Interface Configuration
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Sigma-Delta Core ADC
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Second Integrator Output for a Chopped FullScale Input (With Inverse STF Filter)
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Second Integrator Output for a Chopped FullScale Input (No Inverse STF Filter)
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Inverse STF Compensation
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Inverse STF Filter Implementation
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
HID Front-End System Block Diagram
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Simulated ENOB Performance vs. Input Level
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Die Photograph
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Output Gain Error
Before and After Calibration
Mean = 0.12%, sigma=0.02%
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Output Offset Voltage Error
Before and After Calibration
Mean = 0.6mV, sigma=0.1mV
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Measured System ENOB vs. Input Frequency
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Performance Summary and Comparison
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Comparison References
Broadcom Proprietary & Confidential. © 2009 Broadcom Corporation. All rights reserved.
Audio Input Path Requirements
VIP
VIN
HPF
&
LPF
PGA
CTΣΔ
ADC
 Supply voltage

5
DOUT
1.3-1.5V
 Quiescent power
1.1mW

 Input impedance in Mic.-mode
300K

 Input referred noise in Mic.-mode
1.3µV

 Audio input image rejection

35
Resistive PGA
RI
RF
A
RI
RF
− Large resistor area
− Large input referred
noise
+ Good linearity
Good for line-in mode with 0-21dB gain
36
Microphone PGA with Gm-Input
RF
Gm
A
RF
+ Large input impedance
+ Low noise
− Poor linearity with large input
signal
Good for microphone-in mode with 21-42dB gain
37
Segmented PGA
RI
S
RF
S Mode
S
A
G
m
S
RI
S
0 Microphone-in
1 Line-in
RF
+ Large input impedance in microphone
mode
+ Low noise in microphone mode
+ Good linearity in line-in mode
Good for both microphone-in and line-in with 0-42dB gain
38
RS
RS
M1
M2
Vip
IOUT
Vin
Output Current (µA)
Gm-cell with Resistive Degeneration
10
5
0
-5
-10
-0.4
-0.2
0
0.2
0.4
Input Voltage (V)
− Poor linearity and gain
accuracy
+ Good input referred noise
39
RS
RS
M1
M2
A
Vip
A
IOUT
Vin
Output Current (µA)
Gm-Cell with Feedback Amplifier
10
5
0
-5
-10
-0.4
-0.2
0
0.2
0.4
Input Voltage (V)
+ Improved linearity and gain
accuracy
40
Gm-Cell with Differential Feedback Amplifie
RS
RS
MA1
M1
M2
A
Vip
MA2
A
IOUT
Vin
Differential Amplifier
− Degraded noise
41
Microphone PGA Gm-Cell
RS
RS
M3
M4
M1
Vip
M2
-A
Vi
-A
n
IOUT
I1
Feedback Amp
I2
Feedback Amp
+ Good linearity and gain
accuracy
+ Good input referred noise
42
Continuous-Time ΣΔ ADC
CFF1
C2
C1
VIP
VIN
R1
R2
A
R1
CFF2
R3
A
A
ADC
5
Dout
R3
R2
C1
C3
C2
17-Ievel
IDAC
CFF2
C3
CFF1
CFB
R-String
DAC
DEM
+ Inherent antialiasing
43
Capacitor Feed-Forward Technique
CFF1
C2
C1
VIP
VIN
R1
R2
A
R1
CFF2
R3
A
A
ADC
5
Dout
R3
R2
C1
C3
C2
17-Ievel
IDAC
CFF2
C3
CFF1
CFB
R-String
DAC
DEM
+ Requires fewer
DACs
44
Direct Feedback Technique
CFF1
C2
C1
VIP
VIN
R1
R2
A
R1
C3
R3
A
A
ADC
5
Dout
R3
R2
C1
CFF2
C2
17-Ievel
IDAC
CFF2
C3
CFF1
CFB
R-String
DAC
DEM
+ Reduces impact of loop delay on stability
+ Requires no additional summing circuitry
45
ADC Pole/Zero Map
1
0.8
: Pole
poles movement
with R and C Variation
decreasing
R&C
: Zero
RC
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1
-1
-0.5
0
0.5
1
• Stable operation range: +/-60% RC time
constant
46
17-Level IDAC
M0
M15
To summing
node
st
of 1 -integrator
IREF
Reference Current
Bias Current
Current Steering DAC
− Diode connection limits degeneration headroom
− Transistor noise limits DAC performance
47
Low-Noise 17-Level IDAC
VCM
M0
A1
VCM
M15
To summing
node
st
of 1 -integrator
A2
RREF
Reference Current
Bias Current
Current Steering DAC
+ Feedback amplifiers maximize degeneration
headroom
+ Degeneration reduces transistor noise
48