Download Electronics

Electronics
- lectures for Mechanical Engineering
part 5
Dr. Bogusław Boratyński
Faculty of Microsystems Electronics and Photonics,
Wroclaw University of Technology,
2011
From the course syllabus
Basic literature & figure sources:
G. Rizzoni, Fundamentals of Electrical Engineering, McGraw-Hill
R.F. Pierret, Semiconductor Device Fundamentals, Addison-Wesley Publ.,
D. A. Hodges, H. G. Jackson, Analysis and Design of Digital ICs, McGraw-Hill
J. Millman, Microelectronics, McGraw-Hill
Additional literature:
W. Marciniak, Przyrządy półprzewodnikowe i układy scalone, WNT,
Digital integrated circuits
Chapter 4. Digital integrated circuits.
Inverter circuit
TTL and CMOS families:
Parameters of digital ciruits
Types of logic gates
Digital ICs based on logic gates
Flip-flops, Timer cct.
Basics of memory circuits
Bipolar transistor switch - inverter
Input signal UI = UBE
Output signal U0 = UCE
Transistor OFF U0H = UCC
Transistor ON U0L = UCEsat = 0.2V
UI
UT
U0
UT
U0
UI
UIH
UIL
time
U0H
U0L
pHL
time
pLH
Source: J. Millman, Microelectronics, McGraw-Hill
Digital integrated circuits - TTL gates
Basic 2-input NAND TTL
+UCC
4k
1,6k
130
Gate inputs:
double emitter npn transistor
E1
A
B
Y
Source: J. Millman, Microelectronics, McGraw-Hill
7402 chip: quad
2 input NOR gates
B
n+
p
p pp
Si - substrate
1k
7400 chip: quad (four)
2 input NAND gates
n+
E2
C
n+
p
n
p
7411 chip: triple
3 input AND gates
7404 chip: HEX (eight)
inverter
Digital integrated circuits - TTL gates
Transfer characteristics:
TTL Standard NAND 7400
TTL Schottky NAND 74S00
U0[V]
U0[V]
5
5
4
4
3
3
2
2
1
1
0
1
2
3
4
5 UI[V]
0
1
2
3
4
5 UI[V]
Source J. Millman, Microelectronics, McGraw-Hill
Digital integrated circuits - TTL gates
TTL switching
U0
3,5V
H
Supply voltage: 74xx 5V  5%
54xx 5V ±10% (military)
examples: 7402, 5402, 7411, 5411
0,2V
L
Logic states::
0
0V ÷ 0.4V
1
2.4V ÷ 5V
time
ICC
14mA (Cload=50pF)
1mA
3,4mA
1mA
time
25ns
TTL Family
Symbol
P [mW]
tp [ns]
Standard
P x tp [pJ]
Fan-out [#]
TTL
74xx
10
10
100
10
Advanced Schottky
TTL AS
74ASxx
8
1,7
13,6
48
Low Power
Schottky
TTL LS, ALS
74LSxx, 74ALSxx
1,2
4
4,8
40
FAST
TTL F
5,5
3,5
19
33
Source: J. Millman, Microelectronics, McGraw-Hill
Digital integrated circuits - CMOS gates
CMOS inverter: NOT gate
+UCC
Structure of
a CMOS inverter:
n-channel and p-channel
MOSFET pair
UI
SiO2
UI
+UCC
U0
U0
n+
Si substrate
Si
p
n+
p
p
n
Source: D.A. Hodges, H.G. Jackson, Analysis and Design
of Digital Integrated Circuits, McGraw-Hill
Digital integrated circuits - CMOS gates
Transfer characteristics:
CMOS Standard (Ucc = 3V ÷ 18V)
U0[V]
U0[V]
UCC=10V
10
CMOS HCT
TTL – compatible, (Ucc =5V)
HC
AC
5
4
UCC=5V
5
HCT
ACT
3
2
1
0
5
10 UI[V]
0
1
2
3
4
5 UI[V]
Source: D.A. Hodges, H.G. Jackson, Analysis and Design
of Digital Integrated Circuits, McGraw-Hill
U
Digital integrated circuits - CMOS parameters
U0
CMOS switching
5V
Pdissipated = UCC * ICC =Ucc * Q/tcl =
= UCC * UCC * Cload/tcl = UCC2 * Cload *fcl
0V
time
ICC
5mA (Cload=50pF)
1A
Logic levels:
0
0V ÷ 0.2V
1
Ucc
time
100ns
Family
Symbol
UCC [V]
tp [ns]
f [MHz]
Basic standard
4000B (74C)
3 - 18
125
4
High speed
HC
2-6
8
50
High speed (TTL compatible)
HCT
5
8
50
Advanced Fast
AC, (AHC)
2-6
3 (5,2)
160 (115)
Advanced Fast (TTL compatible)
ACT, (AHCT)
5
3 (5,2)
160 (115)
Low supply voltage
LV
2 - 5,5
9
70
Advanced low voltage
ALVC
1,2 - 3,6
3
300
Source: D.A. Hodges, H.G. Jackson, Analysis and Design
of Digital Integrated Circuits, McGraw-Hill
U
Digital integrated circuits - CMOS/ TTL parameters
U0
CMOS switching
Pdissipated = Pstatic +Pdynamic = UCC * ICC
5V
0V
time
ICC
5mA (Cload=50pF)
1A
Pdynamic = UCC * ICC =Ucc * Q/Tcl =
= UCC * UCC * Cload/Tcl = UCC2 * Cload *fcl
Pstatic = nW
time
very small
100ns
fcl = 1/Tcl
Clock frequency
TTL switching
U0
3,5V
H
0,2V
L
time
ICC
Pstatic and Pdynamic
both large
14mA (Cload=50pF)
1mA
3,4mA
1mA
time
25ns
Source: D.A. Hodges, H.G. Jackson, Analysis and Design
of Digital Integrated Circuits, McGraw-Hill
Digital integrated circuits - CMOS gates
CMOS NAND gate
CMOS NOR gate
+UCC
+UCC
A
Y
A
B
Y
B
Source: D.A. Hodges, H.G. Jackson, Analysis and Design
of Digital Integrated Circuits, McGraw-Hill
Digital integrated circuits - flip-flops
Circuit based on logic gates:
NAND gate
sequential logic circuits
(regenerative cct. - with positve
feedback):
flip-flops, latches, clock counters, registers,
memories
NOR gate
NOR gates
combinational logic circuits
(nonregenerative cct. – no feedback):
combination of different gates
NAND gates
‘
Source: D.A. Hodges, H.G. Jackson, Analysis and Design
of Digital Integrated Circuits, McGraw-Hill
SR latch (flip-flop)
Digital integrated circuits - flip-flops
Synchronous SR latch
Source: D.A. Hodges, H.G. Jackson, Analysis and Design
of Digital Integrated Circuits, McGraw-Hill
Digital integrated circuits - applications
Synchronous JK
master – slave flip-flop
Source: D.A. Hodges, H.G. Jackson, Analysis and Design
of Digital Integrated Circuits, McGraw-Hill
Digital integrated circuits - memories
Programmable Read Only Memory - PROM - nonvolatile
- matrix of transistors, memory cells
+ input & output (read-write) circuits
any cell can be addressed
by activating a proper row and column
with the same access time
One time programmable:
Mask (pattern of internal connections
between the components)
programmable by manufacturer
or
User programmable by electrical pulses
applied to the circuit
Source: D.A. Hodges, H.G. Jackson, Analysis and Design
of Digital Integrated Circuits, McGraw-Hill
Digital integrated circuits - memories
Electrically Programmable Read Only Memory - nonvolatile
EEPROM - matrix of special transistors - memory cells
(user electrically programmable and erasable)
+ input &output (read-write) circuits
special MOSFETs: Gate-2 standard gate, conected
Gate-1 - floating gate, not connected,
can be charged and discharged with electrons
during programming, thus switching the transistor
to off-state for undefined time
Dielectric
Source: D.A. Hodges, H.G. Jackson, Analysis and Design
of Digital Integrated Circuits, McGraw-Hill
Digital integrated circuits - memories
Static Random Acces Memory – Volatile
SRAM - matrix of cells
each cell - bistable flip-flop
6 transistors (BJT or MOSFET)
V. high speed
Lower capacity than DRAM
Access for read-out
and write-in
if R=Hi
Source: D.A. Hodges, H.G. Jackson, Analysis and Design
of Digital Integrated Circuits, McGraw-Hill
Digital integrated circuits - memories
Dynamic Random Acces Memory DRAM volatile
a single cell:
1-transistor cell (1 MOSFET + 1capacitor)
Dynamic means:
needs frequent (1kHz) refreshment
of memory status
V. high capacity
Low manufacturing cost
Slower than SRAM
1Gbit chip contains
more than 109 transistors
with the smallest dimension of 30nm
Source: D.A. Hodges, H.G. Jackson, Analysis and Design
of Digital Integrated Circuits, McGraw-Hill
Digital integrated circuits - applications
IC timer - 555 circuit (e.g. MC1555) - made in TTL or CMOS technology
includes analogue & digital circuitry:
two comparators (Op-AMPs) & RS latch
Source: D.A. Hodges, H.G. Jackson, Analysis and Design
of Digital Integrated Circuits, McGraw-Hill
Digital integrated circuits - applications
555 timer cct. applications
Monostable multivibrator
(square pulse generator)
Pulse width T= 1.1 RA C
Astable multivibrator
(oscillator)
Trigger
Output
Output
Source: D.A. Hodges, H.G. Jackson, Analysis and Design
of Digital Integrated Circuits, McGraw-Hill