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The CMOS inverter
VDD
p-switch
VDD
Y
A
Y
n-switch
A
VSS
Paulo Moreira
A
Y
0
good 1
1
good 0
VSS
Inverter
1
The CMOS inverter
Inverter DC transfer characteristic
2.5
VDD
Slope = -1
2
A
Y
Vout (V)
2.5/0.25
1.5
Vout=Vin
1
/0.25
Slope = -1
0.5
VSS
0
0
0.5
1
1.5
2
2.5
Vin (V)
Paulo Moreira
Inverter
2
The CMOS inverter
Regions of operation (balanced inverter):
Vin
n-MOS
p-MOS
Vout
0
cut-off
linear
Vdd
VTN<Vin<Vdd/2
saturation
linear
~Vdd
Vdd/2
saturation
saturation
Vdd/2
Vdd-|VTP|>Vin>Vdd/2
linear
saturation
~0
Vdd
linear
cut-off
0
The CMOS inverter
Inverter transient response
3
Vout, Vin (V)
2.5
Vout
2
CL=250fF
1.5
1
0.5
Vin
0
-0.5
0
2
4
6
Time (ns)
8
6
Time (ns)
8
10
12
CL=250fF
0.6
I D(nmos)
I D (mA)
0.4
0.2
0
-0.2
-0.4
I D(pmos)
-0.6
0
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2
4
Inverter
10
12
4
The CMOS inverter
Propagation delay
Main origin: load capacitance
t pLH 
t pHL 

C L  Vdd
k p Vdd  VTP 
C L  Vdd
k n Vdd  VTN


2
CL

k p  Vdd
2
CL

k n  Vdd
CL
1
t p  t pLH  t pLH 
2
2  Vdd
 1
1
  
 kn k p 
To reduce the delay:
Reduce CL
Increase kn and kp. That is, increase W/L
The CMOS inverter
• CMOS power budget:
– Dynamic power consumption:
• Charging and discharging of capacitors
– Short circuit currents:
• Short circuit path between power rails during
switching
– Leakage
• Leaking diodes and transistors
Paulo Moreira
Inverter
6
The CMOS inverter
• The dynamic power dissipation is a function of:
– Frequency
– Capacitive loading
– Voltage swing
• To reduce dynamic power dissipation
– Reduce: CL
– Reduce: f
– Reduce: Vdd  The most effective action
Dynamic power VDD
Vin
Vout
Paulo Moreira
1
E = Energy / transition =  C L Vdd2
2
2
P = Power = 2  f  E  f  C L Vdd
Inverter
7
The CMOS inverter
substrate
contact (p+)
n+ diffusion
polysilicon
metal
n-well
n-well
contact (n+)
p+ diffusion
The CMOS inverter
n-well contact (n+)
n-well contact (n+)
n-well
n-well
substrate contact (p+)
substrate contact (p+)
polysilicon
polysilicon
p+ diffusions
p+ diffusions
polysilicon contacts
polysilicon contacts
diffusion contacts
diffusion contacts
n+ diffusions
n+ diffusions
Why The CMOS inverter
is Better??
• 1) Low DC Power Consumption
• 2) Abrupt & well defined Voltage transfer
Characteristic
• 3) Noise Immunity due to Low impedance
between logic levels and Supply/Gnd.
• Symmetry between Tfall &Trise.
• High Density: Si real estate=>Yield=>Cost!
• Highly Integrated=>Active & High input
Impedance=> Composition equality.
• No real trade off between 1,2,3,4,5 & 6