Download High-k Dielectric for Flexible Displays using Anodically Oxidized

High-k Dielectric for Flexible Displays
using Anodically Oxidized Tantalum
Jovan Trujillo
Flexible Display Center
3/2/07
Current state of development
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Anatomy of a Field Effect Transistor
Source metal
n+ a-Si contact
Drain metal
IMD
a-Si:H
Gate Dielectric
Gate Metal
Substrate
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Transistors are Electrical Switches
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Anatomy of a Pixel
transistor
capacitor
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Goals of Tantalum Anodization Research

Fundamental
 Understand relationship between process conditions and electrical
characteristics
 Develop spectroscopic ellipsometry techniques to characterize Ta2O5 film
and interfaces.

Applied
 Use Ta2O5 to improve pentacene based organic transistors
 This work is in collaboration with Parul Dhagat
 Identify problems with implementing in main 6” process line.
 This work is in collaboration with entire process team

Developmental
 Identify factors in quality control
 Supply etch engineer with material
 Propose approach for increasing production
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How Dielectrics Work




Applied electric field causes
opposing internal electric field.
Charge builds up while under
voltage.
Defects in film cause charge to
leak through.
Current is released when
voltage removed.
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Why Tantalum Oxide?
Material
Silicon Nitride
Hafnium Silicate
Process
PE-CVD
Reactive
sputtering
Dielectric
Constant
Problems
~7
Step coverage,
low-k,
low breakdown
voltage.
~12
worse step
coverage,
stoichiometry
problems,
slow deposition
rate
Aluminum Oxide
Reactive
sputtering
~9
same as hafnium
silicate
Tantalum Oxide
Anodic oxidation
~ 28
etch selectivity,
mask changes
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Anodic oxidation process
( a self limiting reaction )
60 mA ramp to 100 V
Hydrogen bubbles
Current change over time
80
70
0.05% vol acetic acid
5.5 L water
Current (mA)
60
50
40
30
20
room temp.
10
0
0
10
20
30
40
50
60
70
80
time (min)
Tantalum Anode
Platinum Cathode
Final current < 0.40 mA giving current flux of 25 fA/m2 @ 100 V
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Role of Acid
 Purpose:
 Increases conductivity of solution; create more ions for reaction.
 Problems:
 Negative ions from acid will contaminate the oxide.
 Higher leakage current.
 Lower breakdown voltage.
 Why acetic acid?
 Based on paper by Kalra, Katyal, and Singh, 1989.
 Acetic acid caused highest breakdown voltage.
 Effect of carbon contamination appears minimal.
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Measuring Thickness with Ellipsometry
(first paper)
FESEM
Oxide (nm)
SE Oxide
(nm)
Diff (nm)
Index @ 550
nm
Wafer 1
189.2
184
5.2
2.2223
Wafer 2
194
183.4
10.6
2.219
Wafer 3
192
185.6
6.4
2.2102
Average:
191.73
184.33
7.4
StdDev:
2.411
1.137
Generated and Experimental
100
Model Fit
Exp E 65°
Exp E 67°
Exp E 69°
Exp E 71°
Exp E 73°
Exp E 75°
80
< 1 >
60
40
20
0
-20
0.0
1.0
2.0
3.0
Photon Energy (eV)
4.0
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5.0
6.0
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Thickness and Index Uniformity
Ta2O5 Thickness in nm
Ta2O5 Index at 550nm
Mean = 183.13
Min = 182.24
Max = 183.89
Std Dev = 0.32210
Uniformity = 0.17588 %
Mean = 2.2222
Min = 2.2182
Max = 2.2262
Std Dev = 0.0020071
Uniformity = 0.090323 %
183.89
183.62
183.34
183.07
182.79
182.52
182.24
2.2262
2.2249
2.2235
2.2222
2.2209
2.2195
2.2182
Max – Min Index variation < 0.02
Max-Min Thickness variation < 3 nm
11 wafer maps have been made with ellipsometry
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Effect of Initial Current on Surface Roughness
60 mA process
20 mA process
Roughness (rms) = 0.696 nm
Roughness (mean) = 0.516 nm
Roughness (peak-to-valley) = 7.22 nm
Roughness (rms) = 0.564 nm
Roughness (mean) = 0.476 nm
Roughness (peak-to-valley) = 2.99 nm
Sputtered Ta metal
Roughness (rms) = 0.463 nm
Roughness (mean) = 0.334 nm
Roughness (peak-to-valley) = 3.36
nm
Thank you Hanna Heikkinen
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Electrical Characterization
 Expected Dieletric Constant of ~ 28
 Paper by Kalra, Katyal, and Singh reported dielectric constant using
0.05 %v/v acetic acid.
 Aluminum capacitors made by sputtering through stainless steel
stencil using MRC-602 “King Kong”
 Automated wafer maps of dielectric constant and leakage flux
made using Electroglas 2001 “Famine”, LabView program,
HP4284A LCR meter, and HP3457A multimeter.
 2022 1 mm2 and 1004 4 mm2 capacitors per wafer
 Data processing done using VBA scripts and Minitab.
 Outliers > 3  removed to normalize data
 ANOVA and Tukey’s test used to compare wafers
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First Capacitor Batch
Dielectric Constant
60 mA ramp to 100 V, 1:40 hours, final current 0.40 mA
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First Capacitor Batch
Dielectric Constant
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First Capacitor Batch
Dielectric Constant
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Capacitor Area Variation
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First Capacitor Batch
Leakage flux fA/m2
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First Capacitor Batch
Leakage flux fA/m2
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First Capacitor Batch
Leakage flux fA/m2
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Leakage Flux vs. Voltage
Leakage flux vs. voltage for Cap_01242007
y = 4.3891e
0.2699x
10000
9000
leakage fA/um^2
8000
7000
6000
5000
4000
3000
2000
1000
0
0
5
10
15
20
25
30
voltage V
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Initial Conclusions
 Dielectric constant verified to be ~28
 Similar pattern in contour plots indicates systematic error
caused by stencil.
 Leakage flux variation caused by unknown factor.
 Only one wafer showed acceptable leakage flux levels at 10 V.
 Something is contaminating the films.
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Summary of experiments in quality control
History of Leakage Flux for 1 mm^2 Caps
(Circle area represents magnitude of 1 sigma)
3:26 hour process
2x2 DOE, 1 replicate
test grade wafers
400
Purple - 60 mA, 100V
Green - 20 mA, 100 V
Red - 120 mA, 115 V
Leakage (fA/um^2) @ 10 V
350
300
250
200
1:40 hour process
Final current < 0.40 mA
test grade wafers
test grade wafers
1:40 hour for 60 mA
3:35 hour for 120 mA
150
virgin prime wafers
new stencils
100
Coated stencil with Al
Difference between stencils
50
0
10/10/2006 10/30/2006 11/19/2006
12/9/2006
12/29/2006
1/18/2007
2/7/2007
2/27/2007
3/19/2007
Date
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Summary of experiments in quality control
History of Dielectric Constant for 1 mm^2 Caps
(Circle area represents magnitude of 1 sigma)
34
Purple - 60 mA, 100V
Green - 20 mA, 100 V
Red - 120 mA, 115 V
virgin prime wafers
new stencils
33
Dielectric Constant
32
31
1:40 hour process
Final current < 0.40 mA
test grade wafers
3:26 hour process
2x2 DOE, 1 replicate
test grade wafers
30
29
28
test grade wafers
1:40 hour for 60 mA
3:35 hour for 120 mA
27
10/10/2006 10/30/2006 11/19/2006 12/9/2006 12/29/2006 1/18/2007
2/7/2007
2/27/2007
Date
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Final Conclusions
 Doping level (10 ppb – 100 ppm?) contamination significantly
affects leakage flux and dielectric constant.
 Stay away from HCl vapors.
 Coat pallet with tantalum before sputtering product.
 Substrate quality affects dielectric constant.
 Iron contamination increases leakage flux and creates uniformity
issues.
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First Attempt at Applying to Pentacene OTFT
(transistor fabrication and characterization by Parul Dhagat)
Pentacene on SiO2
Pentacene on Ta2O5
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Interface characterization is important
 Free valence shells and surface roughness reduce field effect
mobility.
 Interface treatment with OTS (octaldecytrichlorosilane) can
improve pentacene transistor performance.
 Ellipsometry can help.
[Angst, David L.; Gary W. Simmons.Moisture Absorption
Characteristics of Organosiloxane Self-Assembled Monolayers.
Langmuir 1991, 7, 2236-2242.]
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OTS on Ta2O5
Model Based Approach




bare Ta2O5
bare Ta2O5
1 mM OTS
10 mM OTS
Literature reports high quality OTS monolayer to be ~25 Å thick.
Cauchy model used for monolayer.
Parameters for Ta2O5 held constant.
Reported thicknesses in Å
Oxide Thickness
2251.43
2251.43
2251.43
2251.43
var
1.88
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Cauchy
var
0
7.61
10.12
0.188
0.192
0.225
2-March-2007
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MSE
43.37
43.36
34.64
36.37
Note
Fit oxide only
Oxide held constant, Cauchy varied
Oxide held constant, Cauchy varied
Oxide held constant, Cauchy varied
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OTS on Ta2O5
fingerprint approach
RAS of OTS on SiO2


ots_si_20_12222006_s-pol
0.012
0.01
0.008
0.006
0.004
0.002
0
0
200
400
600
800
1000
1200
1400
1600
1800
1400
1600
1800
wavelength (nm)
ots_si_25_12222006_s-pol
0.012
0.01
moving average

RAS – Reflection Anisotropy
Spectroscopy
Requires bulk to be optically
isotropic
Requires interface to be
optically anisotropic
Technique rotates the sample
and measures change in
relectance for s-polarized light.
moving average data

0.008
0.006
0.004
0.002
0
0
200
400
600
800
1000
1200
wavelength (nm)
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Kinetics of Growth


Paper by Zhang, Macdonald, Sikora and Sikora, 1998 argues final
current limited by barrier field at interface, not by thickness of film.
Used phosphoric acid, 99.95% pure Ta rods, not in clean room.
High Field Model
Point Defect Model
Vs.
Zhang, Lei; Digby D. Macdonald;
Elzbieta Sikora; Janusz Sikora. On
the Kinetics of Growth of Anodic
Oxide Films. Journal of the
Electrochemical Society 1998, 145,
3.
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Pulsed Anodization
 Assume anode acts like diode impeding current flow.
 Use pulsed voltage to break interface barrier and pump more
current.
 Expect to increase film thickness and/or improve oxide
stoichiometry.
 Pulsed anodization controlled using relays and LabView
program.
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Research Plan
 Papers in progress
 Spectroscopic Ellipsometry of Anodized Tantalum
 High Performance Pentacene Transistors using Optimized
Anodized Tantalum Process (with Parul)
 Reflectance Anisotropy Spectroscopy of OTS on Anodized
Tantalum (with Parul)
 Physical and Electrical Film Uniformity of Anodized Tantalum Films
 Tantalum Pentoxide Capacitors using Pulsed Anodization
Visit: http://www.public.asu.edu/~jtrujil1
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Acknowledgements
The FDC group:
Dr. Gregory Raupp
Shawn O’Rourke
Curtis D. Moyer
Dirk Bottesch
Barry O’Brien
Edward Bawolek
Michael Marrs
Scott Ageno
Ke Long
Consuelo Romero
Diane Carrillo
Virginia Woolf
Susan Allen
Marilyn Kyler
Parul Dhagat
Hanna Heikkinen
Engineers at J. A. Woollam Co., Inc.:
Neha Singh
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Step Coverage
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Capacitor Damage
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More Displays
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