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The piezoelectronic transistor:
A nanoactuator-based post-CMOS
digital switch with high speed and
low power
Class: Bio MEMS Components and System
Teacher :Professor Hsu
Name: Po Yuan Cheng
ID: MA0R0204
1
Outline
• Abstract
• Transistor
• Principles of PET operation
• Simulation and modeling of PET
performance
• Summary and conclusion
2
Abstract
Moore’s law of transistor scaling, the exponential increase in
the number of complementary metal oxide semiconductor
(CMOS) transistors per unit area, continues unabated.
The development of a new digital switch,the piezoelectronic
transistor (PET), is designed to circumvent the speed and
power limitations of the CMOS transistor.
The PET functions by transducing an electrical gate signal
into acoustic form via a high performance relaxor piezoelectric
(PE) element. The acoustic signal then compresses a rareearth chalcogenide intermediate valence piezoresistive (PR)
element, which undergoes an insulator-to metal transition
driven by f-electron physics.
3
Transistor
The transistor is a solid state device components, it
has the advantages of small size, high efficiency, long
life and fast.
The current flowing into the transistor current is equal to the outflow transistor.
IE = IB+ IC
4
Piezoelectrics effect
Direct piezoelectric effect
The piezoelectric material when subjected to physical stress, the material body
of the electric dipole moment due to the compression becomes short, the
piezoelectric material to resist this change will produce the same amount of
positive and negative charge on the surface of the material opposite to intact .
Converes piezoelectric effect
When the electric field (voltage) is applied to the surface of the piezoelectric
material, the electric dipole moment in the electric field will be elongated, the
piezoelectric material to resist changes will be elongated along the direction of
the electric field.
5
Piezoresistive effect
•
The piezoresistive effect is used to describe the
change in resistance of the material subjected to
mechanical stress.
•
Unlike the piezoelectric effect, the piezoresistive
effect only produce a change in impedance does not
charge-generating.
6
Principles of PET operation
Expansion of the PE element results in
compression of the adjacent piezoresistive
element. For this to occur, the whole PET
stack needs to be vertically clamped within
a rigid structure made of a high yield
material (HYM), sketched in semitransparent form in Figure 1a .
The aspect ratio of the PR is plate-like (see
Figure 1a ), its thickness vertically being
less than its width. This facilitates
transmission of current in the vertical
direction, lowering the electrical resistance.
7
SmSe
The high piezoresistive response of rare-earth intermediate valence chalcogenide
compounds such as SmSe and Smx m Eu 1–x S arises as follows (see Figure 2 a).
In these materials, there is an empty
5d conduction band, an occupied 4p
valence band, and in the bandgap a
narrow, occupied, 4f band derived from
the j = 5/2 4f subshell.
Under pressure (see Figure 2b ), the
energy gap E g between the filed 4f
band and the empty 5d conduction band
narrows, allowing the 4f electrons to be
thermally promoted into the 5d
conduction band.
8
Simulation and modeling(1/1)
A very simple piezoelectric logic circuit is the inverter; Figure 4a shows a chain of three
inverters.
With the input low (at ground, zero, potential), the lower PET is off, the upper PET on,
then the output is high (at the line voltage V DD ). With the input high, the upper PET is
off, the lower PET is on, and the output is low. Changing the input from low to high
changes the output from high to low
In Figure 4b , we show the results of the simulation of a chain of nine PET inverters. For
each geometry, lower voltage operation leads to lower operating frequency, f (as in
CMOS).
9
Simulation and modeling(1/2)
• However, at line voltages between 0.1 V and 0.2 V,
PETs are capable of sustaining multi-GHz clock
speeds—this is not achievable with CMOS, where line
voltages V DD below about 1 V lead to a dramatic
slowing down/an inadequate ON/OFF ratio.
• These simulations show that satisfaction of the
desired engineering goal of low power combined with
high speed by piezoelectronics is within sight.
10
Summary and conclusion(1/1)
• The challenge to the information technology (IT)
industry posed by the end of complementary metal
oxide semiconductor (CMOS) voltage scaling in 2003,
resulting in freezing of processor clock speed, can
only be met by a computer switching device based on
a novel principle.
• The piezoelectronic transistor (PET) computer switch
that we have proposed is found by modeling and
simulation to have an adequate ON/OFF ratio,
significant gain, and high speed both in terms of the
sound transmission time and the resistancecapacitance (RC) time.
11
Summary and conclusion(1/2)
• Simulations based on properties of known
materials show that the device can
operate at very low voltages on the order
of 0.1 V at very high multi-GHz clock
speeds.
12
• Thank you for your attention
13