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DEPFET Sensor – a Status Report
L. Andricek, P.Fischer, G.Lutz, R.H.Richter, M.Schumacher, M.Trimpl, J.Ulrici, N.Wermes
MPI Munich (HLL) and Bonn University
o
o
o
DEP(leted)F(ield)E(ffect)T(ransistor) operation
principles
DEPFET prototype run
o Technology and design
Wafer thinning
o Concept, first results
ECFA/DESY LC Workshop, Prague, November, 16., 2002
Ladislav Andricek, MPI Halbleiterlabor
DEPFET Sensor
- Principle of operation (e.g.JFET) radiation
top gate
n+
p+
p-channel
internal gate
+
bulk
p+
n+
potential via axis
top-gate / rear contact
55Fe-spectrum
@ 300K
single pixel
~1mm
n
-- -+
-
drain
Ka
6000
+
-+
~300 mm
totally depleted
n--substrate
5000
potential minimum
for electrons
4000
# Zähler
source
p+
3000
2000
rear contact
Escape - Peak
V
Kb
1000
Advantages: Amplification of the charge at the position of collection
=> no transfer loss
Full bulk sensitivity
Non structured thin entrance window (backside)
Very low input capacitance => very low noise
ECFA/DESY LC Workshop, Prague, November, 16., 2002
0
2
4
6
Energie [keV]
ENC = 4.8 +/- 0.1 e-
Ladislav Andricek, MPI Halbleiterlabor
DEPFET Sensor
- linear MOSFET for small pixel -
MOS transistor instead of JFET
A pixel size of ca. 20 x 20 µm² is
achievable using 3µm minimum
feature size.
ECFA/DESY LC Workshop, Prague, November, 16., 2002
Ladislav Andricek, MPI Halbleiterlabor
DEPFET Matrix
- Principle of operation -
switch on row
&
common source readout
ECFA/DESY LC Workshop, Prague, November, 16., 2002
clear internal gate
Ladislav Andricek, MPI Halbleiterlabor
DEPFET Sensor
- Technology Development Self aligned double poly / double aluminium process
on high ohmic n- substrate
Pre-test diodes
along p-channel
ECFA/DESY LC Workshop, Prague, November, 16., 2002
IBulk =100pA/cm2
-> like in old technology
Ladislav Andricek, MPI Halbleiterlabor
DEPFET Sensor
- Layout -
•
2 pixels
30 x 30 µm²
•
DEPFET
L = 5 µm
W = 18 µm
 reduce the required read out speed
by 2
doubles the number of read out
channels
ECFA/DESY LC Workshop, Prague, November, 16., 2002
Ladislav Andricek, MPI Halbleiterlabor
DEPFET Sensor
- prototyping/current production status N-side view with two polysilicon layers
and contact openings
Many test arrays on a 6“ Wafer
- Circular and linear DEPFETS
up to 128 x 128 pixels
minimum pixel size about 30 x 30 µm²
1 Pixel cell
Drain
Gate
- variety of special test structures
Still to do:
- P-side processing
- Metallization
Expected to be finished:
Spring 2003
Clear
Clear
gate
Source
ECFA/DESY LC Workshop, Prague, November, 16., 2002
Ladislav Andricek, MPI Halbleiterlabor
Processing thin detectors
- the Idea -
ECFA/DESY LC Workshop, Prague, November, 16., 2002
Ladislav Andricek, MPI Halbleiterlabor
Processing thin detectors
- Wafer bonding 10 “SOI” Wafer prepared by
MPI für Microstrukturphysik, Halle
≈1 cm/sec
Q.-Y. Tong and U. Gösele “ Semiconductor Wafer Bonding ”
John Wiley & Sons, Inc.
ECFA/DESY LC Workshop, Prague, November, 16., 2002
picture from: www.mpi-halle.mpg.de
Ladislav Andricek, MPI Halbleiterlabor
Processing thin detectors
- anisotropic wet etching Hydroxide etching of silicon:
ECFA/DESY LC Workshop, Prague, November, 16., 2002
KOH, NaOH, … , TMAH: (CH3)4 NOH
Ladislav Andricek, MPI Halbleiterlabor
Processing thin detectors
- first tests Handle Wafer: n-type, 1-100 Ohm.cm, (100), thickness 283 - 297 micron
Top Wafer:
n-type, 1-3 kOhm.cm, (100)
*
*
*
*
BOX layer: Oxide 245 nm
wafer bonding
annealing for 4 hours at 1050 ºC to 900 ºC.
grinding and polishing of device wafer (Sico)
After bonding, thinning, and polishing top layer thickness:
24 - 29 micron (3 Wafer)
36 - 38 micron (3 Wafer)
43 - 47 micron (4 Wafer)
ECFA/DESY LC Workshop, Prague, November, 16., 2002
Ladislav Andricek, MPI Halbleiterlabor
Processing thin detectors
- first test mask / KOH etching at CiS Processing at CiS (5 wafer):
*deposition of 60nm Si3N4 masking layer on SiO2
*Dry etching of the windows, open oxide layer
*KOH etching at 80 ºC
*remove nitride layer
50x13 mm2 (tesla/2, one supporting bar)
(50x13)/2 mm2 (3 supporting bars)
80x10.4 mm2 (80% of tesla sensor)
6.5x6.5 mm2
(50x13)/4 mm2 (7 supporting bars)
ECFA/DESY LC Workshop, Prague, November, 16., 2002
drawbacks of KOH etching:
1.) poor selectivity to oxide -> nitride mask
2.) poor selectivity to Al
3.) alkali ions –> not CMOS compatible
Ladislav Andricek, MPI Halbleiterlabor
Processing thin detectors
- distortions #1
#2
#3
#4
#5
Total (μm)
330
342
335
343
345
Top wafer (μm)
26
38
41
51
51
26 μm
ECFA/DESY LC Workshop, Prague, November, 16., 2002
51 μm
Ladislav Andricek, MPI Halbleiterlabor
Processing thin detectors
- first test mask / TMAH etching at HLL Tetra-Methyl-Ammonium-Hydroxide
good selectivity to oxide
almost perfect selectivity to Al
no alkali ions
poorer selectivity to (111) (≈30:1)
rough surface after etching (hillocks)
Etch solution:
5 wt.% TMAH
1.6 wt.% dissolved silicon
0.4 wt.% (NH4)2S2O8
forms a passivation layer on Aluminium pads:
}
Aluminium-oxide
{ Aluminium
silcates
-> at 80 ºC
ECFA/DESY LC Workshop, Prague, November, 16., 2002
Ladislav Andricek, MPI Halbleiterlabor
Processing thin detectors
- TMAH etching at HLL/ results -
etch rate (100): ≈35 μm/h
etch rate of Al, wet SiO2: < 1 nm!!
ATLAS Pixel Detector
(Al on 500 nm SiO2)
after 10 h at 80 ºC
on ≈40 μm thick Silicon
ECFA/DESY LC Workshop, Prague, November, 16., 2002
Ladislav Andricek, MPI Halbleiterlabor
Processing thin detectors
- next steps / status Diodes on thin silicon:
* test bondability of implanted oxide
*electrical performance of diodes on thin silicon
* process evaluation and more mechanical test
unstructured n+ on top
structured p+ in bond region
Device Wafer
Handle Wafer
structured p+ on top
unstructured n+ in bond region
ECFA/DESY LC Workshop, Prague, November, 16., 2002
Ladislav Andricek, MPI Halbleiterlabor
Processing thin detectors
- next steps / status -
p+ diodes on top:
simplified standard technology
white areas are thinned to 50 μm after processing
p+ diodes in bond region
ECFA/DESY LC Workshop, Prague, November, 16., 2002
Ladislav Andricek, MPI Halbleiterlabor
Processing thin detectors
- next steps / status Bonded wafers (structured implant in BOX):
Bonding possible, but some voids after annealing!
-> improve surface condition before bonding
infrared transmission pictures from MPI Halle (M. Reiche)
ECFA/DESY LC Workshop, Prague, November, 16., 2002
Ladislav Andricek, MPI Halbleiterlabor
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