Download lecture8 - Clarkson University

EE365
Adv. Digital Circuit Design
Clarkson University
Lecture #8
Buffers, Drivers, Encoders, MUXs & XORs
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Buffers
Drivers
Encoders
Multiplexers
Exclusive OR Gates
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Three-state buffers
• Output = LOW, HIGH, or Hi-Z.
• Can tie multiple outputs together, if at
most one at a time is driven.
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Different flavors
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Timing considerations
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Three-state
drivers
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Driver
application
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Three-state
transceiver
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Transceiver
application
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Encoders vs. Decoders
Decoder
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Encoder
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Binary encoders
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Need priority in most
applications
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8-input priority encoder
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Priority-encoder logic
equations
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74x148 8-input priority encoder
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Active-low I/O
Enable Input
“Got Something”
Enable Output
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74x148
circuit
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74x148 Truth Table
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In Class Practice Problem
Write the truth table for a 4-to-2 encoder:
• No enables
• Active High inputs and outputs
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In Class Practice Problem
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Cascading
priority
encoders
• 32-input
priority encoder
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Constant expressions
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Outputs
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Alternative formulation
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• WHEN is very natural for priority function
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Multiplexers
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74x151
8-input
multiplexer
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74x151 truth table
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CMOS transmission gates
• 2-input
multiplexer
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Other multiplexer varieties
• 2-input, 4-bit-wide
– 74x157
• 4-input, 2-bit-wide
– 74x153
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In Class Practice Problem
Write the truth table for a 1-to-4 line
Multiplexer:
• No enables
• Active High inputs and outputs
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In Class Practice Problem
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Barrel shifter design example
• n data inputs, n data outputs
• Control inputs specify number of
positions to rotate or shift data inputs
• Example: n = 16
– DIN[15:0], DOUT[15:0], S[3:0] (shift
amount)
• Many possible solutions, all based on
multiplexers
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16 16-to-1
MUXs
16-to-1 mux =
2 x 74x151
8-to-1 mux
+ NAND gate
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4 16-bit 2-to-1 MUXs
16-bit 2-to-1 mux = 4 x 74x157 4-bit 2-to-1 mux
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Properties of different
approaches
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2-input XOR gates
• Like an OR gate, but excludes the case
where both inputs are 1.
• XNOR: complement of XOR
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XOR and XNOR symbols
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Gate-level XOR circuits
• No direct realization with just a few
transistors.
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CMOS XOR with transmission gates
IF B==1 THEN Z = !A;
ELSE Z = A;
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Multi-input XOR
• Sum modulo 2
• Parity computation
• Used to generate and check parity bits in
computer systems.
– Detects any single-bit error
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Parity tree
• Faster with balanced tree structure
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Next time
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Lect #8
Comparators
Adders
Multipliers
Read-only memories (ROMs)
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