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Where we are going:
741 Op-Amp
Source Degeneration
Vout
Vout
Why do this?
• Higher Linearity
• Possible Stability
Vin
Vin
GND
Circuit
Element
GND
Why not do this? gm
• Lower Bandwidth
• Higher Noise / Df
Source Degeneration
Vout
Vout
Neglect VA of Q1 and assume matched devices:
I
Vin
Vin
I = Ieo e
V1
GND
Q1
GND
V1 /UT
= Ieo e
(Vin - V1 + Vout/Av )/UT
2 V1 = Vin + Vout / Av
I = Ieo e
(Vin + Vout/Av )/(2 UT)
A similar result for MOSFETs
Common Emitter
Common Emitter / Common Source
Vdd
Ibias
Amplifies the input signal at the output
100mA
Vout
Vin
Assuming an ideal current source:
Ibias = Ico e
Vin/UT
e
Vout /VA
Vout = -VA ln(Ibias/Ico) + - (k VA / UT) Vin
GND
Common Drain
Vdd
Amplifies the input signal at the output
100pA
Ibias
Vout
Vin
Ibias = Ibias e
kDVin/UT
e
DVout/VA
DVout = - (k VA / UT) DVin
GND
Input conductance = 0
Common Drain
We must account for the other current source:
Vdd
Vb
M6
Ibias
Vout
Vin
M7
GND
-DVout/V
Ap
Id = Ibias e
kDVin/UT DVout/VAn
= Ibias e
e
DVout = - (k (VAn // VAp) UT) DVin
Common-Drain: Amplifier
Measurements
Vdd
V1
M6
Ibias
Vout
Mb
GND
M7
GND
Common Drain
What about above-threshold operation:
Vdd
Operating region decreases (Vout > Vin - VT)
100mA
Derive using quadratic functions:
Ibias
Vout
Ibias = (K/2) ( Vin - VT )2 (1 + (Vout/VA) )
Vin
GND
Vout = VA(
- 1)
Amplifies the input signal at the output
Common E / S: Resistive Load
High-Gain Amplifier Experiments
Load-line Analysis
Common Base
Common Base / Common Gate
Vdd
Amplifies the input signal at the output (non-inverting gain)
Ibias
100mA
Vout
Vb
Vin
Assuming an ideal current source:
Ibias = Ico e
(Vb -Vin )/UT
e
Vout /VA
Vout = -VA ln(Ibias/Ico) + (VA / UT) Vin
- (VA / UT) Vb
Gain = VA / UT = Av
Common Gate
Vdd
Using a subthreshold MOSFET :
100pA
Ibias
Vout
Ibias = Io e
(kVb -Vin )/UT
e
Vout /VA
Vout = -VA ln(Ibias/Io) + (VA / UT) Vin
- (k VA / UT) Vb
Vb
Vin
Gain = VA / UT = Av
Problem: Large input current
Common G: Resistive Load
Cascode Circuits
Use a common-gate/base transistor to:
1. Improve the output resistance of another transistor.
2. Reduce the Gate-to-Drain capacitance effect
of another transistor.
Vdrain
Input resistance of common-gate is low
Source is nearly fixed
if connected to the
drain of a transistor
Vin
V1
Vgate
GND
Cascode Circuits
Vdrain
Vdrain
Vbias
Vgate
GND
V1
Vgate
Idrain = Io e
GND
(kVbias -V1 )/UT
kVgate/UT
e
kVbias /VA
e
Vdrain / (Av VA )
Vdrain /VA
Idrain = Io e
e
kVgate/UT V1 /VA
= Io e
e
V1 ~ kVbias - kVgate + (UT/VA) Vdrain
Drain is fixed
Fixes the voltage at V1 or isolates V1 from the output
Cascode Common-Drain Amp
Vdd
One Pole
V1
biasp
Ibias
Mb
GND
Vout
biasn
Vb
GND
High
Output
Resistance /
DC Gain
BJT Cascode Configuration
MOS Cascode Circuit
BJT - CMOS Cascode Circuits
Preserve High-gm/I
Cascade Configurations
Cascade Connection: Rout
BJT-MOS Cascades
A good way to get zero base current….
Cascades: More stuff