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Status of the HCAL HV_LED_DAC control signal
distribution board
A. Konoplyannikov, M. Soldatov, V. Yakimchuk
1. Introduction.
2. HV_LED_DAC board block diagram.
3. Board Specification.
4. Explanation of the mezzanine cards functionality
5. PCBs layout.
6. Programming algorithm.
7. Planning.
22.04.04
Mikhail Soldatov
1
Status of the HCAL HV_LED_DAC control signal
distribution board
Introduction
The HCAL HV_LED_DAC control signal distribution board is under development in
IHEP now. The main aim of the board is to generate the analog control signals for
the CW bases and the LED drivers. The power stabilizing and a power current
overload protection are implemented on the board too.
The control signal distribution board consists of the mother board and four
types of the mezzanine cards:
1. SPECS slave for interconnection with the LHCb ECS system.
2. Control Logic board for interface between the SPECS slave and others
functional parts of Distribution board.
3. 40 channels HV control signal generation card.
4. 16 channels LED control signal generation card.
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Mikhail Soldatov
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Status of the HCAL HV_LED_DAC control signal
distribution board
In
Mez_HV
Mez
SPECS-SLAVE
ADC
Out
Power
Supply
(voltage
stabilizers
)
CL Mez
FPGA
40 Control lines for HV setting-2 of 40 pin connectors
Mez_HV
40 Control lines for HV setting-2 of 40 pin connectors
Mez_HV
40 Control lines for HV setting-2 of 40 pin connectors
Mez_HV
40 Control lines for HV setting-2 of 40 pin connectors
Mez_HV
40 Control lines for HV setting-2 of 40 pin connectors
Mez_LED
16 Control lines for LED-drivers-8 of 10 pin connectors
7 of
+100V protect
Protect circuits
+100V
Distribution board block diagram
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Mikhail Soldatov
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Status of the HCAL HV_LED_DAC control signal
distribution board
The board specification:
Outputs
• 200 outputs for the CW base control voltage distribution in range from 0 to
4.5 V with 12 bit precision.
• 16 outputs for the LED intensity control signal distribution in range from – 5
V to -12 V with 12 bit precision.
• 7 outputs of the stabilized LV and +100 V power supplies for feeding the 7
groups of the CW base.
Inputs
•SPECS bus with optocoupler for interconnection with ECS.
•Power lines from external power supplies.
Board dimension is about 200x350 mm2.
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Mikhail Soldatov
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Status of the HCAL HV_LED_DAC control signal
distribution board
Control Logic (CL) mezzanine board.
The board is used as an interface between the SPECS slave parallel port and the
serial ports of another mezzanine boards for the data and control signals
management. An ALTERA FPGA (ACEX1K) with a configuration memory EPC2LC20
are used now.
High Voltage (HV) mezzanine card.
This card includes the 40 DAC ICs with a control circuits for writing data and 40
inputs analog multiplexer for a back readout of the CW base control signal value.
Two 40 pins (IDCC type) connectors for flat cable are used for the control signal
distribution.
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Mikhail Soldatov
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Status of the HCAL HV_LED_DAC control signal
distribution board
LED control signal distribution mezzanine card.
There are two versions of the LED mezzanine card for two LED driver options. One LED
driver circuitry was designed few years ago for HCAL application and other one,
hopefully common for ECAL and HCAL is under design now. The card equipped with the
16 DAC ICs and the control circuits for writing data. A 16 inputs analog multiplexer for a
back readout of the LED control signal value is used. Eight 10 pins (IDCC type)
connectors for flat cable are used for the LED control signal distribution.
Mother board.
The low voltage regulators and current overload protection circuits are placed on the
mother board.
22.04.04
Mikhail Soldatov
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Status of the HCAL HV_LED_DAC control signal
distribution board
PCBs layout.
LED_DAC mezzanine card printed circuit layout.
Control Logic mezzanine card view.
HV_DAC mezzanine card printed circuit layout.
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Status of the HCAL HV_LED_DAC control signal
distribution board
Programming algorithm.
WRITE DATA
The SPECS slave parallel bus is used for writing the control signal values in to the
DACs. The command sequence is:
•Write DAC(i) address <7:0>,
•Write DAC(i) value <11:0>.
READ DATA
The SPECS 12 bits DU2-ADC (channel 0) is used for an analog output value
conversion and back readout. The command sequence is:
• Write DAC(i) address <7:0> through the SPECS parallel bus,
• Start ADC conversion trough the SPECS internal I2C bus,
• Read ADC trough the SPECS internal bus.
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Mikhail Soldatov
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Status of the HCAL HV_LED_DAC control signal
distribution board
Planning.
• Four mezzanine cards of the HCAL HV_LED_DAC control signal distribution
board have been developed. The last one – Mother board is under design now.
• The printed circuits board prototype production is foreseen in May of 2004.
• First test of the board is planning in Jun, when the SPECS slave mezzanine
board will be available.
• We are going to use this prototype card in the beam tests at the end of
summer of 2004.
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Mikhail Soldatov
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