Download Cellular & PCS Technology - Lyle School of Engineering

Digital Multiplexing and
Channel Banks
Southern Methodist University
EETS8320
Fall 2005
Lecture 6
Slides only. (No notes.)
Page 1
©1996-2005, R.Levine
Multiplexing
• Voice frequency conversations are multiplexed in
traditional telephone transmission systems via
– Frequency Division Multiplexing (FDM). - Historical system
– Time Division Multiplexing (TDM), combined with digital coding
of the voice signals. -Now the dominant method
• Analog FDM is very similar to radio broadcasting
(although via wires and not via an antenna)
– FDM is used in almost all radio systems, sometimes combined
with TDMA, CDMA, etc.
» Only radio exception to FDMA is pulse position modulation (PPM) also called
“ultra wide band,”, a recent proposal for radio purposes
– Each voice signal is instantaneously modulated onto a distinct
frequency sine wave for analog FDM
– Typically 12 distinct modulated carrier frequencies are added
and transmitted via the same wires in telephone FDM systems
– Each voice signal has a pre-designated frequency receiver
• FDM was the only telephone multiplexing
technology used until 1961
Page 2
©1996-2005, R.Levine
FDM Analog Telephone Carrier
• Feasible with hardware available in 1920s.
– Derived from radio communication techniques
– FDM reached a high state of technical refinement
– Single Side Band (SSB) analog amplitude modulation (AM)
(invented and analyzed by J.R. Carson) is the most
spectrum-efficient method of modulation, using only about
4 kHz bandwidth per telephone voice channel
» SSB still used extensively in military and amateur radio
– Second and third order FDM systems hierarchy were then
used to multiplex the lower order multiplex groups for
more channels per link. Microwave and co-ax cable used
FDM extensively in this way.
– FDM installations declined after 1960s, replaced by digital
multiplexing
– Digital technology, although understood theoretically in
1930s, was not economically feasible until transistors and
integrated circuits were developed as well
Page 3
©1996-2005, R.Levine
FDM Disadvantages
• Basic limitations of analog amplifier noise and
distortion were still present
• Longer transmission distance requires more
amplifiers. More amplifiers produces more audio
noise and distortion
• Negative Feedback design, based on the invention of
H.S.Black, produces a low distortion, low noise, (high
fidelity) amplifier. The noise and distortion is lower but
not eliminated!
• Although highly refined in design, analog hardware
was still relatively costly to make, install, adjust…
– With today’s integrated circuit technology, it could be improved
further, (examine a cellular radio unit, for example, which uses
similar analog RF technology), but would not be quite as compact
and low cost as equivalent functionality using digital multiplexing
Page 4
©1996-2005, R.Levine
Digital Multiplexing
• T-1, developed in 1961, quickly displaced FDM
• An almost ideal new product:
– Better speech quality than analog FDM
– 24 channels; double the capacity of predecessor 12 channel
analog N-carrier
» Direct replacement for 2 N-carrier links
– Installed cost about equal to N-carrier (thus half the cost per
channel)
» Cost has since reduced even further due to use of
integrated circuits, etc.
– Little or no field adjustment, calibration, etc. (low maintenance
costs)
• Most new products are not simultaneously better in
price and quality, or may have backward compatibility
problems
Page 5
©1996-2005, R.Levine
Advantages of Digital Systems and Digital TDM
•
•
•
•
The error due to digital coding and transmission in a properly
functioning system can be controlled (and made very small) by the
designer
The quantizing or coding error arising from encoding “round off”
should be the only practical error in a properly functioning system
In a properly designed system, the difference in signal value
(voltage, phase, etc..) for two distinct digital symbols is chosen to be
much larger than any expected but undesired “noise” and
“interference”
Practical bit error rate (BER) in a good telephone system is ~10-14
– At 50 Mb/s, one bit error occurs per 555.5 hours (23.15 days) on average
•
Certain processing is more feasible when the signal is represented
in digital form
– Digital Signal Processing (DSP), including logical processes
– Encryption (where required) is simpler
– Transmission of digital data and digitally coded speech should, in
principle, permit less costly shared facilities (I.e., no modems needed)
» This is one of the motivations for ISDN, although the promised cost
savings over modem use is not fully realized with present-day ISDN
Page 6
©1996-2005, R.Levine
Digital Telephone Systems
• Speech quality is equally good regardless of
geographical distance
– Delay, and thus possibly echo, is the only negative consequence of
distance, and echo can be very effectively reduced to a negligible
level via echo-canceling equipment
– Equipment is superior to analog transmission for several reasons:
» Lower initial capital and recurring (maintenance) costs
» Very compact, high capacity per wire or fiber
• “Cross-Fertilization” benefits from other digital
technologies:
– Digital switching
– Computers
– Data communications
…all use similar technology, sometimes the exact same parts (e.g.
memory, logic gates, etc.), leading to economy of scale. Design and
development cost is amortized over a large quantity production.
Page 7
©1996-2005, R.Levine
Mild Disadvantages of Digital Systems
• More complexity, more components than some cases
of corresponding analog systems
– Not economically feasible historically with vacuum tube hardware
– Integrated circuits make this a much less significant disadvantage
• A digitally coded representation of a waveform may
require more bandwidth for transmission than the
original analog waveform
Transmission signal bandwidth is less important for wire/cable/fiber
transmission than for radio transmission
Use of a sophisticated encoding process can reduce this problem in
some cases...
For example, several low bit rate speech coders (8 kb/s or less) use
less radio bandwidth for cellular and PCS radio than the
corresponding analog FM radio signal, and produce similar
perceived speech quality
Page 8
©1996-2005, R.Levine
T-1 and E-1 Use Digital
Waveform Coding
• Waveform coding is the first step in all types of speech
coding
• Waveform coding allows digital transmission of signals
that must preserve the desired waveform, such as
MODEM signals
• Waveform coding typically produces the largest
number of bits/second
• More complex and sophisticated coding methods
reduce the bit rate
– Some waveform coding methods such as Delta modulation
exploit waveform continuity
– Some methods produce good encoding of the audio frequency
power spectrum, but don’t preserve the waveform. OK for voice
purposes.
Page 9
©1996-2005, R.Levine
Digital Coding of A Waveform
Two Major Issues:
• Required number of time samples/second
• Required number and distribution of
amplitude (voltage) samples
We will consider these issues in that order…
– How many samples per second are required to avoid
missing a short-time-duration “wiggle” in the waveform?
– How closely spaced must the amplitude quantizing levels
be to achieve a particular accuracy goal?
» One goal: hold the ratio of signal to quantizing noise
below a specific level.
Page 10
©1996-2005, R.Levine
Telephone Voice Bandwidth Previously
Standardized
• Result of FDM design studies in 1920s and 1930s
– 3.5 kHz upper frequency, approximately 300 Hz lower frequency.
(using 3 dB “half power” points to define bandwidth)
– Lowest frequency is nominally 300 Hz.
• Not “high fidelity,” which requires 15 kHz to 20 kHz
audio bandwidth, and low frequency response down to
20 or 30 Hz.
• Inadequate to recognize some isolated phoneme
sounds without benefit of known language context
– Examples: f, s, sh, th (so-called fricatives) are sometimes
confused
– Spelling (names of alphabetic characters) b, d, t, even v etc. are
sometimes confused
» Requires “phonetic alphabet” for spoken spelling, like
ICAO*: Alpha, Bravo, Charlie, Delta, Echo, Foxtrot,…
*ICAO=International Civil Aviation Organization
Page 11
©1996-2005, R.Levine
Empirical Telephone Bandwidth
• The nominal 3.5 kHz bandwidth for telephone voice
connections was established by simple empirical
testing in 1920s:
– Human subjects listened to recordings of connected speech
statements in their own language
– Various samples were low-pass filtered with upper “cutoff”
frequency adjusted
– Percentage of incorrectly perceived samples was examined vs.
cutoff frequency
– Bandwidth which permitted ~99.9% accurate perception was
used
– Incidentally, narrower 2 kHz bandwidths giving only 75%
accuracy were used temporarily during World War 2 to increase
link capacities.
• Different low frequency cutoffs (300, 500, 800 Hz) affect
naturalness (“presence”) of speech, but have little effect on
accuracy of understanding.
• Existing telephone hardware causes ~300 Hz lower frequency
cutoff, primarily from coupling transformers in subscriber
loop and microphone/earphone limitations.
Page 12
©1996-2005, R.Levine
Why use the Narrowest Bandwidth?
• Narrower signal bandwidth permits “packing” more
individual channels into a fixed total bandwidth
– This is particularly important in analog FDM
– In digitally coded systems, less bit rate is needed to properly
code a narrow band signal (more later on this point)
• Engineers are usually required to build the most
economical system which meets quality requirements
(“Barely Adequate” system)
• Systems with higher quality requirements use greater
audio bandwidth:
– AM Broadcasting: 5 kHz (4.5 kHz in some countries)*
– FM Broadcasting: at least 15 kHz audio bandwidth
– Hi-Fi audio: 20 Hz lows and 20 kHz highs (Compact Disks)
* No standard on low audio frequency. Most AM broadcasts roll off at about 100 Hz.
Page 13
©1996-2005, R.Levine
The Nyquist* Sampling Theorem
• A band-limited waveform can be accurately
reconstructed if sampled at a rate greater than twice its
bandwidth.
– Example: a 4 kHz bandwidth signal must be sampled slightly
more than 8000 samples per second
» Exactly 8000 samples/sec would sample each 4000 Hz sine
wave component exactly twice per cycle.
• Theoretical truly band-limited signal has absolutely no
audio power above some upper frequency
– could be produced most practically by a test signal generator via
adding several sine waves
– “Real” band-limited voice signal is produced by low-pass
filtering a real speech source waveform. Power above 4 kHz is 30
dB below (1/1000 of) the “in-band” typical power
– Nyquist theorem does not consider amplitude quantization errors
*Published by Harry Nyquist of Bell Laboratories in 1930s. Nyquist did not
consider effects of digital quantization, but investigated a continuous accurate
representation of each sample with perfect error-free addition of samples.
Page 14
©1996-2005, R.Levine
Recall: waveforms can be analyzed into sine waves
1.5
1
0.5
d
0
0.5
1
1.5
0
Example
shows one
cycle (T=1
second) of a
square wave
and lowest
three
“harmonics,”
sine wave
components.
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
t
1.5
1
0.5
v1 ( t )
v3 ( t )
0
v5 ( t )
0.5
1
1.5
0
0.1
0.2
0.3
0.4
0.5
t
Page 15
©1996-2005, R.Levine
0.6
0.7
0.8
0.9
1
Fourier Analysis
• How big should each sine wave component be? What
is the appropriate multiplier bk for the k-th sine wave
• J.B.Fourier found in 18th century that the multiplier can
be found from the product integral
t T
2
2   k  t
bk   f (t )  sin(
)dt
T t 0
T
• This formula computes the “cross correlation”
coefficient between the sine wave and the square wave
f(t). This is the “area” on graph paper of the product
waveform from multiplying an appropriate frequency
sine wave together with the waveform to be analyzed.
• Because the sine wave and this particular example
square wave have the same so-called “odd symmetry”
we do not expect to find a cosine wave as well. In
general, for non-symmetric waveforms f(t), each
harmonic term comprises both a cosine and sine term.
Page 16
©1996-2005, R.Levine
Fourier Coefficients
• From the previous formula and this particular
square wave we find the first 5 coefficients:
k=1
k=2
k=3
k=4
k=5
B1=1.2732
B2=0
B3=0.4244
B4=0
B5=0.2546
• Note that even harmonics (k=2, 4,…) are all
zero. This is a special result for a “square”
wave. A triangular wave has non-zero even
harmonics, for example.
– Incidentally, when a non-linear distortion causes
peak flattening of a waveform, thus making it
appear more like a square wave, we quantitatively
measure this by measuring the amount of “odd
harmonics” power produced due to the flattening of
the peaks. This measurement is used extensively in
“high fidelity” equipment descriptions.
Page 17
©1996-2005, R.Levine
Approx. Square Wave Using First Three
Odd (1,3,5) Harmonics
1.5
1
1.0
0.5
v( t )
0
0.5
1.0
1
1.5
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
t
Proper amplitude of each “harmonic” sine wave was found from a product
integral formula (same as statistical cross correlation).
Page 18
©1996-2005, R.Levine
Example- I
• Consider a waveform like the approximate square wave made
of only 3 odd-multiple frequency harmonics
– The highest frequency sine wave in that example was at 5 times
the basic periodic frequency
– This synthetic waveform can be generated with “absolutely” no
power above a specified upper frequency limit
– A “filtered” real waveform has very little (but not zero) power
above a specified upper frequency limit
• If we can sample that highest sine wave frequently enough to
capture its amplitude and phase precisely, we can reproduce
it from the sample information
• Sampling exactly 2 times in a cycle is not quite enough, but
slightly more than 2 samples per cycle is OK
 t < t/2, where t =(1/fmax) is the period of the highest frequency
sine wave component.
• No problem to accurately represent lower frequency sine
wave components using this sampling rate
Page 19
©1996-2005, R.Levine
Example- II
t=T/5 one cycle of 5th harmonic
t/5=one cycle
Two sine waves: same frequency; different amplitude, phase
3
2
1
•
w( t )
0
•
q( t )
1
t=t/2
•
•
2
3
0
0.2
0.4
0.6
0.8
1
t
•Exactly 2 samples/cycle is ambiguous… which sine wave is it? This problem
is called “aliasing” since more than one sine wave (different amplitude and
phase) fit the same sample points.
Page 20
©1996-2005, R.Levine
Example- III
• More than 2 samples/cycle is unambiguous.
3
2
t<t/2
1
• •
w( t )
0
q( t )
•
1
•
2
3
0
0.2
0.4
0.6
t
Page 21
©1996-2005, R.Levine
0.8
1
Time-Domain Nyquist Rule
• In the time domain, the equivalent rule is that a waveform
consisting of sine waves can be measured at time intervals
of t and then accurately reconstructed if the waveform has
no significant “wiggles” (half-period sine wave components)
which are shorter than the t time interval.
– This requires examining the entire time history of the waveform,
in principle.
– But Fourier analysis of a waveform implies that we have
examined the entire time history to compute the integral
products used to evaluate the coefficients of the various sine
wave terms. When we know the amplitude and phase of all the
frequency components, we can “predict” the value of the sum of
all frequency components for any time.
– Therefore, the frequency domain statement of Nyquist’s rule
implies a complete (time history) examination of the waveform’s
properties.
– Furthermore, telephone engineers were already used to
measuring the “bandwidth” of audio signals.
Page 22
©1996-2005, R.Levine
Band-limited Signals
• Real filtered signals cannot have zero power over a
non-zero range of frequencies
– OK to have zero power at discrete individual frequencies. (for
example: the case of no even harmonic power for square waves)
• ITU-T and other telephone systems standards call for
the filter to reduce the audio power (above 4 kHz) to
approximately 30 dB below (that is 1/1000 of) the midband power level
• for example, see Bellamy (3rd Ed.): Digital Telephony,
page 97, Fig. 3.6. Precise limit is 28 dB below midband
audio level
– This implies that “noise power” from imperfect filtration will be of
a similar low magnitude
• Observe that the ITU curve is ~3dB below the 0dB
reference level at 3500 Hz frequency
– This “3 dB or half-power point” is one of several ways to
describe the bandwidth of a filter. It is easy to measure but not
fully descriptive.
Page 23
©1996-2005, R.Levine
Digital Multiplexer Processes
• Measure the voice waveform voltage to obtain
8000 samples per second
• Digitally encode this voltage into a binary
code value of 8 bits
– Original T-1 multiplexer used a time-shared analog-digital
converter
– Telephone systems use a non-uniform mapping from the
signal voltage to the binary code value
• Serially transmit 8 bits consecutively for each
such coded sample
– Insert extra” bit(s) in the transmitted bit stream for
synchronizing purposes
• De-multiplexer operations are substantially
the reverse of those listed here
Page 24
©1996-2005, R.Levine
Amplitude Quantization
• The most obvious initial approach to amplitude
quantization is to use uniform (“linear”*) voltage steps,
with enough steps to quantize the largest expected
amplitude into many small intervals
• This is done for musical compact disk (CD) digital
recording using 16 binary bits, corresponding to 65536
distinct fixed voltage levels. CD sampling rate is ~42+
ksamples/sec
• Uniform quantizing is the best encoding for signals
which will be processed via Digital Signal Processing
(DSP)
– Arithmetic adding, subtracting, etc. are straightforward
– Signals not already represented by uniform quantization must be
converted before DSP processing.
*Yet another special jargon meaning of the word “linear”
Page 25
©1996-2005, R.Levine
How many bits?
• 16 bits resolution is much better than is needed for
telephone purposes.
– Remember, the voice waveform has already been band-limited to
~3.5kHz bandwidth
– Filter imperfections add about -30 dB noise (so-called “foldover” noise)
– Carbon microphone is not high-fidelity
– Why bother with extra bits?? They cost more in hardware and
precision of design and manufacture, and in transmission cost.
• Empirical listener testing indicates about 12-13 bits of
uniform resolution is adequate
– No perception of degradation in telephone voice quality
• Logarithmically compressed (“companded”) steps at
low level permit equivalent quality with even less bits
(in fact, 8)
Page 26
©1996-2005, R.Levine
Quantizing Noise (Round off Error)
• Whenever the actual voltage falls between two
quantized amplitude steps, there is a round off error
(quantization error)
• The error waveform for a ramp quantized with uniform
steps is shown in Bellamy (3rd Ed.), p.100, Fig.3.9.
• The importance of a “mid-tread” vs. a “mid-riser”
quantizer design is more significant when large
quantizing steps are used.
– Mid-tread has zero output unless analog input exceeds voltage
step size, so background noise is suppressed, but produces
worse quantizing error at low voice levels.
– Mid-riser produces worse idle channel noise by increasing the
miniscule background room noise or circuit noise, but has less
average quantizing noise at low signal levels.
• Quantizing error can be characterized as an equivalent
additive quantizing “noise”
Page 27
©1996-2005, R.Levine
mid-tread
Quantizer
output
code value
Analog
voltage
mid-riser
code value
Analog
voltage
Quantizing Noise
• Unlike random additive noise (Gaussian noise),
quantizing noise is bounded by the voltage step value of
the least significant bit and has a simpler distribution of
amplitude
• Quantizing noise disappears during intervals of absolute
silence (zero analog input) for mid-tread quantizer
– For certain types of testing, artificial quantizing noise is
produced by instantaneously multiplying true random noise
by the instantaneous magnitude of the audio signal
– The special statistical properties of quantizing noise yield a
better signal-to-noise ratio than ordinary noise
– 56 kb/s V.90 data modems work beyond the theoretical
“Shannon limit” on their data rate because they are limited
by quantizing noise, not random (Gaussian) noise
Page 28
©1996-2005, R.Levine
Logarithmic Companding
• The human ear exhibits a phenomenon called “masking”:
– a noise signal is not perceived as objectionable unless it is
sufficiently large in relation to a desired sound present
simultaneously
– Small noises are objectionable in a quiet library
– The same small noise is imperceptible at a rock concert!
• This principle is the basis of noise reduction systems like the
Dolby™ system for sound recording
– The recording audio level is automatically increased for soft
passages
– The playback level is automatically reduced, to match, via an
auxiliary control signal, so desired signal has the original
loudness. In Dolby system, this is typically a low frequency
control signal.
– Therefore, noise added by the recording medium (e.g., magnetic
tape “hiss”) is not noticeable during “soft” music intervals
– Dolby systems treat different audio frequency bands separately
(high frequency is noisiest in magnetic tape), and use different
types of auxiliary signals (Dolby B, C, etc.)
Page 29
©1996-2005, R.Levine
Other Companding Stuff
• Analog FM radio of all types (broadcast, analog
cellular, specialized mobile radio -- SMR, etc.) uses
time-dependent amplitude companding to reduce
perceived audio background noise.
• Low amplitude speech is automatically increased in
power at the transmit end, reduced again at the
receiver
– No auxiliary time-varying control signal like Dolby’s is used, just
a uniform preset adjustment which “shrinks” the amplitude
scale before transmission and “stretches” the amplitude range
after reception and detection of the audio
– Syllabic companding in analog telephone systems (Bellamy, 3rd
Ed. p.116ff) is similar
• These systems have a specified time window to
compute average audio power (typically 5 to 10
milliseconds)
Page 30
©1996-2005, R.Levine
Logarithmic Instantaneous Companding
• Design objective is uniform ratio of
instantaneous signal to instantaneous
quantizing noise, over the range of expected
amplitudes
• Achieved by using approximately logarithmically
spaced quantizing intervals
– Quantizing error amplitude is proportional to the difference
between adjacent levels, and it is then in the same proportion
(call this ratio H) to the mid-level signal amplitude for each
level
– Power is proportional to the square of voltage amplitude, so a
fixed proportionality ratio (H2) holds between instantaneous
mid-quantizing-level power and quantizing noise
• A small practical problem: ideal logarithm is not
practical for v=0, since log(0) is negative infinity
Page 31
©1996-2005, R.Levine
Non-Uniform Amplitude Coding
• Mu (µ) Law used in North America and Japan
– In conjunction with T-1 primary rate multiplexing
• “A Law” used in other parts of the world
– In conjunction with E-1 primary rate multiplexing
• For international digital telephone voice or
modem connections, a digital code converter
is provided at the Mu-law end of the
international link.
– Each 8-bit sample is converted based typically on a lookup table
– For ISDN 64 kb/s end to end international data
connections, a special parameter used in the SS7 call
setup (IAM) message is used to ensure that no converter
is used for that particular call to avoid modifying the
binary data.
Page 32
©1996-2005, R.Levine
Practical Logarithmic
Companding- Coding
• Two methods to “shift” the logarithmic function:
– µ law: Shift to left so it goes through v=0 by adding a constant to
the analog voltage input
– A law: Shift up by adding a constant to the code value result,
then replace a small piece with a straight tangent line from the
origin to a pre-designated low voltage point
2
µ
A
1
code ( vo lt )
log(1) is zero
0
1
0
10
20
30
40
50
60
70
80
90
10 0
millivo lt
Practical peak voltage is ~1.55 V (corresponds to 2mW sine wave@600
Page 33
©1996-2005, R.Levine
CODEC Block Diagram
Sample time interval:
1/8000 sec or 125 µs
volts
volts
volts
3.5 kHz “cutoff”
ms
Analog Multiplier
ms
analog
input may
contain
some power
above 3.5
kHz
filtered
(smoothed)
analog
signal
(Pulse
Amplitude
ModulationPAM) signal
AnalogDigital
Converter
(A or law)
Low-pass Filters
Digital
output
(serial or
parallel)
Pulse Code
Modulation
(PCM)
8 kHz “clock”
pulse train
3.5 kHz “cutoff”
Sample and
Hold, or Pulse
Stretcher
(Boxcar)
Circuit
volts
analog
input
DigitalAnalog
Converter
(A or law)
volts
Digital
input
(serial or
parallel)
DECODER
01011010
v
ms
ms
Page 34
CODER
Example: 8 serial bits in 125 µs
©1996-2005, R.Levine
ms
Mathematical Mu (µ)-law Graph
negative voltage graph (not shown) is odd-symmetric replica of this, but
-127 code value is modified (explained later)
Decimal code value
127
Fraction of full scale
1
0
63
f(v) = ln(1+ (v/1.55))/ln(1+)
0.5
where = 255
0
0
ln is natural (base e =2.718)
logarithm, not decimal base.
Page 35
0
0.5
1
1.5
instantaneous positive voltage
©1996-2005, R.Levine
2
Mathematical A-law Graph
negative voltage graph (not shown) is odd-symmetric replica of this
Decimal code value
127
Fraction of full scale
1
f(v) = (1+ ln(A(v/1.55)))/(1+ln(A))
63
0.5
where A = 87.6
observe the straight line segment starting
here. Green color on color display
0
Page 36
0
0
0.5
1
1.5
instantaneous positive voltage
©1996-2005, R.Levine
2
T-1 (DS-1) TDM Frame
125 s or 1/8000 second
F
1 2 3
4
5
6
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
24 8-bit PCM samples per frame,
plus one framing bit per frame
One framing pulse
per frame
one time slot
bit label: 1 2 3
4
5 6
7 8
5.18 s/slot
8000 frames/s
193 bits/frame
1.544 Mbit/s bit rate
0.647 s/bit
Page 37
Except when common channel signaling
is used (in slot 24 of one link for control of
a group of links), bit 8 is “robbed” and replaced
by a signaling status bit in all slots during one
of 6 frames. Signaling synch is related to a 12
or 24 frame sequence established by the framing
bit pattern.
©1996-2005, R.Levine
E-1 (CEPT, MIC) Frame
125 s or 1/8000 second
0
1 2 3
4
5
6
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
32 8-bit time slots per frame,
normally 30 used for subscriber
PCM, two for synch and signals
one time slot
Slot zero contains
synchronizing
bit pattern and some
trouble-shooting
bit patterns.
8000 frames/s
256 bits/frame
2.048 Mbit/s bit rate
0.488 s/bit
Page 38
Slot 16 contains
common channel bit label: 1
signaling, either
channel associated
condition bits, or
CCS7
©1996-2005, R.Levine
2 3
4
5 6
3.9 s/slot
7 8
Important Facts
• Both µ-law and A-law coders use 8 bits for each sample
• For international calls, a “translation” via ROM table
look-up is done between A and µ (in the µ law country)
• When arithmetic operations must be done (for
example, for echo cancellation), the 8 bit code sample
must be converted into a 12 bit (or more) sample via a
look-up table or other means
• 16 bits (with ~12 bit accuracy) is also used
• Performing arithmetic directly on companded Mu or A
values would not be meaningful
– Not even a precise logarithmic value is used in the coding. The
result of adding is not the sum of two logarithms exactly
(although it is numerically close for large amplitude values)
Page 39
©1996-2005, R.Levine
Other Facts
• Both µ-law and A-law use a sign and magnitude
representation of the coded value
– Physical zero volts has two codes: +0 and -0
• Virtually all computers today use two’s-complement
coding instead to represent negative numbers
– Conversion from 8-bit telephonic PCM codes to 12-bit numeric
codes for DSP must correct for this as well
• µ-law intentionally modifies the largest negative coded
value to prevent occurrence of all-zero codes after bit
inversion occurs for line coding (to be explained). Alaw does not do this.
• In many transmission systems using µ-law, the 8th bit
is modified for signaling reasons (to be explained) in
some frames of data
Page 40
©1996-2005, R.Levine
Practical Companding
• The earliest 8-bit uniform Analog/Digital (A/D) converters
used in D1 version of T-1 systems used non-linear
instantaneous logarithmic companding.
– Companding was achieved using an analog non-linear amplifier
» Semiconductor diodes have reasonably accurate
logarithmic relationship between current and voltage over
part of their operating range. This was the technical basis of
logarithmic companding.
• In contrast, present T-1 and E-1 designs first perform ~13 bit
uniform A/D conversion, then produce a companded 8-bit
binary number by table lookup of an approximate µ-law (or Alaw) table. (Uniform A/D conversion may use Sigma-Delta
digitization.)
– This table represents many straight diagonal line segments
which approximate the smooth µ-law formula curve
Page 41
©1996-2005, R.Levine
Sign-magnitude vs. 2’s Complement
Signmagnitude
still used
in some
CDC, Cray,
Sun
supercomputers
Unsigned binary Unsigned value
8-bit value
decimal
00000000
00000001
00000010
rows omitted
01111111
10000000
10000001
rows omitted
This value
is not used in
µ-law voice
encoding.
Page 42
11111110
11111111
Two's
complement
value decimal
0
1
2
…
127
128
129
…
254
255
©1996-2005, R.Levine
0
1
2
…
127
-128
-127
…
-2
-1
Sign-magnitude
value decimal
0
1
2
…
127
-0
-1
…
-126
-127
Channel Banks, etc..
• The first digital telephone product was the T-1 Digital
Carrier (multiplexer)
– Developed at AT&T (now Lucent) Bell Labs, circa 1961
–
–
–
–
Time Division Multiplexing (TDM)
Digital coding of speech waveforms (Mu-law companding)
Connected to analog lines and switches as required
Steadily displaced analog multiplexers
• Digital switches directly using T-1 links
appeared in 1970s
– First AT&T ESS No.4 for transit switching
– Then many digital PBX switches (Rolm, etc..)
– Digital end office switches (Nortel DMS-10, DMS-100, etc.)
• Today digital transmission and switching
serve well over 99% of North American calls
Page 43
©1996-2005, R.Levine
Channel Bank
•Packaging: 24 channel service units (printed
wiring cards) abbreviated CSU (30 CSUs in E-1)
•Common module cards
•Power, line, trunk connections at back
Common (shared)
equipment: codecs,
power supply, bit
multiplexer/demux
Approx. 19in (490mm) standard “rack” width
Page 44
©1996-2005, R.Levine
Typical T-1 Installation
Channel Bank
4-wire
(2 pairs)
Repeater spacing
6000 ft. (1800 m)
of wire.
Some repeaters
omitted
from this figure.
Channel Bank
….
….
Repeater
Repeater
Repeater
Maximum span ~150 miles, due to timing requirements.
• Each channel bank supports 24 voice-grade circuits
• Repeaters regenerate “clean” digital pulses with corrected
timing, amplitude, pulse shape
• Repeaters are powered via -130 V dc from channel bank
units, using “phantom circuit” feed on both pairs.
• When last wire section is too short, a “line build-out” (LBO)
circuit pack is wired in to produce similar signal attenuation
and related effects.
– LBO consists of inductors, resistors, capacitors comprising circuit model
for “missing”wire section(s). See previous transmission line lectures.
• E-1 primary rate channel banks are similar, but have 30
traffic channels, 2000 m (6562 ft) repeater spacing.
Page 45
©1996-2005, R.Levine
Some CSU Types and Applications
• 4-wire (used for various trunks or data services)
– No signaling (except audio in-band tones)
– Various signaling supervision options (A-B bits, E&M, etc..)
– Digital data 56/64 kb/s (RS-232 or RS-449 connector)
• 2-wire (various applications)
– No signaling (except audio in-band tones)
– Supervision for one-way or both-way trunk line:
» Various types of supervision
» Operates like a telephone set (connect to CO)
• dc loop current on and off
• responds/passes on ringing voltage
» Operates like a CO switch (connect to tel set)1
• Provides loop battery, ringing
– A channel with previous two CSUs at opposite ends will extend a
subscriber telephone loop via a T-1 link channel.
1Requires optional
Page 46
special ringing power supply
©1996-2005, R.Levine
Channel Bank Applications
4-wire
• Trunk line between switches with signaling
• Private tie-line between switches or similar equipment
–
–
–
–
Standard Mu-law 24 channel link
48 channel link using ADPCM or other low bit-rate coding
Cellular link from MSC central switch to each cell
Lately, use of low bit-rate traffic channel coding (13 kb/s or less)
for cellular/PCS has led to use of specialized multiplexers rather
than standard channel banks.
2-wire
• Non-concentrating remote
– Provides “pair gain”-- 24 channels on 4 wires (with T-1 repeaters,
of course)
– Distinguish this from SLC-96 or similar remote concentrator
which has more telephone sets than channels
Page 47
©1996-2005, R.Levine
Digital Symbols
• Separate distinct signal voltage for each binary “bit”
– BIT is a contraction of “binary digit,” a term invented by pioneer
information theorist Claude Shannon
• Two (voltage) levels represent the two binary symbolic
values
– Most popular text symbols are 1 and 0 (also T,F; or H,L)
– Voltages are often 5 and 0.2 volts (TTL), or ~3 and 0.2 V in some
newer portable equipment (convenient for 3 V batteries), or 12
and 0.2 V in some older equipment.
– 0.2 V is often called zero. It is the natural “knee” voltage of many
electronic semiconductor junction devices at their practical
minimum voltage.
– Design objective is two voltage levels more separated than any
undesired voltages from interference, noise etc..
– In some (“active low”) designs, inverse mapping is used
between symbols and voltages. Not used in this course to
minimize confusion.
Page 48
©1996-2005, R.Levine
Parallel vs. Serial Binary
• Parallel: Every bit appears on a separate wire,
simultaneously
– Parallel processes require more hardware, but operation is
“faster” due to simultaneous activity.
– Successive parallel values require simultaneous change in all bit
signals. Difficult to hold parallel synchronism with many longdistance separate wire or fiber channels.
– All parallel signals must be reliable for good operation. Error in
one bit makes entire set of parallel bits unusable.
– Parallel format used mainly within one module or cabinet of
equipment for very short (< 1meter) transmission distance
• Serial: Every bit appears for a preset time interval, in
preset serial order, on one wire circuit.
– Serial processes are slower, but use less hardware
– Favored for all long distance (even a few meters) connections
• Shift Register device converts between Serial and
Parallel formats
Page 49
©1996-2005, R.Levine
Amplifier / Comparator
• A “differential” amplifier with sufficiently high
amplification suddenly “switches” from low to high
output when two input voltages are substantially equal.
vo
Graphic Symbol
v1
4V
voltage amplification=2
vo
v2
voltage amplification = 5000
Power supply and other
details omitted.
2
4V
v1-v2
A linear region amplifier of this type is often called an “Operational Amplifier.”
The high voltage output level may be 5 or 3 volts rather than 4 V shown here.
Several examples here use 4 V, a convenient but not representative number.
Page 50
©1996-2005, R.Levine
D/A Conversion
• Ladder network with sources for each bit
• Continuous (thick or thin film resistor) ladder-like
network
vo=4•[D1 + D2/2 + D4/4 + D8/8]
volts
4
0
Symbols D
D8
1
D4
• Voltage
D2
Amplification
is 2
0
D1
Non-standard
logic voltage
levels are used
for this example
D/A convertor is also
called a decoder
Parallel input Digital/Analog (D/A)
convertor -- highly simplified
Page 51
vo
©1996-2005, R.Levine
Graphic Symbols
• Analog/Digital and Digital/Analog convertor in one
package is often called a codec (derived from parts of
the words CODer DECoder)
• Some alphabetic labeling is used to make clear which
type of format conversion is represented (A-to-D, D-toA, etc.), to indicate serial vs. parallel input, output, etc.
Page 52
©1996-2005, R.Levine
A/D conversion
Many methods in use: each has different advantages and
disadvantages
– Most methods use a very high gain (operational) amplifier as a
comparator
1. Successive Approximation A/D converter
2. Ramp-clock converter
– Saw tooth or ramp waveform quickly and repeatedly scans from
minimum to maximum voltage.
– Associated digital clock starts for each scan
– Clock value is saved in a digital memory at time of match. This value
is proportional to measured match voltage.
3. Sigma-delta conversion
– One bit at a time incremental voltage change, converted at much
higher sample rate (e.g. 32 ksamples/sec) than the 8 kHz data value
sampling rate.
– Subsequent time integration of small 1-bit increments/decrements
– Discussed later with Delta Modulation and CVSD (not this lecture)
Page 53
©1996-2005, R.Levine
Successive Approximation A/D
• One stage of successive approximation coder or A/D
converter
+4V (logical 1)
voltage to be digitized
D8 D/A
D4
D2
D1
D8
D4
D2
D1
zero volts
(ground)
Page 54
D/A
comparator
D8 bit of
digital output
Each stage uses outputs of more
significant bits from previous stages.
First stage pulls up upper D bit and
grounds 7 other D bits. Then output
“average” (midpoint of 2 resistors)
will be at 2 volts. Comparator output
will be logical 1 (high) if voltage to be
digitized is >2 V, zero otherwise.
Second stage produces D4 result. It
uses D8 value from first stage to both
D/A D8 inputs. Upper D4 is pulled up.
All remaining 5 inputs are grounded.
Then “average” voltage is either 3V (if
D is hi) or 1V (if D is low).
Digital storage register (not shown)
stores the bits.
Can you draw all 4 stages with proper
connections?
©1996-2005, R.Levine
Ramp-clock A/D Convertor
signal
voltage
Note that sampling interval must be short
to ensure that measured voltage changes only
slightly during interval.
time
Match time detected by voltage comparator output change.
comparison
voltage
time
Sample time interval (125 µs for 8000 samples/sec in telephone systems)
Separate binary clock (not shown) counts from 0 to maximum, repeatedly
during each 125 µs interval. Max count for only positive voltage range typically
127. Counter value at instant of voltage match is the digital code value.
Page 55
©1996-2005, R.Levine
Synchronization, Signaling, Line Coding
• Some distinctive bit pattern is required to indicate the
beginning/end of the multiplexer serial binary frame
• For various reasons, different T-1 frame sequences
must also be identifiable
– Main reason: certain signaling bits appear only in certain frames
(one frame out of 6 consecutive frames)
– Secondary reason: use some framing bits for use as low bit rate
special channel (in Extended SuperFrame only)
– Another application is identification of frame groups which are
internally rearranged for ZBTSI line coding
• Several optional combinations of framing and line
coding are used for T-1.
– Line coding is the conversion of the digital pules from the
internal TTL levels (typically +5 or 0 volts) into different external
voltage levels such as +3, 0 and -3 volts.
– Only one line coding method, HDB3, is used for E-1.
Page 56
©1996-2005, R.Levine
Line Coding Criteria
• Digital bit stream waveform cannot have a long term dc
component (zero volt average value needed over long time
interval) -- because the digital waveform must “pass
through” coupling transformers and capacitors
• Sufficient non-zero pulses are needed to maintain repeater
synch (called zeros-density limitations)
– Component accuracy and temperature changes at the repeaters
require continual stream of pulses to hold synchronization
• For digitally coded voice, imperceptible amplitude errors are OK
– For voice, a seldom occurring error at negative voltage peaks of
extremely loud waveforms is tolerated
– Also occasional errors in least significant bit due to robbed-bit
signaling
• Impairment of digital data is not OK
– For data, digital binary errors are not tolerated
Page 57
©1996-2005, R.Levine
Voice vs. Data Criteria
• Voice should be free of substantial or perceptible error
– Perfection not required
• “In-band” or “in-slot” supervision bit “robbing” very
slightly affects waveform accuracy
– Verified subjectively non-objectionable via listening tests
• µ-law max-negative substitution affects only very
“loud” audio waveforms
– Verified subjectively non-objectionable via listening tests
• 56 or 64 kb/s data requires absolute accuracy
Two mechanisms available:
1. Out-of-slot (common channel) signaling
2. Line coding method which allows consecutive all zeros
– For only 1, restricted 64 or unrestricted 56 kb/s is OK
– For both 1&2: unrestricted 64kb/s or “Clear Channel”
Page 58
©1996-2005, R.Levine
Note: in radio
broadcasting
jargon, “Clear
Channel“ is a
carrier frequency
with no conflicting
licensees.
Effect of Negative Max Substitution
• Loud waveform, e.g. sine wave with +3 dBm power,
nominally hits both positive and negative peak coded
values
time
00000000
10000001
Several
negative
voltage
Codes not
shown
11111100
11111101
11111110
11111111
Page 59
Although signal voltage is actually at maximum
negative value, a code with magnitude 2 values
lower is substituted.
•
125 µs
•
•
This code would
produce 00000000
after bit inversion
•
•
•
•
©1996-2005, R.Levine
•
•
Historical T-1 Transmit (Tx) Processes
E-1 Differences:
• E-1 uses A-law
• E-1 does not substitute neg max value
• E-1 inverts alternate bits, not all bits
• E-1 uses HDB3 Line Coding
t
Hybrid
Coils
(if 2-wire
loop in
this chan.
Lowpass
3.5 kHz
Filter
Sample
(and
hold):
continuous to
PAM
Analog
Compression
(µ-law for
Analog
T-1)
Negative
Maximum
Substitute
(voice),
Invert all
Bits
Multiplex
with
other
channel
bits.
Digital
From receive
part of CSU.
Some CSU cards have special
signaling hardware.
Page 60
...
Common equipment card(s)
from other CSU
cards
©1996-2005, R.Levine
AMI
Line
Coding
Recent Redesigns
• Several analog blocks of historical design replaced by
a CSU card ASIC to:
– Sample
– Digitize at typically 12 bits per sample (4096 uniformly spaced
voltage levels) uniform resolution or more.
– Compress digitally to 8 bits via look-up-table (using chord
segment approximation* to µ-law, as well as negative max
substitution and all-bit inversion
» negative maximum substitution is not used for digital data,
of course!
– Digital signal passed from CSU card to common card for
multiplexing, line coding.
– Excellent for 56/64 kb/s digital data cards, although older
channel banks have been adapted to digital->PAM on the CSU
card, then back to digital on the common card!
*Chord approximation uses short straight line segments between
specific exact points (linear interpolation).
Page 61
©1996-2005, R.Levine
Receive (Rx) Processes
Rx is reverse sequence of Tx
• de-multiplex 8 bits channel bit-groups
• Negative max substitution (11111111 => 11111101) for µlaw T-1 this substitution cannot be “undone”
• D/A conversion (8 bits) (via shared hardware)*
• Analog logarithmic expanding (via shared hardware)*
• PAM transmitted to CSU card
• Low pass filter (nominal 3.5 kHz bandwidth) smooths
the audio waveform, attenuates 8 kHz “buzz”
• 2-4 wire hybrid coils (if 2-wire loop)
* D/A conversion direct to analog via table-look-up in one process,
often on CSU card in some modern designs
Page 62
©1996-2005, R.Levine
T-1 Development History
• T-1 (DS-1) inserts one synch F bit per frame
• In original T-1 (called D-1 design) used a simple
alternating 0,1,0,1 bit value for the F bit in successive
frames
• D-1 version used 7 data bits per sample (sign & 6
magnitude bits). 8th bit was used for supervision
status (busy/idle) continuously in every frame.
• “Trans-coding” round-off errors accumulate from
repeated analog/digital conversion
– 7-bit coding accuracy was OK for just one T-1 link, or a 100% T-1
system
– More bits of accuracy needed, but still must convey channel
supervision status as well.
Note: D-1 design completely phased out in late 1960s. Current 1990s version is D-4.
Page 63
©1996-2005, R.Levine
12-Frame Super-frame
• F bit sequence was changed to a 12 frame pattern:
100011011100, which is only aliased after 12 frames
time shift.
• 8-bit coding (sign and 7 magnitude bits) of PCM
voltage samples provided more accuracy
• 8th bit was “robbed” (replaced by a supervision status
bit) only in frames 6 and 12 of the 12 frame sequence
• Result sometimes described as 7+5/6 bits of coding
accuracy
• In many circumstances, only 7 bits are “guaranteed” -thus the usable channel bit rate is 56 kb/s
– Multiple D/A conversions or cross connect switching can “rob”
more than 1 LSB bit in 6 consecutive frames.
Page 64
©1996-2005, R.Levine
Supervisory Implications
• 6th frame robbed bit designated A, 12th frame robbed
bit designated B (with ESF, 18th is C and 24th is D)
– In theory, up to 4 distinct states can be distinguished with 12
frame robbed bit signaling: AB= 00 or 01 or 10 or 11
– In public network, usually only two states are used:
» Busy: AB=11 (C and D bits are the same, for ESF)
» Idle: AB=00 (C and D bits are the same, for ESF)
– In both-way tie lines, all 4 states are used (usually with E&M
signaling protocol)
• Each state relates to an electromechanical relay status
in historical switching systems
• AB bits only sample supervisory status once in
125•6=750 millisecond interval, but this is frequent
enough for electromechanical switching
• E&M signals require 1.5 ms to change status
Page 65
©1996-2005, R.Levine
Acquiring Frame Synchronization- I
• Only one end device on each T-1 digital link is the bit
synchronization master. Other end is synch slave.
– Pre-set at installation time via switches, or remotely controllable in
new types of channel bank or switch equipment
• Some inevitable pulse rate drift occurs due to slowly
changing temperature-dependent wire/cable parameters
(primarily dielectric “constant” of wire insulation,
secondarily wire resistance)
• Transmission delay slowly drifts up and down
– Short term variations produce pulse-to-adjacent-pulse jitter
• Each operator sets up a logical tree structure radiating
from central clock location
– AT&T’s central location is Lambert, MO (St. Louis suburb) Several
backup clock locations provided in case of line breaks
– Today, highly accurate atomic clocks (1 part in 1014) cost only $10k.
GPS radio receivers are only several hundred dollars.
Page 66
©1996-2005, R.Levine
Acquiring Frame Synchronization- II
Two extremes of T-1 start up synch acquisition
1) Serial scan (slow but needs least hardware):
•
•
•
•
•
•
Scan bits serially looking for binary 1
When found, skip 192 bits, check if 0
If found, skip 192 bits, check for another 0,
Continue until 12 precise matches occur, each 193 bits apart
If match fails at any point, begin again with bit after the failed match
Worst case delay is 289.5 ms, best case is 1.5 ms, average is 145.5 ms
2) Parallel scan (faster but needs more hardware):
•
•
•
•
•
Take at least 193•12= 2316 bits into a memory (1.5 ms)
Rapidly examine bits 1,194, 387, …, looking for the 100011011100 pattern
If not found, try bits 2, 195, 388, …, and so forth until the desired pattern
is found (max 193 tests of stored binary bits are error-free)
With fast processor and memory access, (e.g. 20 nanosec access cycle)
each 12-bit test takes only ~240 ns.
Worst case delay is 1.54632 ms, average is 1.52316 ms
Page 67
©1996-2005, R.Levine
E-1 Synchronization
• Frame Alignment Sequence is a particular 8-bit binary
pattern occurring in last 7 bits of slot 0 of each
alternate E-1 frame: •0011011
– Other frames have a •1011011
– First bit indicated by •is used for a failure alarm indicator
1. Serial synch acquisition first scans for the 7-bit
pattern: max time 250 µs, average time 125 µs
2. Skip 1016 (=1024-7) bits and look again for 0011011
• If no match, immediately retry from step 1.
• Worst case 8.375 ms, average 4.5 ms
Parallel scan E-1 synch acquisition (not described here)
uses about 6 frames stored (0.75+ ms) to prove 3
consecutive synch pattern matches
Page 68
©1996-2005, R.Levine
E-1 Supervision
Two alternative methods, both using Chan. 16:
• Channel Associated Signaling (CAS)
– 4-bit groups sent in appropriate place/time in Ch. 16
» See Bellamy, 3rd. Ed, p. 213, Fig.4.35 (note typo on signaling
channel reference numbers)
– Four bits associated with each traffic channel, designated A,B,C,D
– In most implementations, bit status combinations ultimately operate
electromechanical relays
» Signaling System R2, (used in Europe, Latin America prior to CCS7)
is one example.
• Common Channel Signaling (No. 7)
– Packet messages sent via channel 16
• Both methods do not use robbed bits from the voice channel
– HDB3 coding transmits all zero bits without problems
– E-1 has always been “clear channel” from inception
Page 69
©1996-2005, R.Levine
Synch Lost & Re-acquired
• Establish design criteria for lost synch
– Typically 3 or more consecutive bad synch frames
• If this occurs, first examine same expected bit
positions for specified further time (typically 3 or more
frames) in case mismatch was due to electrical “noise”
rather than synch error
• If synch mismatch continues (typically greater than
50% mismatch), restart synch acquisition
– Reacquisition often involves scans back and forth from
last known synch bit location, rather than always
scanning forward as is done in initial synch acquisition
Page 70
©1996-2005, R.Levine
DS-1 Extended Superframe (ESF)
• ESF is a 24-frame sequence which is widely used today
for DS-1(T-1) installations
• ESF uses a sequence of 24 F bits as follows:
m e1 m 0 m e2 m 0 m e3 m 1 m e4 m 0 m e5 m 1 m e6 m 1
• Note that only 6 of these are fixed values: …0…0…1…0…1…1
• The “m” bits constitute a “message” channel at 4kbit/s
– In practice, sometimes used as two separate 2 kb/s channels, one for
ZBTSI, the other for operations and maintenance signals
• The six bits e1 …e6 comprise an error-detecting code
– A Cyclic Redundancy Check (CRC) is derived by taking the 4608 bits
in the previous 24 frames (with all F and e bits set to 1) and treating
it as a (big) binary number. It is divided* by a pre-defined 7-bit binary
constant and the 6-bit remainder is sent in the e bit positions. At the
receive end, the process is repeated, and any discrepancy between
the received and locally calculated e bits indicates an error.
* Special (modulo-2) arithmetic with no borrow or carry to/from adjacent bit positions.
Page 71
©1996-2005, R.Levine
ESF Robbed Bit Supervision
• ESF provides 4 places (frames 6, 12, 18 and 24) where
the least significant bit (LSB) of each channel may be
“robbed” for signaling
• These 4 bit positions are designated ABCD
respectively in documentation
• In theory, 16 different binary states can be indicated by
various combinations of 0 & 1.
• In practice, public networks still use all 4 bits the same
for most links, or use common channel signaling
– T-1 common channel signals are carried in slot 24 of the first T-1
channel group installed in each link group
• Common channel signaling (common channel No. 7) is
becoming prevalent because it supports desirable
features such as caller ID, etc., and allows clear
channel transmission
Page 72
©1996-2005, R.Levine
ESF Advantages
1. In-service bit error monitoring via CRC bits
– Prior technology required taking one payload channel out of
service for transmitting a test signal.
– This CRC can be part of an extensive automated Operations,
Administration & Maintenance (OA&M) system
2. ESF permits messages for system OAM&P* via the m
bits.
3. ESF is a practical prerequisite for ZBTSI
– ZBTSI permits clear channel 64 kb/s data for ISDN or other data
related services.
– Verilink suggests that ZBTSI works with 12-frame, but synch
acquisition is very slow since the signal bit modifies the F bit in
each 4th frame much of the time.
*OAM&P=Operations, Administration, Maintenance & Provisioning
Page 73
©1996-2005, R.Levine
Line Coding
Conversion from binary (5,0 volts) internal to 3-level (+3,
0, -3 volts) on outside wires. Three major categories:
• Alternate Mark Inversion (AMI) used in historical T-1.
–
–
–
–
AMI is the basis of other methods as well.
Also called “pseudo-ternary”
Binary zero maps to zero volts
Alternate binary 1s become +3 or - 3 v pulse
• Special Zeros string substitutions. Two types used for
Primary Rate signals:
– Hi-Density Binary 3 (HDB3) used for E-1 (Bellamy, 3rd ed, p.178)
– Binary 8-zero Substitution (B8ZS), an optional T-1 code.
• Zero Byte Time Slot Interchange (ZBTSI), an alternative
to B8ZS
– Re-arranges and modifies the binary data to remove strings of
eight zeros coinciding with a time slot, then uses AMI
Page 74
©1996-2005, R.Levine
AMI Waveforms
• Binary internal T-1 waveform is after binary inversion,
before AMI. Bit interval is 0.647 s/bit
v
0
1
0
1
1
5V
+3 V
Waveform details (short duty
cycle, tail end opposite polarity
spikes) are not an essential
feature of AMI, but are used
to compensate for line dispersion.
-3 V
Page 75
©1996-2005, R.Levine
time
B8ZS
• In previous AMI example, 01011 binary (result of a previous
bit inversion, not shown) becomes 0+0-+, where “+”
represents a +3V pulse and “-” represents a -3V pulse
• In B8ZS an 8-bit pulse pattern with intentional bi-polar
violations (BPVs) is used whenever 8 consecutive binary
zeros exist.
– This does not need to coincide with a time slot boundary.
• 00000000 becomes 000+-0-+ when the previous binary 1 was
transmitted as a +.
– The opposite polarity is used when the previous pulse was “-”
• Slight time delay of 5.18 µs due to 8-bit buffering.
• “Standard” digital trunk option of most switch makers, with
external B8ZS->ZBTSI converter.
– Although ZBTSI trunk cards are available for some equipment.
Page 76
©1996-2005, R.Levine
Verilink ZBTSI
• ESF is a pre-requisite for ZBTSI*. Each 4th F bit is used for
an essential ZBTSI signal.
• First store 4 frames (96 bytes/octets) of PCM in memory.
Store the 4 F bits separately.
• Perform XOR with a fixed 96-byte binary mask 010101…
(reduces probability of zero value channel bytes)
• Scan each of 96 stored channel bytes. If a byte value is zero,
move it toward beginning storage location following any
previously moved zero bytes, and pack all intermediate bytes
back one memory address
• Then replace the zero value of that relocated byte by a
pointer value (binary representation of decimal number range
1-96) indicating where the zero byte was before moving.
* Vendor claims that ZBTSI can be implemented on 12-frame T-1. Instructor’s view is that this delays startup frame synchronization acquisition.
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ZBTSI Memory Example
This bit set to 1 if any zero bytes in range
125 s or 1/8000 second
1
m
F
11
45+
128
1 2 3
*
4
5
6
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
* Slots 11 and 45 were originally zero after masking, before shifts.
Blue (slots 3-12) were shifted two slots (data in 3 was at 1)
Red (slots 13-45) were shifted one (data now in 13 was at 12)
Green (slots 46-96) have no zeros, were not shifted.
*
F
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
F
49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72
F
73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96
m
Multi-frame synch and CRC check bits
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©1996-2005, R.Levine
ZBTSI Control
• F bit in each 4th frame is set to 0 if no zero bytes were
re-arranged, 1 otherwise. This uses half of the 4 kb/s
ESF m-bit signaling capacity.
• All pointers but last in initial bytes have values in
decimal range 1-96. Last pointer has 128 added to put a
binary 1 in the “sign” bit.
• Actual “line coding” for ZBTSI is AMI. Works fine since
binary zero bytes are no longer present.
• Decoding operation reverses all encoding steps in
order.
• Time delay of 500 µs for memory buffering at each end
of a ZBTSI link.
• Error sensitivity to F bit or pointer errors is high. For
other bits, no worse than any other errors.
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B8ZS vs. ZBTSI
• Telecom industry could not originally agree on one
standard in 1980s. A few RBOCS (“west of the Rocky
Mountains**”) chose ZBTSI, others chose B8ZS in 1980s.
• ZBTSI line waveforms are essentially AMI, so existing
test equipment can be retained.
• B8ZS produces intentional BPVs* which cause false error
indications in older BPV-sensitive test equipment.
• New or upgraded test equipment can recognize B8ZS
pulse patterns and is not “fooled.”
* Bi-Polar Violation(s), the occurrence of two non-zero pulses of the same
polarity with no opposite polarity pulse in between.
** Acquisition of PacTel by SWB has recently reduced the ZBTSI camp to
just US West/Qwest.
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©1996-2005, R.Levine