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Status of LAV FEE electronics G. Corradi, C. Paglia, D. Tagnani & M. Raggi, T. Spadaro, P. Valente Outline • General LAV readout Diagram • What we did in 2010 – ToT mezzanine design and production (final) – Sum analog board mezzanine (prototypes) – Low voltage regulators (prototypes) • Planning for 2011 – Mother board prototypes – Production – What we needs from outside LNF General readout diagram LAV TEL62 Front-end board (Diagram) Supply control ± 6V ± 12 V CPU Power supply CAN-Open DAC ADC Trigger in Test pulse Threshold control • 32 channels • VME 9U mechanics • Include services: • Analog sums • Remote threshold • Individual channel threshold control • Pulsing system Analog in Final board LVDS out LVDS driver LVDS out Pre-amplifier stage Dual thr. Discriminator & shaper Analog sum Analog sum out Hybrid Front-end board (July 2010) 20 Prototype board • VME 6U mechanics • 8 input channels • 16 output channels (8x2thr) • Manual threshold control local • 4 threshold by 4 channels • 2 thr low • 2 thr high • Sum of 4 analog outputs 4 Discriminator mezzanine boards for the final prototype Sum for the final mezzanine board Successfully tested during ANTI-A2 test beam October 2010 @CERN ToT mezzanine (2 channel) Analog sum output • One FEE boards serves 32 channels = 1 layer • 32 outputs cannot all be housed on the board: (there isn’t place on the panel) • sum 4 block analog signals (e.g. one “banana”) • sum 4 bananas (16 channels = half a layer) • Output via Coax 50 W, Lemo-00 4Ch 4Ch sum 4 sum 4 4Ch 4Ch sum 4 Su sum 16 16Ch Analog sum board •Power consumption V+ = +6V @ I+ = +12mA V- = -6V @ I- = -12mA Sums up to 4 input channels, range 0 to -2V Output signal can be inverted or non-inverted with respect to the input signals Bandwidht is 50MHz Input signals Output signals Low Voltage Regulators • Low Voltage regulators are used to generate +/-6V from +12/-12V LAV power rails • An ultra compact, low noise buck converter, operating at 1.5MHz, generates +6V from +12V • An innovative design has been used to create -6V from -12V, using a low noise switching converter, operating at 1.5MHz Final LAV FEE board VME9U We already have: -Mezzanine Boards (ToT discriminators) -Sum Boards (1 “banana” or 4 blocks each) - Sum Boards (16 blocks each) We will soon have: - Power supply boards (+12 to +6V and -12 to -6V) Threshold circuit • Two different thresholds per channel • Remotely programmable (CAN-Open) • 0-250 mV range • 12 bit resolution & 1 LSB stability performance (standard low-cost components, more than enough) • Remotely readable via CAN-Open • Easy to implement automatic threshold tuning • Local trimmer adjustment • 1 high and 1 low threshold for all channels Front-end diagnostics • Provide a test pulse toward the PMT: • Can be used to check connection up to the PMT • Operation modes • free-running (controlled by local CPU) • or on external trigger (from TEL62) • pulse all channels • or a programmable pattern • Signal characteristics • Squared waveform • 10 ns fixed width • 50 or 100 mV ”programmable amplitude in two steps” • Width and amplitude stability at 2% level Front-end diagnostics CPU VME9U PhotoMultiplier Tube CABLE SPI R3 C2 R2 5 + OUT R6 6 Int Osc ON-OFF U1B R4 R1 50 R Int-Ext Trigger 7 - 1 Internal Trigger Oscillator 100Hz 2 R5 32Channels Decoder + Pulse Generator ON_OFF CONTROL Widht = 10ns Amplitude = 100mV PULSE IN U2B 7 + - 31 5 OUT 6 R7 10 0R SHAPER 10ns 32 PULSE OUT Pulse System TELL62 LVDS OUT CAN in, CAN out Remote Control FEE LAV VME9U Sum 1 to 16 Sums 1 to 4, 5 to 8, 9 to 12, 13 to 16 Sum 17 to 32 Sums 17 to 20, 21 to 24, 25 to 28, 29 to 32 Local Control USB Vth_H and Vth_L test points and adjust trimmers Wiener LAV crate Voltages Module type Voltage range Channels per module Peak output Power +12V MEH 7V to 16V 1 46A 550W -12V MEH 7V to 16V 1 46 550W +48V MEH 30V to 60V 1 13.5A 650W +3.3V digital MDH 2V to 7V 2 +/-30A 210W (420W Total) 2 +/-30A 210W (420W Total) +5V digital +5V analog -5V analog 2V to 7V MDH 2V to 7V 2V to 7V 15 Roadmap to synchronization run • April 2011 first production: • 3 Full final FEE 9U board (without final firmware release) • 50 discriminator mezzanine boards • 30 sum mezzanine boards • 10 low voltage regulators • Integrated pulse diagnostic system • April 2011 is last due date to have at LNF: • At least 1 LAV standard VME 9U crate • At least 1 TEL62+TTC • At least 4 TDCb (SCSI2 final vesion) • July 2010 second bunch of FEE board production • End September 2011: • We expect to have a working setup FEE-TEL62-PC 16 Conclusion • Main component of LAV FEE board have been produced and tested – discriminator mezzanine designed and pre-produced – Analog sum boards designed and pre-produced – Low voltage regulators designed and pre-produced • The requirement for the VME 9U crate have been established – ±12V 2A per slot required by LAV FEE • Layout of the 9U motherboard is under design • First mass production of FEE components foreseen in 2011 – First 3 9U motherboard prototypes – Around half of discriminator and sum board mezzanine • The remote control communication Firmware will be started