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COSMOS Summer 2008
Peripheral Interfaces: I2C & USB
Rajesh K. Gupta
Computer Science and Engineering
University of California, San Diego.
©2008 R. Gupta, UCSD
• Topic:
– Computer interfaces: mechanicals, electricals, signaling,
• This lecture
– Concepts covered: Input/Output, Addressing, Synchronous,
Asynchronous, Access Arbitration, Protocols, Packets, Messaging
– Concepts covered: Interface standardization, character coding,
serial data transfers, Star network, Host controller
• Next lecture
– Cap Sensing
• Reference
– None
©2008 R. Gupta, UCSD
Address space
Address decoding
Wired AND
I2C, Master/Slave, RS232c,
Dsub connector, UART, USB,
USB Hub, USB host
What is this connector?
9-pin RS232C: DE-9
A “Serial” Port
Then What Are These?
From RS232c to USB
• “D-Sub” connectors
A: 15 pin
B: 25 pin
C: 37 pin
D: 50 pin
E: 9 pin
• RS232 was DB25
RS232c was DE9
• Specified by EIA in 1969
Electricals (voltage levels)
Signaling rate, timing, slew-rate
But not: character encoding,
character framing, protocols
Question 1: How many keys on your keyboard?
Question 2: How many bits it will take to encode these?
What is ASCII?
• American Standard Code for Information Interchange
– Published in 1963, revised 1967, 1986
• 128 characters, incl. 33 non-printing or control
– 94 printable characters: 26 + 10 + 11-25 symbols
– Is SPACE printable?
• 8-bit extension by MAC OS Roman
• Unicode and Universal Character Set (UCS)
– UTF-8, UTF-16, UTF-32
Interface Basics
1. Who/Where to send/receive information?
Ports: mechanicals, electrical
2. What information to send?
Signals and Packets: Electrical signaling, logical encoding
3. How to send the information?
Protocols: synchronous, asynchronous
How do we measure goodness of an interface?
1. Ports
• Which door to knock at or open?
• All processors already have one door: memory
– Memory-mapped IO
• They may have additional I/O ports
– How are these ports identified?
– How are devices connecting to these ports identified?
• Mechanically, Electrically, or at a ‘higher level’
• Memory-mapped versus dedicated IO
– What happens to CPU when I/O operation is in progress?
2. Signaling
• How many wires? What do they carry?
Serial signaling: Send one bit at a time
• Direction of signaling: Half and Full Duplex
Synchronous versus Asynchronous
• Asynchronous serial communication
Send a START signal prior to each byte
And a STOP signal after each byte
Generally use more than 8-bit to transmit a byte (10 to 12)
• UART: Universal Asynchronous Receiver Transmitter
Again, no shared clock. The RX must lock onto data and detect individual
TX is a Parallel-to-Series converter
• RX is a Series-to-Parallel converter
3. Protocols
• Request/Acknowledge Handshakes
– RTS = Request to Send: Transmitter (TX) asserts RTS
– CTS = Clear to Send: Receiver (RX) asserts CTS
• This gives you flow control
– i.e., data transfer can proceed at a rate that is acceptable
• Let us examine two protocols
– I2C and USB
I2C: inter-integrated circuit
• Two-wire
– A microcontroller can control a network of devices with just two
general-purpose IO pins and software. (upto a few meters)
• Connects multiple devices on a multi-drop bus
• Devices can be attached or detached without
affecting other devices
– 7-bit address space, 16 reserved, 112 nodes maximum
• 10 kbps (low), 100 kbps, 400 kbps (fast), FM+ 1
©2008 R. Gupta, UCSD
Mbps, HS 3.4 Mbps
I2C Wires
• Two bidirectional wires
– SDA: Serial Data
– SCL: Serial Clock
• ‘Open drain’: normally high when not in use
– MASTER node issues the SCL and addresses SLAVES
– SLAVE node receives the SCL and the address
– “Wired AND” logical function.
©2008 R. Gupta, UCSD
So, how do we write or read?
• Normally, both SDA and SCL are ‘high’
– “sense” before you drive a line
• A device that wants to write pulls SDA low
– Followed by SCL going low
• So, everyone else knows that a transmission is
©2008 R. Gupta, UCSD
START, Data, Data,…,Data, STOP!
Putting it together
• Start Condition: With SCL low, SDA goes HL
• Bits are ‘sampled’ on the rising edge of SCL
• Stop Condition: With SCL high, SDA goes LH
©2008 R. Gupta, UCSD
• Question 1: What is on SDA when it makes a
transition with SCL low?
• Question 2: What is on SDA when it makes a
transition with SCL high?
• Question 3: What happens if Slave is not ready
to receive next BIT?
I2C Protocol
• Any number of bytes in an I2C packet
– MSB first, each bytes transmitted must be acknowledged by
the receiver
– After each 8th bit, MASTER releases SDA and then generates
an additional clock pulse on SCL
• Receiver can then acknowledge by pulling SDA low
• Receiver can always abort the transmission by
holding SCL low
– Can not go up by the MASTER, thus no bit sampling edge
©2008 R. Gupta, UCSD
Bi-directional Data Transfers
I2C Protocol Actions
• Master sends START
– followed by 7-bit address of the Slave
• followed by single bit representing write to (0) or read
from (1) the slave.
• Slave responds with ACK bit for that address
– Master then continues in either TX or RX mode
• Communication transfer follows.
• All other MASTERS monitor START and STOP bits.
©2008 R. Gupta, UCSD
Note the direction of signaling
• Is I2C communication synchronous or
• Is I2C duplex? Fully duplex?
• Draw SDA and SCL waveforms in case of
transmission of START followed by $A2 = (1010
©2008 R. Gupta, UCSD
Stepping Back in Time:
RS232 to USB
• RS232C originally designed for connecting a teletype
(DTE) to a modem (DCE)
The modem connected over the phone line to other modems
Question: Why ‘modem’? Hint: interface to the telephone line.
In truth, DTE, DCE is a bit arbitrary
• RS232C is ‘unbalanced’
Logical High = typically -12V (-5 to -15 V)
Logical Low = typically +12V (+5 to +15 V)
This means that one typically needs interface circuits to the
microprocessor (level shifters)
• 7-bit data frames
(instead of more common 8-bit)
You may receive email that specifies 7-bit character set just in case it is
routed via a serial connection that supports only 7-bit transmission
Standardizing the Standard: USB
• RS232C was not standard enough
– Too much flexibility (on data rate, parity, flow control)
• USB: standardized the door and the lane
Software takes care of the data, information side
The ‘OS’ is aware of the device interface
Up to 127 devices. One standard cable.
Devices identify themselves. Not the interface.
• USB 1.1: 12 Mbps (Normal), 1.5 Mbps (Low)
• USB 2.0: 480 Mbps (High)
• USB 3.0: 4.8 Gbps (Super)
• Shielded 4-wire cable
USB device power (+5 V)
Differential data line
Differential data line
Power and signal ground
• One host in a network: host controller
Upstream versus downstream connection and connectors (A versus B)
• Host controller either directly connects to device (star) or through
a hub (tiered star)
Because of the connectors, no device-to-device connections
• When a device is attached to the network
Based on its identification, the host OS determines the software driver to
be used,
device is assigned a unique address and
host requests its internal configuration.
Classes of Devices
• Host controller know about the following class of devices
Mass storage: HD, CDROM, DVD
Physical interface device
Common class…
USB Packets
• All data transfers under the control of the host controller
• Four type of data transfers
Control transfer: configure the bus and devices on the bus
Bulk transfer: move data asynchronously
Isochronous transfer: move time-critical data (e.g, audio)
Interrupt transfer: retrieve data at regular intervals
• A packet contains
SYNC byte, Packet ID, Content, CRC
• Four type of packets
Token, data, handshake, preamble
• Defined processes for how a device is recognized, joins the
network and how it communicates with the host controller.
Embedding Clock
• Recover clock from data
• Manchester Encoding
– Each data bit (1 or a 0) has at least one transition
– So, we can ‘recover’ clock from data
Coding Schemes
• Note that each data transition requires two transitions of
– Higher frequency, signal bandwidth, electrical effects
• A coding scheme can reduce the number of transitions
– to be equal to that of the data rate
• NRZ (duration of each bit = 1/f)
• NRZI (signal is toggled only when a logic 1 is to be
• 4B/5B encoding translated 4 bits of data into a 5-bit
• for the 16 possible permutations there are 32 symbols
• carefully choose symbols to guarantee that at least one signal
transition within any 3 bit period.
4b/5b code
• Computers interfaces with devices via memory or via direct
• I2C defines a 2-pin interface that
– Performs Master-Slave communications
• The interface defines electrical behavior (signaling)
– And the data transfer protocols (messaging)
– What about the mechanicals?
• Serial interfaces are simpler and cost effective in
embedded applications
• Standardization helps in proliferating their use
• The data interface can also be used to supply power
– Typically use ‘unused’ pins in the standard
• E.g., A RTS ‘powers up’ a device
– PoE, PoweredUSB, …
©2008 R. Gupta, UCSD