Survey
* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project
* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project
Inv № 59 Current Mode PWM Controller KA3842/43/44/45 July 1995 - revised July 2002 DESCRIPTION KA3842/43/44/45 are fixed frequency current mode PWM controller. They are specially designed for OFF−Line and DC to DC converter applications with a minimal external components. Internally implemented circuits include a trimmed oscillator for precise duty cycle control, a temperature compensated reference, high gain error amplifier, current sensing comparator, and a high current totempole output ideally suited for driving a power MOSFET. Protection circuitry includes built undervoltage lockout and current limiting. The UC3842A(AM) and UC3844A(AM) have UVLO thresholds of 16 V (on) and 10 V (off). The corresponding thresholds for the UC3843A(AM)/45A(AM) are 8.4V (on) and 7.6V (off). The UC3842A(AM) and UC3843A(AM) can operate within 100% duty cycle. The UC3844A(AM) and UC3845A(AM) can operate within 50% duty cycle. The UC384XA(AM) has Start-Up Current 0.17mA (typ). FEATURES • • • • Low Start-Up and Operating Current High Current Totem Pole Output Undervoltage Lockout With Hysteresis Operating Frequency Up To 300KHz (384XA) 500KHz (384XAM) BLOCK DIAGRAM (toggle flip flop used only in UC3844, UC3845) Absolute Maximum Ratings Characteristic Supply Voltage (low impedance source) Output Current Symbol VCC Value 30 Unit V IO ±1 A Input Voltage (Analog Inputs pins 2,3) VI Error Amp Output Sink Current Power Dissipation (TA=250C) Storage Temperature Range Lead Temperature (soldering 5 sec.) ISINK (E.A) PO Tstg TL −0.3 to 5.5 10 1 -65 to150 260 mA W oC oC 1 V PIN CONNECTION (TOP VIEW) Inv № 59 Current Mode PWM Controller KA3842/43/44/45 July 1995 - revised July 2002 Electrical characteristics (*VCC=15V, RT=10kΩ, CT=3.3nF, TA=00C to +700C, unless otherwise specified) Characteristics Symbol Test Condition Min Typ Max Reference Section Reference Output Voltage 5.0 5.1 V Line Regulation ∆VREF 12V ≤ VCC ≤ 25 V 6.0 20 mV Load Regulation ∆VREF ISC 1 mA ≤ IREF ≤ 20mA 6.0 25 -100 -180 50 52 0.05 57 57 1.0 Short Circuit Output Current VREF TJ = 25°C, IREF = 1 mA 4.9 Unit TA = 25°C mA Oscillator Section Oscillation Frequency f TJ = 25°C 384XA 384XAM Frequency Change with Voltage Oscillator Amplitude Error Amplifier Section Input Bias Current ∆f/∆VCC Input Voltage Open Loop Voltage Gain VI(E.A) AVOL Vpin1 = 2.5V Power Supply Rejection Ratio PSRR 12V ≤ VCC ≤ 25 V Vpin2 = 2.7V, Vpin1 = 1.1V Vpin2 = 2.3V, Vpin1 = 5V Output Sink Current Output Source Current High Output Voltage Low Output Voltage Current Sense Section Gain Maximum Input Signal Supply Voltage Rejection V(OSC) IBIAS ISINK ISOURCE VOH VOL GV VI(MAX) SVR Input Bias Current IBIAS Output Section Low Output Voltage VOL High Output Voltage VOH Rise Time tR Fall Time tF Undervoltage Lockout Section Start Theshold VTH(ST) Min. Operating Voltage (After Turn On) PWM Section Max. Duty Cycle Min. Duty Cycle Total Standby Current VOPR(min) D(MAX) 47 47 12V ≤ VCC ≤ 25 V (peak to peak) 1.6 VFB=3V 2V ≤ V0 ≤ 4V Vpin2 = 2.3V, RL = 15KΩ to GND KHz % V -0.1 -2 2.42 65 2.5 90 2.58 60 70 2 -0.5 5.0 7 -1.0 6.0 µA V dB mA mA V 0.8 1.1 3.0 1.0 70 3.15 1.1 V/V V dB -3.0 -10 µA 0.4 2.2 TJ = 25°C, CL = 1nF (Note 3) 0.08 1.4 13.5 13.0 45 150 TJ = 25°C, CL = 1nF (Note 3) 35 150 Vpin2 = 2.7V, RL = 15KΩ to PIN 8 (Note 1 & 2) V pin1 = 5V (Note1) 2.85 0.9 12V ≤ VCC ≤ 25 V (Note 1) Vpin3 = 3V ISINK ISINK ISINK ISINK = = = = 20 mA 200 mA 20 mA 200 mA 13 12 UC3842A(AM)/44A(AM) UC3843A(AM)/45A(AM) UC3842A(AM)/44A(AM) UC3843A(AM)/45A(AM) 14.5 7.8 8.5 7.0 16.0 8.4 10 7.6 17.5 9.0 11.5 8.2 UC3842A(AM)/43A(AM) UC3844A(AM)/45A(AM) 95 47 97 48 100 50 0 0.17 0.3 13 38 17 D(MAX) IST UC384XA(AM) Start−Up Current Operating Supply Current ICC (OPR) Vpin3 = Vpin2 = 0V Zener Voltage VZ ICC=25 mA 30 * Adjust VCC above the start threshold before setting it to 15V. Note 1: Parameter measured at trip point of latch with Vpin2=0. Note 2: Gain defined as A=∆Vpin1/∆Vpin3 ; 0 ≤ Vpin3 ≤ 0.8V. Note 3: These parameters, although guaranteed, are not 100% tested in production. 2 V nS V V % mA V Inv № 59 Current Mode PWM Controller KA3842/43/44/45 July 1995 - revised July 2002 PIN FUNCTION N 1 2 FUNCTION COMP VFB 3 ISENSE 4 RT/CT 5 6 GROUND OUTPUT 7 8 VCC Vref DESCRIPTION This pin is the Error Amplifier output and is made for loop compensation. This is the inverting input of the Error Amplifier. It is normally connected to the switching power supply output through a resistor divider. A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate the output switch conduction. The oscillator frequency and maximum Output duty cycle are programmed by connecting resistor RT to Vref and capacitor CT to ground. This pin is the combined control circuitry and power ground. This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced and sink by this pin. This pin is the positive supply of the integrated circuit. This is the reference output. It provides charging current for capacitor CT through resistor RT . APPLICATION INFORMATION Figure 1. Error Amp Configuration Figure 2. Undervoltage Lockout 3 Inv № 59 Current Mode PWM Controller KA3842/43/44/45 July 1995 - revised July 2002 Figure 3. Current Sense Circuit Figure 4. Slope Compensation Techniques 4 Inv № 59 Current Mode PWM Controller KA3842/43/44/45 July 1995 - revised July 2002 SCR must be selected for a holding current of less than 0.5mA. The simple two transistor circuit can be used in place of the SCR as shown. Figure 5. Latched Shutdown Figure 6. Error Amplifier Compensation 5 Inv № 59 Current Mode PWM Controller KA3842/43/44/45 July 1995 - revised July 2002 Figure 7. External Clock Synchronization Figure 8. Soft-Start Circuit 6 Inv № 59 Current Mode PWM Controller KA3842/43/44/45 July 1995 - revised July 2002 TYPICAL PERFORMANCE CHARACTERISTICS Figure 1. Timing Resistor vs. Oscillator Frequency Figure 2. Output Dead-Time vs. Oscillator Frequency Figure 3. Maximum Output Duty Cycle vs. Timing Resistor (UC3842/43) Figure 4. Error Amp Open-Loop Gain vs. Frequency Figure 5. Current Sense Input Threshold vs. Error Amp Output Voltage Figure 6. Reference Short Circuit Current vs. Temperature 7 Inv № 59 Current Mode PWM Controller KA3842/43/44/45 July 1995 - revised July 2002 Figure 7. Output Saturation Voltage vs. Load Current TA = 25°C Figure 8. Supply Current vs. Supply Voltage Figure 9. Oscillator and Output Waveforms 8 Inv № 59 Current Mode PWM Controller KA3842/43/44/45 July 1995 - revised July 2002 PAD LOCATION Chip size: 2.38 x 1.63 mm Pad N Pad Name 1 2 3 4 5 6 7 8 9 10 COMP VFB ISENSE RT/CT POWER GND GND OUT POWER VCC VCC VREF Coordinates µm X Y 90 110 1050 110 1310 110 2000 150 1700 1280 1680 1450 1310 1410 990 1410 815 1410 460 1390 9