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EDS Mini-colloquium, Mexico City, May 3, 2014
From Lilienfeld to Landauer:
Understanding the nanoscale transistor:
Mark Lundstrom
Electrical and Computer Engineering
Network for Computational Nanotechnology
Birck Nanotechnology Center
Purdue University, West Lafayette, Indiana USA
nanoHUB.org
Lundstrom 5.3.2013
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history of the field-effect transistor
concept
Lilienfeld, 1926
Heil, 1934
demonstration
22 nm FinFET
Atalla and Dawon Kahng
Bell Labs, 1959
Intel
IEDM, 2012
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NMOS-II
NMOS II: 5 microns = 5000 nm
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Hewlett-Packard Journal, Nov. 1977
Moore’s Law
Nanoelectronics
Microelectronics
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http://en.wikipedia.org/wiki/Moore's_law
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MOSFET IV characteristic
gate-voltage
controlled
current source
circuit
symbol
D
G
S
5
gate-voltage
controlled
resistor
(Courtesy, Shuji Ikeda, ATDF, Dec. 2007)
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MOSFET IV: low VDS
gate-voltage
controlled
resistor
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velocity saturation
107
104
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MOSFET IV: velocity saturation
(Courtesy, Shuji Ikeda, ATDF, Dec. 2007)
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textbook MOSFET model
gate-voltage
controlled current
source
gate-voltage
controlled
resistor
(Courtesy, Shuji Ikeda, ATDF, Dec. 2007)
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carrier transport nanoscale MOSFETs
Velocity (cm/s) 
Energy 
quasi-ballistic
D. Frank, S. Laux, and M. Fischetti, Int. Electron Dev. Mtg., Dec., 1992.
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MOSFET: IV (2-piece approximation)
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current = charge times velocity
1) Low VDS:
2) High VDS:
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model for ID(VG, VD)
If we can make the average velocity go smoothly from the
low VD to the high VD limit, then we will have a smooth model
for ID(VG, VD).
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drain voltage dependent average velocity
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empirical saturation function
✓
✓
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“MIT Virtual Source” model
1)
Only a few device-specific input
parameters to this model:
2)
3)
The parameter, β, is empirically
adjusted to fit the IV. Typically, β ≈
1.4 – 1.8 for both N- and PMOSFETs.
4)
5)
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MIT Virtual Source Model
 32 nm technology 
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questions
1) Why does the traditional MOSFET model (based on
transport physics that is not valid at the nanoscale)
continue to describe the IV characteristics of nanoMOSFETs?
2) How does the velocity saturate in a ballistic or quasiballistic MOSFET?
3) What is the meaning of the “apparent mobility” and the
“injection velocity.”
4) What will happen below 10 nm?
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Lundstrom 5.3.2013
outline
1) Introduction
2) The MOSFET as a barrier-controlled device
3) The MOSFET as a nano-device
4) Connecting the traditional and Landauer models
5) What will happen below 10 nm?
6) Summary
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energy band diagrams
electron potential
energy vs. position
G
source
D
drain
silicon
SiO2
S
(Texas Instruments, ~ 2000)
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the transistor as a barrier controlled device
 low gate voltage
 VD = VS = 0
source
channel
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drain
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the transistor as a barrier controlled device
 low gate voltage
source
channel
drain
 high drain voltage
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the transistor as a barrier controlled device
 high gate voltage
source
 high drain voltage
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how transistors work
2007 N-MOSFET
(Courtesy, Shuji Ikeda, ATDF, Dec. 2007)
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E.O. Johnson, “The IGFET: A Bipolar Transistor in
Disguise,” RCA Review, 1973
understanding MOSFET IV characteristics
electrostatics + transport
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Energy 
Velocity (cm/s) 
semiclassical transport in nanoscale MOSFETs
D. Frank, S. Laux, and M. Fischetti, Int. Electron Dev. Mtg., Dec., 1992.
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quantum transport
L = 10 nm
n(x, E)
nanoMOS (www.nanoHUB.org)
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Lundstrom 5.3.2013
outline
1) Introduction
2) The MOSFET as a barrier-controlled device
3) The MOSFET as a nano-device
4) Connecting the traditional and Landauer models
5) What will happen below 10 nm?
6) Summary
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Landauer approach to transport
nano-device
gate
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the DD equation for the 21st Century
nano-device
bulk semiconductor
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“Lessons from Nanoscience”
http://nanohub.org/topics/LessonsfromNanoscience
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i) small drain bias
nano-device
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small drain bias
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ballistic transport and quantized conductance
W -->
B. J. van Wees, et al. Phys. Rev. Lett. 60, 848–851,1988.
1) conductance is quantized
2) upper limit to conductance
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ii) large drain bias
nano-device
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ballistic MOSFET: linear region
near-equilibrium
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linear region with MB statistics
✔
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ballistic MOSFET: linear region
near-equilibrium
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ballistic MOSFET: saturated region
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saturated region with MB statistics
✔
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ballistic MOSFET:
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the ballistic IV (Boltzmann statistics)
ballistic
on-current
ballistic
channel resistance
“velocity
saturation”
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K. Natori, JAP, 76, 4879, 1994.
velocity saturation in a ballistic MOSFET
ΕΧ vs. x for VGS = 0.5V
1)
2)
3)
4)
Increasing VDS
-10
43
-5
0
5
10
(Numerical simulations of an L = 10 nm double gate Si MOSFET from
J.-H. Rhew and M.S. Lundstrom, Solid-State Electron., 46, 1899, 2002)
Velocity (cm/s) 
“velocity overshoot”
D. Frank, S. Laux, and M. Fischetti, Int. Electron Dev. Mtg., Dec., 1992.
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Lundstrom Fall 2012
comparison with experiment: Silicon
• Si MOSFETs deliver > one-half of
the ballistic on-current. (Similar for
the past 15 years.)
• MOSFETs operate closer to the
ballistic limit under high VDS.
A. Majumdar, Z. B. Ren, S. J. Koester, and W. Haensch, "Undoped-Body Extremely Thin SOI
MOSFETs With Back Gates," IEEE Transactions on Electron Devices, 56, pp. 2270-2276, 2009.
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Device characterization and simulation: Himadri Pal and Yang Liu, Purdue, 2010.
comparison with experiment: InGaAs HEMTs
Jesus del Alamo group (MIT)
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scattering and transmission
X
X
X
λ0 is the mean-free-path for backscattering
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the quasi-ballistic MOSFET
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on-current and transmission
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the quasi-ballistic MOSFET
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scattering under high VDS
low VDS
high VDS
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outline
1) Introduction
2) The MOSFET as a barrier-controlled device
3) The MOSFET as a nano-device
4) Connecting the traditional and Landauer models
5) What will happen below 10 nm?
6) Summary
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MIT VS Model: why does it work?
 32 nm technology 
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connection to traditional model (low VDS)
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connection to traditional model (high VDS)
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the MOSFET as a BJT
“base”
‘bottleneck’
“collector”
E.O. Johnson, “The IGFET: A Bipolar Transistor in Disguise,” RCA Review, 1973
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Landauer  VS model
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outline
1) Introduction
2) The MOSFET as a barrier-controlled device
3) The MOSFET as a nano-device
4) Connecting the traditional and Landauer models
5) What will happen below 10 nm?
6) Summary
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limits to barrier control: quantum tunneling
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4)
3)
2)
1)
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from M. Luisier, ETH Zurich / Purdue
5 nm MOSFETs?
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Unpublished results from Saumitra Mehrotra, G. Klimeck group,
Purdue University.
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outline
1) Introduction
2) The MOSFET as a barrier-controlled device
3) The MOSFET as a nano-device
4) Connecting the traditional and Landauer models
5) What will happen below 10 nm?
6) Summary
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top of the barrier / VS model
under strong control of gate with
weak influence of the drain
For large VDS, most of the
additional voltage drop occurs on
the drain end of the channel.
In a “well-tempered”
MOSFET, the height of
the energy barrier is
mostly controlled by the
gate voltage and only
weakly controlled by the
drain voltage.
Current is controlled by a
bottleneck near the
beginning of the channel
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the MIT VS model: Why does it work?
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summary
• Understanding MOSFETs means understanding
electrostatics and transport.
• The Landauer approach provides a clear,
physical approach to transport at the nanoscale.
• 10 nm and below is still uncharted territory.
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questions
This talk will be available soon at: www.nanoHUB.org
For more information, take a nanoHUB-U short course:
“Nanoscale transistors” on nanoHUB-U
https://nanohub.org/groups/u/self_paced_nanoscale_transistors
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