Download AR2111 Radio-on-a-Chip for 2.4 GHz Wireless LAN

Technical Overview
Revision January 2003
AR2111 Radio-on-a-Chip for 2.4 GHz Wireless LAN
General Description
The Atheros AR2111 is part of the AR5001X
solution for 5 GHz and 2.4 GHz combo wireless
local area networks (WLANs). When combined
with AR5111 and AR5211this chip set enables a
high performance, low cost, compact solution
that easily fits onto a Mini PCI form factor or
one side of a PC Card.
The AR5111 operates in:
■ 2.412 GHz to 2.472 GHz U.S. frequency
bands
The frequency synthesizer requires to generate
only two L.O. frequencies of 3.136 GHz and
3.168 GHz.
The transmitter, receiver, and frequency
synthesizer functions are controlled using the
AR5211 through a serial programming bus and
on-chip control registers.
All internal bias currents are generated on-chip
with a single external reference resistor.
Features
■ 2.484 GHz Japanese band
■ No external VCOs and SAW filters needed
The device requires both 2.5 V and 3.3 V
supplies.
■ 2.412 GHz to 2.484 GHz frequency band
The transmitter takes the output of the AR5111
chip, down converts it to the 2.4 GHz
frequency band and drives the signal off-chip.
■ 48-pin leadless plastic chip carrier package
operation
■ Together with the AR5111 and AR5211:
– IEEE 802.11a/b compatible
– Supports OFDM modulation at 2.4 GHz
The receiver up converts the 2.4 GHz incoming
signal to the 5 GHz signal suitable for the
AR5111 input.
– CCK, DSSS, BPSK, QPSK, 16 QAM, and
64 QAM modulation schemes supported
– Data rates of 1 Mbps to 54 Mbps
– Low power sleep mode controlled by the
AR5211
System Block Diagram
External
LEDs
EEPROM
2.4/5GHz
Receiver
Receiver
Switch
RF
Filter
RF
Switch
Frequency
Synthesizer
Frequency
Synthesizer
32MHz
Crystal
Transmitter
Transmitter
Ext Interface
RC
Loop
Filter
L,R,C's only)
Bias/Control
AR2111
Bias/Control
Controls
AR5111
MAC
Configuration
Control
and Memory
TX
Baseband
Filters
(Common
Controls
From AR5211
ADC
PCI,
Mini PCI,
CardBus
Host Interface
DAC
Baseband
(PHY)
AR5211
© 2000-2003 by Atheros Communications, Inc. All rights reserved. Atheros™, 5-UP™, Driving the Wireless Future™, Atheros Driven™, Atheros Turbo
Mode™, and the Air is Cleaner at 5-GHz™ are trademarks of Atheros Communications, Inc. The Atheros logo is a registered trademark of
Atheros Communications, Inc. All other trademarks are the property of their respective holders.
Subject to change without notice.
•
Downloaded from Elcodis.com electronic components distributor
1
Technical Overview
1. Electrical Characteristics
1.1 Absolute Maximum Ratings
Table 1-1 summarizes the absolute maximum
ratings and Table 1-2 lists the recommended
operating conditions for the AR2111. Absolute
maximum ratings are those values beyond
which damage to the device can occur.
Functional operation under these conditions,
or at any other condition beyond those
indicated in the operational sections of this
document, is not recommended.
Table 1-1. Absolute Maximum Ratings
Symbol
Parameter
Max. Rating
Unit
Vdd2
Maximum supply voltage
3.0
V
Vdd3
Maximum I/O supply voltage
4.0
V
RFin
Maximum RF input (reference to 50 Ω)
+10
dBm
Tstore
Storage temperature
-65 to 150
°C
ESD
Electrostatic discharge tolerance
2000
V
1.2 Recommended Operating Conditions
Table 1-2. Recommended Operating Conditions
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Vdd2
Supply voltage
±5%
2.375
2.5
2.625
V
Vdd3
I/O voltage
±10%[1]
3.0
3.3
3.6
V
Tcase
Case temperature
—
0
25
85
°C
Tj
Junction temperature
—
0
50
110
°C
θJA
Junction to ambient
temperature
—
—
—
24
°C/W
[1]
[1]The recommended power-on sequence is to have Vdd2 turn on before Vdd3.
2 • AR2111 Radio-on-a-Chip for 2.4 GHz Wireless LANs
2 • January 2003
Downloaded from Elcodis.com electronic components distributor
Atheros Communications, Inc.
Technical Overview
2. Functional Description
The AR5111 radio front end (see Figure 2-1)
consists of four major functional blocks:
■ Receiver (RX)
■ Transmitter (TX)
■ Frequency synthesizer (SYNTH)
■ Associated bias/control (BIAS)
RFin
2
Receiving
Rxout
CLK32_in
Frequency
Synthesizer
To AR5111
RFout
2
To AR5111
LoopFilter
Transmitter
2
Txin
Bias/Control
8
Control
To AR5211
AR2111
CLK32_out
Figure 2-1. AR2111 Functional Block Diagram
Atheros Communications, Inc.
Downloaded from Elcodis.com electronic components distributor
AR2111 Radio-on-a-Chip for 2.4 GHz Wireless LANs •
January 2003 •
3
3
Technical Overview
as shown in Figure 2-2. The RF mixer converts
the output of the on-chip LNA to the 5.6 GHz
band. The receiver output signals are then sent
to the AR5111 RoC.
2.1 Receiver (RX) Block
The receiver up converts a 2.4 GHz RF signal to
a 5.6 GHz signal, which is subsequently downconverted to baseband by the AR5111. The
input frequency range of the AR2111 receiver is
2.412 to 2.484 GHz.
The receive chain can be digitally powered
down to conserve power.
The receiver topology includes a low noise
amplifier (LNA), a radio frequency (RF) mixer
Antenna
Balun
LNA
2
RF Mixer
RFin
5 GHz
Receiver
Figure 2-2. RF Receiver Functional Block Diagram
2.2 Transmitter (TX) Block
The transmitter converts the incoming 5.6 GHz
signal from AR5111 to 2.4 GHz frequency band
and transmits the resulting signal into the
antenna as depicted in Figure 2-3. The inputs of
the transmitter are PA outputs of the AR5111.
The radio frequency (RF) mixer converts the
5.6 GHz signals into 2.4 GHz. These signals are
driven off-chip through a power amplifier. The
transmit chain can be digitally powered down
to conserve power.
Antenna
Power
Amplifier
2
From AR5111
RF Mixer
Balun
Transmitter
Figure 2-3. RF Transmitter Functional Block Diagram
4 • AR2111 Radio-on-a-Chip for 2.4 GHz Wireless LANs
4 • January 2003
Downloaded from Elcodis.com electronic components distributor
Atheros Communications, Inc.
Technical Overview
voltage controlled oscillator (VCO) provides
the desired LO signal based on a phase/
frequency locked loop. An external RC
network implements the loop filter. The
synthesizer in conjunction with the AR5111 can
generate 2.4 GHz RF outputs at 5 MHz channel
spacing.
2.3 Synthesizer (SYNTH) Block
The synthesizer is a phase-locked loop (PLL)
that generates the local oscillator (LO)
frequencies for the receiver and transmitter
mixers. The topology of the synthesizer is
shown in Figure 2-4. A signal generated from a
32 MHz crystal is used as the reference input
for the synthesizer. See “Bias/Control (BIAS)
Block” on page 5 for more details. An on-chip
On power up or channel reselection, the
synthesizer takes approximately 1 ms to settle.
Loop Filter
(off-chip)
Reference
Input
from crystal
Phase
Frequency
Detector
Charge
Pump
VCO
To
local
oscillator
Divider
Synthesizer
Channel
Select
Figure 2-4. RF Synthesizer Block Diagram
2.4 Bias/Control (BIAS) Block
The bias/control block provides the reference
voltages and currents for all other circuit blocks
(see Figure 2-5). An on-chip bandgap reference
circuit provides the needed voltage and current
references based on an external 6.19 kΩ ± 1%
resistor. The state of the AR2111 is controlled
through the control interface of the AR5211.
Bias
Ref erence
Resistor
Control
Interf ace
f rom
AR5211
Biasing
8
Control
Registers
Figure 2-5. Bias/Control Architecture
Atheros Communications, Inc.
Downloaded from Elcodis.com electronic components distributor
AR2111 Radio-on-a-Chip for 2.4 GHz Wireless LANs •
January 2003 •
5
5
Technical Overview
3. Typical Application
Figure 3-1 shows a typical configuration for a
transceiver built with the AR5001 chip set.
5 GHz
Tx
Tx
5 GHz
Rx
AR5111
Rx
RF Sw itch
a/b Ant
RxTx
2.4 GHz
Rx
2.4 GHz
Tx
PLL
AR5211
AR2111
Figure 3-1. Typical Application Block Diagram using the AR2111
4. Package Dimensions
The AR2111 is packaged in a 48-pin leadless
plastic chip carrier (LPCC). The LPCC can be
sourced from any one of two package
drawings. The external dimensions are
identical from all sources.
The LPCC package drawings and dimensions
are provided in Figure 4-1 and Figure 4-2 and
Table 4-1.
6 • AR2111 Radio-on-a-Chip for 2.4 GHz Wireless LANs
6 • January 2003
Downloaded from Elcodis.com electronic components distributor
Atheros Communications, Inc.
Technical Overview
2X
0.10
A
C
A
D
D/2
2
0.08
D1
A1
D1/2
2X
N
0.10
1
2
3
Pin #1 identifier
C
A
C
A3
B
E/2
E1/2
0.80 DIA.
E1
0.10
C
E
B
2X
B
0
TOP VIEW
0.10
C
A
2X
C
SEATING
PLANE
SIDE VIEW
b
4X P
0.10
M
C A B
D2
D3
D3/2
N
PIN1 ID
0.20 R.
4X P
1
2
0.45
3
4
3
A1
b
0.60 MIN.
E3
E2
(NE-1)Xe
REF.
SECTION "C-C"
SCALE: NONE
E3/2
S
0.25 MIN.
L
C C
0.25 MIN.
e
0.25 MIN.
CL
K
CL
(ND-1)Xe
REF.
BOTTOM VIEW
e
e
TERMINAL TIP
FOR ODD TERMINAL/SIDE
FOR EVEN TERMINAL/SIDE
Figure 4-1. LPCC “Package A” Drawing
Atheros Communications, Inc.
Downloaded from Elcodis.com electronic components distributor
AR2111 Radio-on-a-Chip for 2.4 GHz Wireless LANs •
January 2003 •
7
7
Technical Overview
A
D
B
D/2
INDEX AREA
(D/2 X E/2)
E
2
E
0.15
2X
C
0.15
2X
TOP VIEW
C
D2
D2
2
(DATUM B)
NX 0.2mm min
NX L
(DATUM A)
E2/2
(NE-1) X e
E2
2
1
DETAIL B
N-1
N
PIN 1
4
NX b
0.1 M C A B
e
(ND-1) X e
BOTTOM VIEW (GENERIC VIEW)
DETAIL B
(DATUM A OR B)
0.1
C
0.08
C
A3
A
NX
2
L
SEATING PLANE
A1
SIDE VIEW
C
e/2
e
TERMINAL TIP
4
TERMINALS
Figure 4-2. LPCC “Package B” Drawing
8 • AR2111 Radio-on-a-Chip for 2.4 GHz Wireless LANs
8 • January 2003
Downloaded from Elcodis.com electronic components distributor
Atheros Communications, Inc.
Technical Overview
Table 4-1. LPCC “Package A & B” Dimensions
Dimension Label
Min.
Nom.
Max.
Unit.
A
0.80
0.90
1.00
mm
b
0.23
0.25
0.28
mm
D
6.90
7.00
7.10
mm
E
6.90
7.00
7.10
mm
A3
0.20 REF
mm
D2
5.15
5.30
5.95
mm
A1
0.00
0.01
0.05
mm
e
0.50 Basic
mm
k
0.20
mm
L
0.30
0.40
0.50
mm
N
48
Number of
terminals
NE
12
Number of
terminals in Xdirection
ND
12
Number of
terminals in Ydirection
Notes:
1.
2.
3.
4.
Dimension and tolerance conform to ASME Y14.5M–1994.
Applied to exposed pads and terminals. Exclude embedded part of exposed pads from the measurement.
Applied only to terminals.
Dimension b applies to plated terminal and is measured from the terminal tip.
Atheros Communications, Inc.
Downloaded from Elcodis.com electronic components distributor
AR2111 Radio-on-a-Chip for 2.4 GHz Wireless LANs •
January 2003 •
9
9
Technical Overview
Table 4-2. LPCC “Package A only” Dimensions
Dimension Label
Min.
Nom.
D1
Max.
Unit.
4.14
mm
6.75 Basic
D3
3.85
4.00
E1
6.75 Basic
mm
E3
3.85
4.00
4.15
mm
J
0.60
1.00
1.50
mm
K
0.20
0.30
0.40
mm
P
0.24
0.42
0.60
mm
S
0.50
0.60
0.65
mm
θ
12° Max
Notes:
1.
2.
3.
4.
All dimensions are in millimeters, and all angles are in degrees.
Primary DATUM C and seating pane are defined by the spherical crowns of the solder balls.
Dimension b is measured at the maximum solder ball diameter, parallel to primary DATUM C.
There shall be a minimum clearance of 0.20 mm between the edge of the solder ball and the body edge.
Ordering Information
The order number is determined by the
selection of these options. See the following
example.
.
ARXXXX
X
XX
Version
Revision
Device Number
AR2111
An order number, AR2111A-00 specifies a
current version of the AR2111.
10
10
•
•
AR2111 Radio-on-a-Chip for 2.4 GHz Wireless LANs
January 2003
Downloaded from Elcodis.com electronic components distributor
Atheros Communications, Inc.
Technical Overview
Revision History
Revision
Description of Changes
January 2003
Initial release.
Atheros Communications, Inc.
Downloaded from Elcodis.com electronic components distributor
AR2111 Radio-on-a-Chip for 2.4 GHz Wireless LANs
January 2003
•
•
11
11
The information in this document has been carefully reviewed and is believed to be accurate. Nonetheless, this document is subject to
change without notice. Atheros assumes no responsibility for any inaccuracies that may be contained in this document, and makes no
commitment to update or to keep current the contained information, or to notify a person or organization of any updates. Atheros reserves
the right to make changes, at any time, in order to improve reliability, function or design and to attempt to supply the best product possible.
Document Number: 987-00006-001
Atheros Communications
Incorporated
529 Almanor Avenue
Sunnyvale, CA 94086
t: 408/773-5200
f: 408/773-9940
www.atheros.com
Subject to Change without Notice
Downloaded from Elcodis.com electronic components distributor