Download the XENPAK-10GB-SR-C Datasheet

PROLABS – XENPAK-10GB-SR-C
10GBASE-SR XENPAK 850nm Transceiver
XENPAK-10GB-SR-C Overview
PROLABS’s XENPAK-10GB-SR-C 10 GBd XENPAK optical transceivers are designed for Storage, IP network and LAN, it is a hot
pluggable module in the Z-direction that is mainly usable in typical router/switches line card applications. The XENPAK-10GB-SR-C
is a fully integrated 10.3 Gb/s optical transceiver module that consists of a 850nm wavelength VCSEL optical transmitter and
receiver, XAUI interface, Mux and Demux with clock and data recovery (CDR). In addition, they comply with the XENPAK Multi
Sourcing Agreement (MSA).
Product Features

Up to 10 GBd bi-directional data links.

Compliant with IEEE 802.3ae, 10GBASE-SR application.

Compliant with XENPAK MSA.

850nm VCSEL laser.

PIN Photo-detector.

XAUI electrical interface: 4 lanes @ 3.125 GBd.

MDIO, DOM (Digital Optics Monitoring) support.

Hot Z-Pluggable.

SC Connectors.

Up to 300m on MMF

Power Supply: 5V/3.3V/Adaptable Power Supply (APS: 1.2V)

RoHS Compliance

Operating temperature range: 0℃ to 70℃.
Applications

10 GBd Ethernet
Ordering Information
Part Number
XENPAK-10GB-SR-C
Description
10GBASE-SR XENPAK Transceiver, SC Connectors, 850nm, MultiMode Fiber 300m
Absolute Maximum Ratings
Parameter
Storage Ambient Temperature
Supply Voltage (3.3V)
Supply Voltage (APS)
Optical Receiver Input
Symbol
TS
V3
VAPS
PIMAX
Min
– 40
0
0
General Specifications
Parameter
Data Rate
Bit Error Rate
Total Power Consumption
Supply Voltage (+3.3V)
Supply Voltage (APS)
Supply Current (+3.3V)
Supply Current (APS)
Case Operating Temperature
Symbol
DR
BER
P
VCC3
VCCAPS
ICC3
ICCAPS
TC
Min
Typ
Typ
10.3125
Max
85
4
1.5
1
Unit
℃
V
V
dBm
Max
Unit
GBd
Remarks
Average
Remarks
-12
3.14
1.152
3.3
1.2
0
10
2.2
3.47
1.248
300
1000
70
W
V
V
mA
mA
℃
Operating Environment
Operating Environment
Link Distances
Parameter
10.3 GBd
Fiber Type
62.5/125um MMF
62.5/125um MMF
50/125um MMF
50/125um MMF
50/125um MMF
Modal Bandwidth @
850nm (MHz-km)
160
200
400
500
2000
Distance Range (m)
2-26
2-33
2-66
2-82
2-300
Optical Characteristics - Transmitter
VCC3=3.14V to 3.47V, VCCAPS=1.152V to 1.248V, TC=0℃ to 70℃
Parameter
Symbol
Min
Typ
Max
Unit
Optical Wavelength
840
850
860
nm

POUT
Launch Power
–7
–1
dBm
Average
POUT_OMA
Launch Power in OMA
– 4.3
– 2.8
dBm
Launch Power of OFF
POUT_OFF
– 30
dBm
Average
Transmitter
SMSR
Side Mode Suppression Ratio
30
dB
Spectral Width (RMS)
0.45
nm

ER
Optical Extinction Ratio
3
dB
OMA
Optical Modulation amplitude
525
uW
ORLT
Optical Return Loss Tolerance
12
dB
RIN
Relative Intensity Noise
– 128
dB/Hz
Transmitter Dispersion
TDP
3.9
dB
Penalty
Eye Mask Definition
According to IEEE 802.3ae and 10GBASE-SR
Optical Characteristics - Receiver
VCC3=3.14V to 3.47V, VCCAPS=1.152V to 1.248V, TC=0℃ to 70℃
Parameter
Symbol
Min
Typ
Center Wavelength Range
840
C
PIN
Optical Input Power
– 12.5
PIN_OMA
Receiver Sensitivity in OMA
PIN_S
Stressed Receiver Sensitivity
TRRX
Receiver Reflectance
Receiver electrical 3dB upper
FR
cutoff frequency
Max
860
0.5
– 11.1
– 7.5
– 12
Unit
nm
dBm
dBm
dBm
dB
12.3
GHz
Remarks
Remarks
Average, Informative
Informative
Optical Characteristics – Stressed Signal Calibration
VCC3=3.14V to 3.47V, VCCAPS=1.152V to 1.248V, TC=0℃ to 70℃
Parameter
Symbol
Min
Typ
Vertical Eye Closure Penalty
2.2
Stressed Eye Jitter
0.3
Max
Electrical Characteristics - DC
VCC3=3.14V to 3.47V, VCCAPS=1.152V to 1.248V, TC=0℃ to 70℃
Parameter
Symbol
Min
Typ
Max
A.
1.2V COMS I/O DC Characteristics (PRTAD; LASI; RESET; TX_ON/OFF)
External Pull-Up Resistor For
RPU
10
22
Open Drain
VOH
Output High Voltage
1
VOL
Output Low Voltage
0.15
VIH
Input High Voltage
0.84
1.2
VIL
Input Low Voltage
0.36
IPD
Input Pull-Down Current
20
120
B.
XAUI I/O DC Charateristics (TXLANE[0..3]; RXLANE[0..3])
Differential Input Amplitude
VIN_XAUI
200
1600
(pk – pk )
Differential Output Amplitude
VOUT_XAUI
800
1600
(pk – pk )
C.
MDIO I/O DC Charateristics (MDIO; MDC)
VOL
Output Low Voltage
0.2
IOL
Output Low Current
4
VIH
Input High Voltage
0.84
1.2
VIL
Input Low Voltage
0.36
VPU
Pull-Up Supply Voltage
1.2
CIN
Input Capacitance
10
CLOAD
Load Capacitance
470
RPU
External Pull-Up Resistance
200
Unit
dB
UIPP
Remarks
Unit
Remarks
kΩ
V
V
V
V
uA
VIN=1.2V
mV
AC Coupled
mV
AC Coupled
V
mA
V
V
V
pF
pF
Ω
IOL=100uA
Electrical Characteristics - AC
VCC3=3.14V to 3.47V, VCCAPS=1.152V to 1.248V, TC=0℃ to 70℃
Parameter
Symbol
Min
Typ
Max
Unit
A.
XAUI Input AC Characteristics (TXLANE[0..3])
BRXAUI_IN
Baud Rate
3.125
GBd
BRTOL_XAUI
Baud Rate Tolerance
– 100
100
ppm
ZIN_XAUI
Differential Input Impedance
100
Ω
RLIN
Differential Return Loss
10
dB
TIN_SKEW
Input Differential Skew
75
ps
JXAUI_TOL
Jitter Amplitude Tolerance
0.65
UIPP
B.
XAUI Output AC Charateristics (RXLANE[0..3])
BRXAUI_OUT
Baud Rate
3.125
GBd
BRXAUI_VAR
Baud Rate Variation
– 100
100
ppm
XAUI Eye Mask (far-end)
According to IEEE 802.3ae
Output Differential Skew
TOUT_SKEW
ps
15
ZOUT_XAUI
Output Differential Impedance
100
Ω
Differential Output Return
RLOUT
10
dB
Loss
TJXAUI
Total Jitter
0.35
UI
DJXAUI
Deterministic Jitter
0.17
UI
C.
Power-On Reset Charateristics
Power-On Reset and
According to XENPAK MSA Issue
TX_ONOFF Charateristics
D.
MDIO I/O AC Charateristics (MDIO; MDC)
THOLD
MDIO Data Hold Time
10
ns
TSU
MDIO Data Setup Time
10
ns
Delay from MDC Rising Edge
TDELAY
to
300
ns
MDIO Data Change
fMAX
MDC Clock Rate
2.5
MHz
Remarks
100 MHz to 2.5 GHz
Crossing Point
IEEE 802.3ae
DC
100 MHz to 2.5 GHz
Near-end No pre-equalization
1 UI=320 ps
Dimensions
ALL DIMENSIONS ARE ±0.2mm UNLESS OTHERWISE SPECIFIED
Pin Assignment – Pin 1 to Pin 35
PIN #
1
2
3
4
5
6
7
8
Symbol
GND
GND
GND
RESERVED
3.3V
3.3V
APS
APS
I/O
I
I
I
Logic
Supply
Supply
Supply
I
I
I
I
Supply
Supply
Supply
Supply
9
LASI
O
Open Drain
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
RESET
VEND SPECIFIC
TX ON/OFF
RESERVED
MOD DETECT
VEND SPECIFIC
VEND SPECIFIC
MDIO
MDC
PRTAD4
PRTAD3
PRTAD2
PRTAD1
PRTAD0
VEND SPECIFIC
APS SET
RESERVED
APS SENSE
APS
APS
3.3V
3.3V
RESERVED
GND
GND
GND
I
1.2V CMOS
I
1.2V CMOS
O
I/O
I
I
I
I
I
I
Open Drain
1.2V CMOS
1.2V CMOS
1.2V CMOS
1.2V CMOS
1.2V CMOS
1.2V CMOS
O
O
I
I
I
I
Analog
Supply
Supply
Supply
Supply
I
I
I
Supply
Supply
Supply
Description
Electrical ground
Electrical ground
Electrical ground
Reserved
Power
Power
Adaptive Power Supply
Adaptive Power Supply
Link Alarm Status Interrupt. 10-22k ohm pull up on
host
TX OFF when MDIO RESET
Vendor Specific Pin. Leave unconnected
Transmitter ON/OFF
Reserved
Pulled low inside module through 1k ohm
Vendor Specific Pin. Leave unconnected
Vendor Specific Pin. Leave unconnected
Management Data IO
Management Data Clock
Port Address bit 4 (Low=0)
Port Address bit 3 (Low=0)
Port Address bit 2 (Low=0)
Port Address bit 1 (Low=0)
Port Address bit 0 (Low=0)
Vendor Specific Pin. Leave unconnected
Feedback output for APS
Reserved for Avalanche Photodiode use
APS Sense Connection
Adaptive Power Supply
Adaptive Power Supply
Power
Power
Reserved
Electrical Ground
Electrical Ground
Electrical Ground
Remarks
Pin Assignment – Pin 36 to Pin 70
PIN #
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
Symbol
GND
GND
RESERVED
RESERVED
GND
RX LANE 0+
RX LANE 0–
GND
RX LANE 1+
RX LANE 1–
GND
RX LANE 2+
RX LANE 2–
GND
RX LANE 3+
RX LANE 3–
GND
GND
GND
TX LANE 0+
TX LANE 0–
GND
TX LANE 1+
TX LANE 1–
GND
TX LANE 2+
TX LANE 2–
GND
TX LANE 3+
TX LANE 3–
GND
RESERVED
RESERVED
GND
GND
I/O
I
I
Logic
Supply
Supply
I
O
O
I
O
O
I
O
O
I
O
O
I
I
I
O
O
I
O
O
I
O
O
I
O
O
I
Supply
AC
AC
Supply
AC
AC
Supply
AC
AC
Supply
AC
AC
Supply
Supply
Supply
AC
AC
Supply
AC
AC
Supply
AC
AC
Supply
AC
AC
Supply
I
I
Supply
Supply
Description
Electrical ground
Electrical ground
Reserved
Reserved
Electrical ground
Module XAUI Output Lane 0+
Module XAUI Output Lane 0–
Electrical ground
Module XAUI Output Lane 1+
Module XAUI Output Lane 1–
Electrical ground
Module XAUI Output Lane 2+
Module XAUI Output Lane 2–
Electrical ground
Module XAUI Output Lane 3+
Module XAUI Output Lane 3–
Electrical ground
Electrical ground
Electrical ground
Module XAUI Input Lane 0+
Module XAUI Input Lane 0–
Electrical ground
Module XAUI Input Lane 1+
Module XAUI Input Lane 1–
Electrical ground
Module XAUI Input Lane 2+
Module XAUI Input Lane 2–
Electrical ground
Module XAUI Input Lane 3+
Module XAUI Input Lane 3–
Electrical ground
Reserved
Reserved
Electrical Ground
Electrical Ground
Remarks
Electrical Pad Layout
Top of Transceiver PCB
References
1. IEEE standard 802.3. IEEE Standard Department, 2002., 10GBASE-SR
2. XENPAK Multi-Source Agreement (MSA).
Bottom of Transceiver PCB
As viewed through top