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Solutions for Homework 1 [Problem 1] [Problem 2] [Problem 3] First we draw the pull-up graph for the given pull-up circuit. Next we draw the pull-down graph according to the pull-up graph. The pull-up and pull-down graphs are shown as following: Finally, the pull-down circuit can be derived from the pull-down graph, shown as following: [Problem 4] In (a), the transistor sees Vgs=VDD and Vds=VDS. The current is In (b), the bottom transistor sees Vgs=VDD and Vds=V1. The top transistor sees Vgs=VDD V1 and Vds= VDS -V1. The currents for the bottom and top transistors are identical. That is, . Solving for V1, we find Substituting V1 into IDS2 equation and simplifying gives IDS1=IDS2. [Problem 5] (a) Since nMOS transistor can pass strong 0, we have Vout=0. (b) The output of the first pMOS is |Vtp| since pMOS transistor pulls no lower than | Vtp |. For the second pMOS, its output will discharge until Vout equals to | Vtp | (gate voltage) + | Vtp | (threshold of pMOS). Thus, the final voltage of Vout is 2| Vtp |. (c) The output of the pMOS is |Vtp| since pMOS transistor pulls no lower than | Vtp |. For the nMOS, its output is | Vtp | (when | Vtp | is smaller than VDD - Vtn). (d) The output of the pMOS is VDD since pMOS can pass strong 1. The output of the nMOS is VDD - Vtn. [Problem 6] (a) nMOS transistor can pass strong 0. When Vin=0V, we have Vout=0V. (b) When Vin=0.6V, the output will be charged until any of the two conditions (Vout =Vin or Vout = VDD - Vt) is met. Since VDD - Vt= 1.2V-0.4V=0.8V and Vin=0.6V, we have Vout =Vin =0.6V. (c) When Vin=0.9, the output will be charged until any of the two conditions (Vout =Vin or Vout = VDD - Vt) is met. Since VDD - Vt= 1.2V-0.4V=0.8V and Vin=0.9V, we have Vout = VDD - Vt =0.8V. (c) When Vin=1.2, the output will be charged until any of the two conditions (Vout =Vin or Vout = VDD - Vt) is met. Since VDD - Vt= 1.2V-0.4V=0.8V and Vin=1.2V, we have Vout = VDD - Vt =0.8V