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Chapter 8: Hybrid Technology and Multichip Modules • Hybrid = mixture, i. e.: Components and wiring integrated on the substrate Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 1 Types of Hybrids and Multichip Modules • Thick film technology –High temperature thick film hybrid technology –Polymer thick film hybrid technology • Thin film technology –Conventional thin film technology (one conductor layer) –Multilayer thin film technology • Multichip modules: –Multilayer ceramic (MCM-C) (C for ceramic) –Multilayer thin film (MCM-D) (D for deposited) –Multilayer fineline circuit boards (MCM-L) (L for laminated) Please also confer to Chapter 5. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 2 High Temperature Thick Film Technology • Important substrate properties –Dimensional stability –Good adhesion –High thermal conductivity –Thermal compatibility with components –High electrical resistivity –Low dielectric constant (not satisfied in alumina) –Low dielectric loss tangent –Good machinability (not satisfied in ceramics) –Low price Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 3 High Temp Thick Film, continued • Practical materials –Alumina –Aluminium nitride –(Beryllia) –(Silicon carbide) Table 8.1: Properties of substrate materials for hybrid technology. P: Plastic In: Insulator Material Al2O3 ceramic (99.5% pure) Al2O3 ceramic (96% pure) Sapphire Dielectric Loss Relative Factor permit- (at 10 ivity GHz, r 25°C tan Specific Linear Thermal Thermal Conduct- Expansion ivity Kth Coefficient [W/cm (at 25°C l/l/T °K] [10-6/°K] Temperature Coefficient of Type Remarks T [10-6/°K] 9,8 0,0001 0,37 6,3 +136 9,4 0,001 9,4; 1,6 0,0001 0,35 0,42 6,4 6 0,0001 0,0036 0,017 0,012 0,55 4,6 0,006 2,1 6,1 0,002 0,46 5,7 Semi 0,015 1,45 4,2 Semi 0,0003 0,002 106 +350 P 0,0007 0,001 0,005 0,003 2,2 3,93 108 16-100 23,8 17 1,5 +480 P P Quartz glass 3,78 Corning glass 5,75 Beryllium oxide Ceramic (BeO) 6,3 (98%) Semi-Insulating GaAs 12,9 (High-resistive) Silicon 11,9 (=103 ohm cm) PTFE 2,1 Polyolefin (Glass reinforced) 2,32 PTFE 2,55 Aluminium Copper Invar +110 +140 +13 +107 Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules In In -In Anisotropic In In In Dust is poisonous For comparison Slide 4 Conductor Materials • Composition –Functional element (metal paticles) –Binder (glass particles) –Solvents • Desired properties –High electrical conductivity –Good adhesion to substrate –Good solderability –Good bondability –Low price Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 5 Conductor Materials, continued Comparison of Parameters for Thick-film Conductors • Practical AgPd Cu Resistivity (mohm/) 25 1,8 functional Sheet Breakdown Current (mA/mm width) 3000 10000 10-20 15-30 element Thickness Minimum With (µm) 150 150 –Gold –Ag/Pd –Ag/Pt –Copper Through-hole Diameter Number of conductor layers Substrate Area (cm2) Substrate Thickness (mm) 0,4-1,5 1-3 0,2-100 0,6-1 0,4-1,5 1-5 0,2-200 0,6-1 Tin-Lead Soldering Properties on Thick Film Conductors Parameter AgPd Cu Solderability Good Good Wetting Good Good-excellent Leach Resistance Fair-good Excellent Adhesion Excellent Excellent Visual Quality Good Excellent Au 2,5 10000 5-15 50 1-5 0,2-50 0,25-1 Au Unsolderable - Table 8.2 Properties of thick film conductor systems Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 6 Thick Film Resistors • Important properties –Large range of resistor values –High stability –Low thermal coefficient of resistivity –Low voltage coefficient of resistivity –Low noise • Materials –Oxides of ruthenium –Oxides of iridium, rhodium, osmium –Sheet resistance: 1 - 109 ohms/sq Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 7 Properties of Thick Film Resistors Tolerances as fired Tolerances, laser trimmed TCRs: 5 to 100K ohm/sq (-55° to 125°C) 100K to 10M ohm/sq (-55° to 125°C) Resistance drift after 1,000 hr at 150°C no load Resistance drift after 1,000 hr at 85°C with 25 watts/in2 Resistance drift, short term overload (2.5 times rated voltage) Voltage coefficient Noise (Quan-Tech): At 100 ohm/sq At 100 Kohm/sq Power ratings ±0.5 - ± 1% ±100 - ±150 ppm/°C ±150 - ±750 ppm/°C +0.3 to -0.3% 0.25 to 0.3% <0.5% 20 ppm/(V) (in) -30 to -20 dB 0 to +20 40-50 watts/in2 Table 8.3: Typical properties of thick film resistors. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 8 Termination of Thick Film Resistors Fig. 8.2: Thick film resistor with termination Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 9 Insulators / Dielectrics • Desired properties: –High insulation resistance –High breakdown field –Low dielectric constant (insulation) –Suitable/high dielectric constant (dielectric) –Low temperature coefficient (dielectric) –Low voltage coefficient (dielectric) –Low loss tangent –Little porosity Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 10 Insulators / Dielectrics, continued • Materials –Aluminium oxide/glass (insulator) –Ceramics/glasses as for capacitors (dielectric) –Please also see Chapter 4 Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 11 Insulators / Dielectrics, continued Capacitor Capacitance Absolute range Tolerance [%] Thick-film I 2 pF/mm2 5 - 20 Thick-film II 8 pF/mm2 10 - 30 Thick-film III 50 pF/mm2 10 - 30 Thick-film IV 150 pF/mm2 10 - 30 Ceramic-chip 1 p F - 4 nF 1 - 10 NPO Ceramic-chip 0.1 - 1.5 nF 3 - 20 X7R Tantalum-chip 0.1 - 100 µF 5 - 20 Isolation Resistance [Mohm] 12 >106 50 >104 500 >104 2000 >103 10 >105 Tan TCC [%] <0.25 <1.5 <2.0 <4.0 <0.1 [ppm/°C] 45 500 2000 -400 ±30 50-200 50-200 50-200 50-200 50-200 1200 >105 <2.5 800 50-200 Maximum <6.0 leakage current 0.5 - 3 µA 500 4 - 50 25 Voltage Range Table 8.4: Typical properties of printed and discrete capacitors. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 12 Production Process for High Temperature Thick Film Technology • Layout and photolithographics –CAD work –Photo or laser plotting of master films –Printing screens made with master films Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 13 Production process, continued • Printing process –Printing –Drying at 100 - 150 °C –Firing at 700 - 1000 °C Fig 8.1: Typical temperature profile for thick film firing. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 14 Production process, continued •Testing and laser trimming –Initial value targeted 20 - 30 % below specified value –Laser trimming to increase resistance within ± 0.5 or ± 1.0 % Fig. 8.4: Probe card for testing of thick- and thin film hybrid circuits. Coaxial probes are used for high frequency signals. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 15 Laser trimming a) b) c) Fig. 8.5: Laser trim cut forms: a): L-cut, the most common b): Top hat plunge cut c): Digital trimming, which is most used for high precision thin film resistors Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 16 Laser trimming, continued Fig. 8.6: Laser trimmer for thick film hybrid circuits, ESI Model 44. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 17 Production process, continued Fig. 8.7: Process flow for mounting of thick film hybrid circuits based on: a): Naked ICs and gluing of discrete components. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 18 Production process, continued Fig. 8.7: Process flow for mounting of thick film hybrid circuits based on: b): Soldering of packaged ICs and discrete components. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 19 Polymer Thick Film Technology • In polymer thick film hybrid technology (PTF) conductors, resistors and insulating layers use a polymer matrix instead of glass matrix, and these are made in several layers on ordinary printed wiring board laminates, flexible substrates and injection moulded plastic materials that can serve as combined printed circuits and chassis. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 20 Polymer Thick Film, continued • Advantages –Low price –Simple processes –Fast production throughput –Well suited for repair/modification –Printed resistors possible –Additive technology –Printed wiring boards for substrates –Specialities: • Membrane switch panels • Contacts Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 21 Polymer Thick Film, continued • Limitations –Satisfies only moderate environmental requirements –Low/moderate complexity –High sheet resistivity in conductors –Special design rules –Limited solderability –Limited shelf life for pastes –Limited availability Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 22 Polymer Thick Film, continued Fig. 8.8: Polymer Thick film (PTF) carbon technology, for: a): Keyboard contacts. b): Contacts of LCDdisplays. c): Sliding potentiometer. CPTF means carbon type PTF. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 23 Polymer Thick Film, continued • Materials –Matrix: Thermosetting /thermoplastic polymer –Conductor: Ag, Cu, C –Solvents –Additives to adjust consistency • Ceramic or other additives Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 24 Polymer Thick Film, continued • A typical process –The starting material is a laminate with a single sided etched conductor pattern in Cu foil • • • • • • • • • • • 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. Cleaning of the board Printing of PTF insulation layer, 2 prints, drying in between Drying UV curing Printing of PTF conductor Drying Curing in IR in-line furnace Chemical plating of metal (Optional) Printing of top layer Drying Curing in IR furnace. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 25 Polymer Thick Film, continued Fig. 8.9: Membrane switch panel, principle. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 26 PTF, continued Fig. 8.10: PTF based printed wiring boards: a): Single sided board with PTF for one complete conductor layer on top of one Cu foil conductor plate. b): Double sided, through hole plated board with one extra PTF conductor layer on each side. c): Double sided board through hole printed PTF conductor, instead of through hole plating. d): PTF resistor Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 27 Thin Film Technology • Substrate materials –Alumina, glass, silicon • Conductor materials –Gold, aluminium • Resistor materials –NiCr (Chromnickel), Ta2N (Tantalnitrid) • Insulation/dielectrics/passivation materials –SiO2 (Silicon dioxide), SiN3 (Silicon nitride), Al2O3 (Silicon nitride), Ta2O5 (Tantaloxide) Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 28 Thin Film Technology, continued Material NiCr (nickel-chrome) Cr (chrome) Ta (tantalum) Ta2N (tantalum-nitride) Ti (Titanium) Cr-SiO Cement Specific Surface Resistance (t<< Rf = / t (in ohm) Temperature Coefficient of the resistance, Stability R/(R T) R/(R T) (in 10-6/°K) (in %/1000h) Production method 40 - 250 10 - 500 40 - 200 -100 - +100 -300 - +300 -200 - +200 <0,2 good medium <1 medium Evap Evap Sp 10 - 100 5 - 2000 500 - 2000 -60 - +30 -500 - +500 -250 - +250 <0,2 good medium <0,5 medium Reactive sp Evap Flash sp Table 8.5: Properties of thin film resistors. (: skin depth. Evap: Vacuum evaporation. Sp: Sputtering) Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 29 Thin Film Processin g • Photolithography and etching • Vacuum evaporation • Sputtering • Plating • Oxidation Fig. 8.11: Process flow for production of thin film hybrid circuits. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 30 Thin Film Processing, continued Fig. 8.12 : Structure of thin film resistor with gold termination. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 31 Thin Film Processing, continued Fig. 8.13: Thin film microwave circuit, schematically. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 32 Thin Film Processing, continued Fig. 8.14: Thin film transistors, structure. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 33 Thin Film Processing, continued • Circuit production • Glueing • Wire bonding • Testing • Packaging in hermetic (metal) box Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 34 Multilayer Thin Film - MCM-D • Process –1. Spinning polyimide insulation –2. Deposition Al metallization –3. Photolithography, wet etch –4. Spinning polyimide –5. Etching vias –6. Repetition steps 1 - 5 –7. Metallization and etching of metal Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 35 MCM-D, continued Fig. 8.15 a): AT&T´s structure for multilayer thin film. Please also see also Figure 2.13. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 36 MCM-D, continued Fig. 8.15 b): Cross section of Raychem´s High Density Interconnect (HDI) schematically and observed through microscope. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 37 MCM-D, continued Fig. 8.16: Elements of the design rules for Raychem´s HDI technology Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 38 MCM-D, continued Fig. 8.17: Character istic impedance for Raychem´s HDI as function of the ratio between conductors width and dielectric thickness. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 39 MCM-D, continued Fig. 8.18a): Dissipation factor for Raychem´s HDI Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 40 MCM-D, continued Fig. 8.18. b): Typical attenuation, as function of frequency, for Raychem´s HDI. Even at 10 GHz attenuation in the conductor metal dominates. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 41 MCM-D, continued • Advantages • Optimal thermal match when Si substrate • High thermal conductivity in Si: 150 W/°C x m • Termination resistors and decoupling capacitors integrated in substrate • Compatibility with: – Wire bonding – TAB – Flip chip • • • • Very high conductor density/package density Very good high frequency properties Good mechanical properties of Si substrate High reliability Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 42 MCM-D, continued • Disadvantages: –Low availability and high cost –Polyimide is hygroscopic –Important properties change –Reliability problems –Hermetic encapsulation necessary –Immature technology Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 43 Multilayer Ceramic Modules - MCM-C • Materials –Alumina –Aluminium nitride • Pioneer: IBM • Fabrication: Green Tape process Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 44 MCM-C, continued Fig. 8.19: Production process for multilayer ceramic, schematically. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 45 MCM-C, continued • Advantages –High thermal conductivity –Low TCE, match to Si, GaAs, SMDs –Compatible to flip chip, wire bonding, TAB, SMD soldering –Control over characteristic impedance –Hermetic encapsulation possible, high reliability –Many conductor layers, high yield –Edge contacts, etc. brazed on Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 46 MCM-C, continued • Disadvantages –Low electrical conductivity in inner layers (Rsq ≈ 15 mOhm/sq) –High dielectric constant, r ≈ 9 - 10 –High startup cost for custom specific circuits Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 47 MCM-C, continued Fig. 8.20: Combination of naked chips in cavities and soldered, packaged SMD components on multilayer ceramic module Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 48 MCM-C, continued Fig. 8.21.a: Characteristic impedance for typical geometries and dimensions, Al2O3-based multilayer ceramic: a): Open microstrip. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 49 MCM-C, continued Fig. 8.21.b: Characteristic impedance for typical geometries and dimensions, Al2O3-based multilayer ceramic: b): Buried microstrip. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 50 MCM-C, continued Fig. 8.21.c: Characteristic impedance for typical geometries and dimensions, Al2O3-based multilayer ceramic: c): Stripline. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 51 MCM-C, continued Table 8.6: Properties of alumina-based high temperature multilayer ceramic. Ceramic Property Al203 content Density Rel. dielectric const. (1 MHz) Loss tangent (1 MHz) Breakdown field Resistivity Thermal coeff. of expansion (0-100°C) Thermal coeff. of expansion (0-300°C) Thermal conductivity Specific heat Module of elasticity Colour Unit Black White % 90 92 3,60 3,60 g/cm3 9,5 9,0 % 1,3 0,3 kV/mm 10 10 ohm cm 1014 1014 ppm/°C 5,0 5,0 ppm/°C 6,5 6,5 W/m x °C 15 17 W s/g x °C 80 84 N/mm2 3x105 3x105 Conductors Property Tungsten Sheet resistivity (0.1 mm con. width) (0.2 mm - " - ) (0.3 mm - " - ) Thermal coefficient of resistance Plated (W + Ni + Au) Sheet resistivity Unit Value ppm/°C 20 14 12 4300 mohm/ 3-4 mohm/ Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 52 Low Temperature Multilayer Ceramic Modules - LTMCM-C • Substrate materials –Glasses, glass ceramics: • Mullite, corderite, lead borosilicate glass... –Conductors • Gold, silver, AgPd –Resistors • Similar to thick film • Properties: Table 8.7. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 53 LTMCM-C, continued Inner Layer (Co-fired) Gold Silver Silver/Platinum Top Layer (Post fired) Gold Platinum/Gold Silver/Palladium Silver Resistance [mohm/sq] Fired Thickness [µm] 5 5 20 7 8 8 4 80 20 4 8 15 15 15 Table 8.7: Electrical and physical properties of low temperature multilayer ceramic. a): Electrical properties. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 54 LTMCM-C, continued 100 ohm/sq 10 Kohm/sq 100 Kohm/sq Over Tape R [ohm/sq] HCTR [ppm/°C] 122 +20 10,0 k +71 92,4 k +75 Over Thick Film Dielectric R [ohm/sq] HCTR [ppm/°C] 102 +65 12,5 k +41 95,7 k +73 Table 8.7: Electrical and physical properties of low temperature multilayer ceramic. b): Resistor Performance - Resistance and TCR. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 55 LTMCM-C, continued Table 8.7: Electrical and physical properties of low temperature multilayer ceramic. c) Physical properties. Thermal expansion Fired dielectrics 96% alumina Fired density Theoretical Actual Camber Fired 68 x 68 mm2 (2.7 x 2.7 in2) Surface smoothness Fired dielectric 50 x 50 mm2 (2 x 2 in2) Thermal conductivity Fired dielectric Flexure strength Fired dielectric 96% Alumina Flexure modulus Fired dielectric 96% Alumina 7,9 ppm/°C 7,0 ppm/°C 3,02 g/cm3 >2.89 g/cm3 (>96%) ±75 µm (±3 mil.) 0,8 µm/50mm (Peak to peak) 15 - 25% of alumina 2,1x103 kg/cm2 (3,0x104 psi) 3,8x103 kg/cm2 (5,6x104 psi) 1,8x106 kg/cm2 (2,5x107 psi) 0,9x106 kg/cm2 (1,3x107 psi) Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 56 LTMCM-C, continued • Advantages –Low process temperature –Most process steps can be done in high temperature thick film production line –Flexibility in conductor materials, low sheet resistivity –Plating not necessary for bonding –Screen printed resistors –Low r dielectric materials Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 57 LTMCM-C, continued • Disadvantages –New, immature technology –Low thermal conductivity –Brittle materials –Low availability Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 58 Power Electronic Modules • Challenges –Spread the heat, reduce thermal resistance –Reduce thermal stress –Provide electrical insulation for ≥2.5 kV –Design for EMC, reduce L –Higher integration "smart power” Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 59 Power Electronic Modules, continued • Technologies –Polymer on metal –Thick film –Plated ceramic substrate –Direct copper bonding (DCB) –Plasma sprayed dielectric on metal base –Direct Copper Bonding Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 60 Power Electronic Modules: Direct Copper Bonding Fig. 8.22 a): The coefficient of thermal expansion for direct copper bonding (DCB) substrates with a layer of 0,6 mm alumina sandwiched between Cu layers of various thicknesses as given in the figure. b): The number of thermal cycles to fracture for DCB substrates with varies Cu thickness. The cycles were in the temperature interval -40 - +110°C. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 61 Direct Copper Bonding, continued Fig. 8.23: Power electronic module [Toshiba data sheet]. The substrate (top) is DCB with AlN insulation. It is soldered to a heavy Cu plate, environmentally protected with silicone gel and mounted in a plastic package with heavy screw terminals. Each of the transistor chips and diode chips conducts up to 50 A current. Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 62 Combination Technologies •Multilayer thin film - on multilayer ceramic a) Fig. 8.24: High performance modules made in a combination of multilayer thin film and multi layer ceramic technology: a): NEC Corporation computer SX-3 using flop TAB carrier on thin film and alumina based substrate. b): IBM Enterprise System/9000 packaging hierarchy using flip chip, polyimide/copper thin film on 63 layers glass ceramic substrate. b) Electronic Pack….. Chapter 8: Hybrid Technology and Multichip Modules Slide 63 Combination Technologies, continued • Thin film - on - thick film (ame, Horten). Fig.8.25: 1. Alumina substrate. 2.a,b,c,d: Printed conductor on first layer. 3. Printed dielectric film. 4. Optional compensation printed in vias. 5.a,b,c: Printed conductor on second layer. 6. Glass based dielectric. 7. a,b,c,d: Tantalum nitride resistive layer. Electronic Pack….. 8.a,b,c,d: Molybdenum diffusion barrier. 9.a,b,c: Thin film gold lines. 10. Via hole between thin film and thick film conductive layer. 11. Contact area in thick film. Goldplatinum or gold-palladium. 12.a,b: Resistor in thin film made by selective etching in thin film structure Chapter 8: Hybrid Technology and Multichip Modules Slide 64