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Solid State Device
Homework Assignment #7
7.1. A BJT in common emitter mode has an input voltage and output voltage shown as below. The cut-off
voltage is 0.7V, while the saturation voltage is 0.2V. The common emitter gain is 100. The input resistance
RB is 50 k while the output resistance RC is 1 k. VCC = 5.2 V.
Plot the expected Vo-Vin graph as quantitatively as possible based on the above information, including
slopes, transition voltages, input output values etc [20]
7.2
The picture shows a Darlington pair, which consists of 2 npn BJTs in the active mode. We assume that
each has a base emitter voltage drop VBE = 0.7V.
Find the four currents shown [5 x 4 = 20]
These are npn transistors. There is a voltage drop of 0.7V across each, so
the voltage across the rightmost leg is 19-2 x 0.7 = 17.6V. From Ohm’s
Law, we then get
I4 = 17.6V/150 = 117.33 mA. Note that this is the emitter current.
Since the collector current is  times the base current, the emitter
current is (+1) times the base current, ie, 31 times the base current. So
the base current into the second transistor
I3 = I4/31 = 3.78 mA
By the same logic, the base current into the first
I1 = I3/86 = 44 A
Finally, I2 is the collector current in the second transistor, and thus
I2 = I3 x 30 = 113.4 mA
The net gain across the Darlington pair is thus (+1) x (+1)
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