Download Chapter 10 Solutions

CHAPTER 10
10.1
V 
IC 2
0. 995  F I EE
 exp  BE   V BE  0. 025 ln
 0.132 V
I C1
0. 005  F I EE
 V T 
(a ) v I  V REF  V BE  1. 25  0.132  1.12 V
v I  V REF  V BE  1. 25  0.132  1. 38 V
(b) v I  V REF  V BE  2. 00  0.132  1. 87 V
v I  V REF  V BE  2. 00  0.132  2.13 V
10.2
Since V
REF
 1. 25 V, v I  1. 6 V  Q1 off and Q
v C1  0 V and v
10.3
Since V
REF
C2
C1
conducting
  F I EE R C  I EE R C  2 mA 350   0. 700 V
 2 V, v I  1. 6 V  Q 2 off and Q
v C2  0 V and v
2
1
conducting
  F I EE R C  I EE R C  5mA 350    1. 75 V
Note that Q1 is beginning to enter the saturation region of operation, but VBC = +0.15 V is
not really enough to turn on the collector-base diode. (See Problems 10.5 or 5.36.)
10.4
v I  V REF  0. 3 V  Q 1 on; Q 2 off . I C1   F IEE  I EE  0. 3 mA | I C 2  0
v C1  0  IC1 R1  R C   0. 3mA 3. 33 k  2 k  1. 60 V
v C2  0  I C1 R1  0. 3mA 3. 33 k  0. 999 V
10.5 With VBE = 0.7 and VBC = 0.3, the transistor is technically in the saturation region,
but calculating the currents using the transport model in Eq. (5.13) yields
F 
F
0. 98

 49 |
1   F 1  0. 98
R 
R
0. 2

 0. 25
1   R 1  0. 2
  0. 7 
 0. 3
i C  10 15 exp 
 exp 
0. 025
 0. 025 
 10 15

 0. 25
  0. 3  
exp 
 1  1. 446 mA

 0. 025  

  0. 7 
 0. 3
i E  10 15 exp 
 exp 
0. 025
 0. 025 
 10 15


49
  0. 7  
exp 
 1  1. 476 mA

 0. 025  

iB 
10 15
49

 0. 7   10 15
exp

  1 

0. 025  

 0. 25

 0. 3  
exp 
  1  29 . 52 A

0. 025  


At 0.3 V, the collector-base junction is not heavily forward-biased compared to the baseemitter junction, and I C  48 . 99 I B  F I B . The transistor still acts as if it is operating in
the forward-active region.
1
10.6 (a) For Q2 off, VOH = 0 V. For Q2 on, IC ≈ IE and
IE 
0. 2  0. 7  2 
 100 A
1. 1x10 4
V OL  4000 I E  0. 400 V
(b) Yes, these voltages are symmetrically positioned above and below VREF, i. e. VREF ± 0.2 V,
and the current will be fully switched. See Parts (d) and (e).
(c) For vI = 0 V, I C  I E 
0  0. 7  2 
 118 A
1.1x10 4
R =
0. 4 V
 3. 39 k
118 A
(d) Q2 is cutoff. Q1 is saturated with VBC = +0.4 V.
(e) Q1 is cutoff. Q2 is saturated with VBC = +0.2 V.
(f) 0.2 V and 0.4 V are not large enough to heavily saturate Q1 or Q2. Although the
transistors are technically operating in the saturation region, the transistors still behave as
if they are in the forward-active region. (See problem 10.5).
10.7
V OH  0  V BE  0. 7 V |
V REF 
V OL   5mA 200   0. 5  1. 70 V
V OH  VOL
 1. 2 V |
2
V = 5 mA 200   1 V
10.8
I EE  5 0. 3mA   1. 5 mA | I 3  I 4  5 0.1mA   0. 5 mA | R C 
2k 
 400 
5
10.9
V
0. 8 V

 2. 67 k  | V OH  0  V BE  0. 7 V | V OL  0. 8  V BE  1. 5 V
a  R C 
V REF
I EE
0. 3 mA
V
 VOL
 OH
 1.10 V
2
 V
 0. 8
V
0. 8
 V T ln 
1  
 0. 025 ln 

 1
  0. 314 V
b  NM H  NM L 


2
2
0. 025
 V T

(c) For Q1: VCB = -0.8 - (-0.7) = -0.1 V which represents a slight forward bias, but it is not
enough to turn on the diode. For Q2: VCB = -0.8 - (-1.10) = +0.3 V which represents a
reverse bias. Both values are satisfactory for operation of the logic gate.
10.10
b  For Q 1 on and Q
2
off , I C1   F I EE  I EE  0. 3mA | I C 2  0
v OL  0  I C1 R1  R C   0. 7 V  0. 3 mA 3. 33 k  2 k  0. 7 V  2. 30 V
v OH  0  I C1 R 1  0. 7 V  0. 3 mA 3. 33 k   0. 7  1. 70 V
V  V OH  V OL  0. 600 V
V OH  V OL
 2. 0 V  V REF | Yes , the input and output voltage levels are
2
compatible with each other and are symmetrically placed around V
REF .
c 
2
R1
RC
RC
Q
Q
3
v
4
v O2
O1
v
Q
1
Q
I
2
V
REF
0.1 mA
0.1 mA
IEE
- 5.2 V
10.11
a  See Prob . 10 .10
0. 4 V
 200 
b  V   F I EE R C  I EE R C | R C 
2 mA
V OH  0   F IEE R 1  V BE  I EE R 1  V BE  2mA 600   0. 7 V  1. 90 V
V OL  0   F IEE R1  R C   V BE  I EE R1  R C   V BE  2mA 800   0. 7 V  2. 30 V
V REF 
V OH  VOL
1. 90  2. 30

 2.10 V
2
2
10.12
V  V BE  iB 4 R C | Let the Fanout
currents that must be supplied from emitter
= N and  F = 20 . Then there will be N base
- follower transistor Q
4
: i E 4  N
I EE
 F 1


 I 
I C 4  I C 4
I  IE 4
I EE
 V T ln E 4
 V T ln 1  E 4  . 025 ln 1  N
IC 4
IE 4
I E 4 
 F  1 I E 4 


i E 4
I EE

N
. Using a worst case value of
 F = 20 ,
F  1
 F  1 2
V BE  V T ln
iB 4

0. 3mA 
0. 3mA
V  V BE  iB 4 R C  0. 025 ln 1  N
2k  | V  0. 025
  N
21
0.1mA




21 2
3N  0. 6N
0. 025 = 0. 025 ln 
| Using MATLAB or HP - Solver : N  6. 41  N = 6.
1 
 

21  21 2
3
10.13
R C1 1850 
R
2000 

 185  | R 'C 2  C 2 
 200 
10
10
10
10
R
11 . 7 k
R
42 k
 EE 
 1.17 k | R ' 

 4 . 20 k
10
10
10
10
R 'C1 
R 'EE
10.14
V   F I EE R C  I EE R C  0. 2 mA 2 k  0. 400 V
V OH  0   F IEE R 1  V BE  I EE R 1  V BE  0. 2mA 2k   0. 7 V  1. 10 V
V OL  0   F IEE R1  R C   V BE  I EE R1  R C   V BE  0. 2 mA 4 k  0. 7 V  1. 50 V
V OH  VOL
1.10  1. 50

 1. 30 V
2
2
 V
 V

0. 400
0. 400

 NM H  V T 
 ln 
1   0. 025 
 ln 

 1 
  0.132 V


0. 050
0. 025

 V T

2 V T
V REF 
NM L
I E 3  I E4 
V OH  2  V OL  2   4  1.10
 1. 50 V
 28 . 0 A
50 k
R
P  28 A2 V   0. 2mA 5. 2 V   1. 10 mW
10.15
 V
V

NM H  V T 
 ln 
 1 |
V T

2 V T
Solving by trial
0.1V  0. 025 V 20 V  ln 40 V  1 
- and - error , HP - Solver , or MATLAB : V  0. 3241 V
function f=dv15(v)
f=4-20*v+log(40*v-1);
fzero('dv15',0.5)
yields
ans = 0.3241
10.16
a  The change in v
BE
will be neglected
: v BE  V T ln
0. 8 I C
 5. 6 mV
IC
V OH  0  V BE  0  0. 7  0. 7 V - no change
V OL  0   F IEE R C  V BE  I EE R C  V BE  0. 3 mA 1. 2 2k   0. 7 V  1. 42 V
V OL has dropped by
0.12 V. | V = 0. 3mA 1. 2 2 k  0. 72 V
 V
 0. 72
V
 0. 72

 V T ln 
 1  
 0. 025 ln 
 1  0. 277 V


2
V
2
0.
025
 T

 0  V BE  0  0. 7  0. 7 V - no change
NM H  NM L 
b  At node A : V OH
V OL  0   F IEE R C  V BE  I EE R C  V BE  
V OL also has not changed!
are set by resistor ratios
.
NM H  NM L 
4
1. 0  0. 7  5. 2 
1. 2 11 . 7 k
V 1. 2 2k   0. 7 V  1. 30 V
| Similar results hold at node B because the voltages
 V
 0. 6
V
 0. 6

 V T ln 
 1  
 0. 025 ln 
 1  0. 222 V, unchanged


2
V
2
0.
025
 T

10.17
R 'C1  10 R C1  10 1. 85 k  18 . 5 k  | R 'C2  10 R C 2  10 2 k  20 . 0 k
R 'EE  10 R EE  10 11. 7 k  117 k | R '  10 R  10 42 k  420 k 
10.18
a  V OH  0. 7 V | V = 0. 8 V | V OL  0. 8  0. 7  1. 5 V | V REF 
1.1  0. 7  5. 2  V
0. 8 V
 11. 3 k  | R C2 
 2. 67 k
0. 3
mA
0. 3mA
0. 7  0. 7  5. 2  V
0. 8 V
IE1 =
 0. 336 mA | R C1 
 2. 38 k 
11. 3
k
0. 336 mA
0. 8

b  NM H  NM L  0. 8  0. 025 ln 

 1   0. 314 V
0. 025

2
c  V CB1  0. 8  0. 7   0.1 V | V CB 2  0. 8  1. 1  0. 3 V
V OH  V OL
 1.1V
2
R EE 
The collector - base junction of Q
- biased by 0. 3 V. Although the
2 is reverse
collector - base junction of Q
is
forward
biased
by 0.1 V, this is not large
1
enough to cause a problem
. Therefore the voltages are acceptable
.
10.19
 V
V
 V
V

NM H  V T 
 ln 
 1=
 V T ln 
 1
2
V
V
2
V
 T

 T

 T
For room temperature
V
V

, V T = 0. 025 V: 0.1V  
 0. 025 V ln 

 1
 V  0. 324 V


 2
0. 025

V
 V

For - 55 C, V T = 0. 0188 V: 0.1V  
 0. 0188 V ln 
1   V  0. 302 V
2

0.
0188


V
 V

For + 75 C, V T = 0. 0300 V: 0.1 V  
 0. 0300 V ln 
 1  V  0. 340 V
0. 0300

 2
V  0. 340 V
10.20
In the original circuit: V OH  2mA 2k   0.7V  1.1V | V = 2mA 2k   0.4V
V OL  1.1V  V  1.5 V. V OH amd V OL are symmetrically placed about V REF .
1. 3  0.7  5.2  V
 16. 0 k. R 1 and R C 2 remain unchanged.
0.2
mA
1.1  0.7  5.2  V
For Q1 on and and Q2 off : I EE 
 0.2125mA
16.0
k
V OL1   0.2125mA 2k  R C1   0.7V | V OL1  1.5V  R C1  1.77 k.
R EE 
Note that there are only3 variables R1 , R C1 and R C2  and four voltage levels.
Thus we cannot force them all to the desired level
. For this design,
V OH2  0.2125 mA 2k  0.7V  1.125 V rather than the desired - 1.10V
5
10.21
60k
5. 2V   3.0V | R EQ  60k 44k  25. 38k
60k  44k
3.0  0.7  5.2  V
3.0  0.7  5.2  V

| I EE   F IBS   F
25.38   F  130 k
25.38   F  130 k
V EQ 
I BS
3. 0  0.7  5. 2 V
 50. 0 A | Forward - active region
30
k
 0V | V CBS  V REF  V BE 2  V BS  V REF  0. 7V  3V 
For large  F , I EE 
requires VCBS
V REF  0.7 V  3V   0  V REF  2. 30 V
10.22
R 'C1  5R C1  5 1.85k  9.25 k | R 'C2  5R C2  52k  10. 0 k
R 'EE  5R EE  511.7k  58.5 k | R '  5R  542k  210 k
10.23
RC
Q
A
B
Q
C
D
2
E
V
REF
Y =A+B+C+D+E
I EE
R
-V
6
EE
4
10.24
RC
Q
3
A
B
C
Q
D
2
V
REF
Y=A+B+C+D
R
I EE
-V
EE
10.25
0.7  3. 2
 2.98 mA
a For Q 4 on, IC 4   F IE 4  I E 4 
V OL
840
 1. 3V  2. 98mA 390   0.7V  0.56 V | For Q 4 off, V OH  1.3  0. 7  0.60 V
0. 6  0.7  3. 2
 3.69 mA
b  For v A = 0.6V, I C 2   F I E2  I E 2 
840
V
1.16 V
V  0.60  0.56   1.16 V | R =

 314 
I C2 3.69mA
10.26
0.7  2. 5
 2.14 mA
a For Q 4 on, IC 4   F IE 4  I E 4 
840
V OL  1. 0V  2.14mA 390   0.7V  0.540 V | For Q 4 off, V OH  1.0  0.7  0. 300 V
0. 3  0.7  2.5 
 2.50 mA
b  For v A = 0.3V, I C2   F IE 2  I E 2 
840
V
0.84 V
V  0.30  0.54   0.84V | R =

 336 
IC 2 2.50mA
7
10.27
10.27.
10.32 Use the circuits in Prob.
V CC
390 
A
Q
B
2
Q
3
Q
Q
4
5
A
Y
OR
B
Y=A+B
840 
600 
C
NOR
D
-V EE
(a)
(b) The Nor output is taken from the collectors of Q2/Q3 and the 390 resistor is moved.
10.28
v min
 I EE R L   2.5mA 1.2k  3.00 V | I E  I EE 
O
vO
4  0.7
 2.5mA 
 5.25 mA
RL
1. 2k
V BC  4  5  1V so transistor is in the forward - active region.
IE
5. 25mA
IB 

 0.103 mA and I C   F I B  5.15 mA.
F  1
50  1
10.29
Assuming Q1 off and using voltage division,  12  15
IE 
12
12  15 

 60 mA !
2000
500
2000
 R E  500 
2000  R E
10.30
The outputs act as a " wired- or" connection.
For v I  0.7V, v O1  v O2  0.7 V | I E3  0 | I E 4  0.1mA  0.1mA  0. 200 mA
For v I  1.3V, v O1  v O2  0.7 V | I E 3  0.1mA  0.1mA  0.200 mA | I E 4  0
10.31
10.32
8
Y  AB | Z =A B
See top of page
10.33 Note: In the first printing, the 3.3 k resistor in Fig. 10.25 should be replaced with
a 0.3 mA current source. Figure 10.26 is also in error. The correct circuit is given
below.
5.6 k
R1
Q5
R EQ
5.28 k
Q5
- 0.3 V
V EQ
V
REF
91 k
R3
V
REF
R2
42 k
- 0.301 V
+
_
R3
42 k
- 5.2 V
0.1 mA
- 5.2 V
Corrected Figure 10.26 and its equivalent circuit.
v REF  0.301  5280 iB 5  v BE 5  0.301  v BE 5
v E2  v REF  v BE 2  0.301  v BE 5  v BE 2
v E 2  5.2  4.90  v BE5  v BE 2 4.90  0.7  0.7


 0. 299 mA
11700
11700
11700
For a temperature increase of 50C, v BE  50C 1.8mV / C   0.090 V
iE2 
iE2 
4.90  0.610  0.610
 0.315 mA - a 5.4% increase.
11700
10.34 See Problem 10.33 for a correction to Fig. 10.26. The new equivelent of the
reference source is
R EQ
6.07 k
Q5
V REF  0.301  6070iB 5  v BE5
V EQ
V
REF
R3
- 0.301 V
48.3 k
- 5.2 V
+
_
Neglecting the small variations in
i B 5 and v BE5 , V REF is essentially
unchanged. Since R EE , R C2 and
R all change by the same factor,
V OH , V OL ,NM H , and NM L all
remain unchanged.
9
10.35
See Problem 10.33 for a correction to Fig. 10.26.
For large  F , V REF  0. 301  5280i B5  v BE 5  0.301  v BE 5 
At 25C, v BE 5  0. 7V and V REF  1.00 V
1.8mV 
a T = +60C | v BE 5  60C 

  0.108V | V REF  0. 892V

(b) T = -80C | v BE5
C 
 1.8mV 
 -80C
  0.144 V | V REF  1.14 V

C 
Note: A more exact calculation yields the same answers.
10.36
*PROBLEM 10.36 - ECL INVERTER VTC
VIN 2 0 DC -1.3
VREF 4 0 -1.0
VEE 8 0 -5.2
Q1 1 2 3 NBJT
Q2 5 4 3 NBJT
Q3 0 1 6 NBJT
Q4 0 5 7 NBJT
REE 3 8 11.7K
RC1 0 1 1.85K
RC2 0 5 2K
R3 6 8 42K
R4 7 8 42K
.DC VIN -1.3 -0.7 .01
.TEMP -55 25 85
.MODEL NBJT NPN BF=40 BR=0.25 VA=50
.PROBE V(2) V(1) V(5) V(6) V(7)
.PRINT DC V(2) V(6) V(7)
.END
T
VT
VOH
VOL
V
VREF
VIH
VIL
NMH
NML
-55C
0.0188 V
-0.846 V
-1.40 V
0.554 V
-1.00 V
-0.937 V
-1.06 V
0.091 V
0.340 V
+25C
0.0257 V
-0.724 V
-1.30 V
0.576 V
-1.00 V
-0.921 V
-1.08 V
0.197 V
0.220 V
+85C
0.0309 V
-0.629 V
-1.22 V
0.591 V
-1.00 V
-0.911 V
-1.09 V
0.282 V
0.130 V
 V

V IH and V IL were calculated from Eq. 10.29 and 10. 30: V REF  V T ln
 1
 V T

With a fixed reference voltage, the noise margins change with temperature and can become
zero for a large enough temperature change.
10.37 Note: In the first printing, Fig. 10.26 is in error. The correct circuit is given in the
solution to Problem 10.33.
*PROBLEM 10.37 - ECL INVERTER VTC WITH REFERENCE
VIN 2 0 DC -1.3
10
VEE 8 0 -5.2
Q1 1 2 3 NBJT
Q2 5 4 3 NBJT
Q3 0 1 6 NBJT
Q4 0 5 7 NBJT
REE 3 8 11.7K
RC1 0 1 1.85K
RC2 0 5 2K
R3 6 8 42K
R4 7 8 42K
Q5 0 9 4 NBJT
R1 0 9 5.6K
R2 9 8 91K
RE 4 8 42K
.OP
.DC VIN -1.3 -0.7 .01
.TEMP -55 25 85
.MODEL NBJT NPN BF=40 BR=0.25 VA=50 IS=1FA
.PROBE V(4) V(3) V(2) V(1) V(5) V(6) V(7)
.PRINT DC V(4) V(3) V(2) V(6) V(7)
.END
T
VT
VOH
VOL
V
VREF
VIH
VIL
NMH
NML
-55C
0.0188 V
-0.803 V
-1.35 V
0.547 V
-1.11 V
-1.04V
-1.17 V
0.237 V
0.180 V
+25C
0.0257 V
-0.665 V
-1.25 V
0.585 V
-0.975 V
-0.896 V
-1.05 V
0.231 V
0.200 V
+85C
0.0309 V
-0.558 V
-1.18 V
0.622 V
-0.869 V
-0.778 V
-0.960 V
0.220 V
0.120 V
 V

V IH and V IL were calculated from Eq. 10.29 and 10. 30: V REF  V T ln
 1
 V T

With a simple temperature dependent reference voltage, VREF stays near the middle of the
voltage swing, and the noise margin variation with temperature is significantly reduced.
10.38 Note: In the first printing, Fig. 10.26 is in error. The correct circuit is given in the
solution to Problem 10.33.
2  5.2  V
0.1mA
 32 k  33 k for a discrete design. | I B5 
 2. 44A
0.100
mA
40 1
1. 3  5. 2
Choose IR 2  10I B5  25A | R 2 
 156 k 160 k for a discrete design.
25A
R3 
I R 1  25A  I B 5  27.4A | R 1 
0  1.3 
 47.4 k  47 k for a discrete design.
27. 4A
10.39
11
0, 1, 2 or 3 base currents may be drawn out of the reference depending on the state of
each logic gate. Each unit of base current results in a drop
0. 3mA
V = IB R 
2.7k  0.026 V. V REF  1  NV for N = 0,1, 2,3 yields:
F  1
V REF  1 V,  0. 974 V,  0. 948 V,  0. 922 V
10.40 Note: In the first printing, the 3.3 k resistor in Fig. 10.25 should be replaced with
a 0.3 mA current source.
0, 1, 2, 3 or 4 base currents may be drawn out of the reference depending on
the state of each logic gate. The Thevenin equivalent of the bias circuit is
(neglecting the small- signal resistance of the diode)
V EQ = -5.2V + 0.3mA 11. 7k  0.7V  0.990 V and R EQ  11.7k
Each unit of base current results in a drop V = IB R 
0. 3mA
11. 7k  0.113 V.
F  1
V REF  0.990  NV for N = 0,1,2,3, 4 yields:
V REF  0.990 V,  0.877 V,  0.764 V,  0. 651 V,  0.538 V
10.41
  v 
 v  I   v  
i C  I S exp BE   exp BC  S exp BC  1
 V T   R   V T  
  V T 
  v 
 v  I
i E  I S exp BE   exp BC  S
 V T   F
  V T 
v BE  4V T and v BC  4V T
  v BE  
exp
  1
  V T  
  v 

v BE 
1   v BE  I S 
i C  IS exp BE  and iE  I S 1 
exp
 
exp
  iC   F i E
 F   V T   F 
 V T 
  V T 
i 
 i 
v BE  V T ln  C   V T ln  F E 
I
 S 
 I S 
10.42
I SD 
IS
1fA

 1. 02 fA
 F 0.98
10.43
Both transistors are in the forward- active region. For simplicity , assume V A = .
I  I C1  I B1  I B 2 | Since the transistors are identical and have the same VBE ,
I C 2  IC1 and I B1  I B2 | I = I C1  2IB1   F  2 I B1 | I C 2   F IB 2   F I B1
IC2 
F
25
I
25A | I C 2  23.2 A
F  2
25  2
10.44
For Fig . 10.32, P  0.5mA 5.2 V  2.6mW  2600W. For 20W, the power must
be reduced by 130X. The currents must be reduced by 130X and the resistors must
increase by this factor to keep the logic swing the same: R C  130 2k  260k.
Using Eq . (10.54),  P  0. 69260k2pF   359 ns - rather slow!
12
10.45
R C 2k

 1k | V = 0.3mA 1k  0.3V | V OH  0  0.7  0.7V
2
2
0.7 1. 0
V OL  V OH  0.3V  1. 0V | V REF 
V  0.850 V | P  0.5mA 5. 2V   2.6mW
2
 P  0. 691k2pF   1.38ns | PDP = 2.6mW1.38ns  3.59 pJ
R 'C 
10.46
V = 0.15mA 2k  0. 3V | V OH  0  0.7  0.7V
0.7 1. 0
V  0.850 V | P  0. 25mA 5.2V   1. 30mW
2
 P  0. 692k2pF   2.76ns | PDP =1. 30mW2.76ns  3.59 pJ
V OL  V OH  0.3V  1. 0V | V REF 
10.47
V
 V  20  0.7  1  0.6V
2
 V  0.6  0.600 V. Ignoring the base currents, the average power is
a At the outputs: V OH  0 V | V REF  V OH  0.7 
V OL  V OH
1.7  3.3 V 1.0  3.3V 
P  

3.3V  5.67 mW
1.6k
3.2k


V
0.6
V
0.6
R C2 

 600  | R C1 

 505 
1  0.7  3.3 
I EE 2
I EE 1 0.7  0. 7  3. 3
1600
1600
b
Y

A

B

C
Y
=
A
+
B
+
C
c
5
versus
6
transistors
 
 
10.48
At the outputs: V OH  0 V | V OL  V OH  V  0.4  0.400 V.
At the base of QD : V OH  V BD  0  0.7  0.7 V V OL  V BD  0. 4  0.7  1.10 V
0.7  1.1
V REF 
 0. 90V | V EE  V REF  0.7  0.6  0. 9  0.7  0.6  2.20 V
2
0.9  2.2  V
For V EE  2. 20V: R B 
 1.30 k
1
mA
0. 9  0.7  2.2   0.7  0.7  2.2  V  700 
RE 
2
1mA
0. 4V
0.4V
R C1 
 350  | R C2 
 467 
0.7  0.7  2.2 
0.9  0.7  2.2 
A
A
700
700
10.49
*PROBLEM 10.49 - ECL DELAY
VIN 1 0 PULSE(-0.6 0 0 .01NS .01NS
15NS)
VB 8 0 -0.6
VREF 6 0 -1.0
VEE 7 0 -3.3
QA 0 1 2 NBJT
QB 0 8 2 NBJT
QC 0 8 2 NBJT
QD 4 2 3 NBJT
QE 5 6 3 NBJT
RB 2 7 3.2K
RE 3 7 1.6K
RC1 0 4 505
RC2 0 5 600
.OP
.TRAN 0.1N 30N
.MODEL NBJT NPN BF=40 BR=0.25
+IS=5E-16 TF =0.15NS TR=15NS
13
+CJC=0.5PF CJE=.25PF CJS=1.0PF
+RB=100 RC=5 RE=1
.PROBE V(2) V(1) V(4) V(5) V(6)
.END
200mV
0V
-200mV
-400mV
-600mV
vI
Time
-800mV
0s
5ns
10ns
15ns
20ns
25ns
30ns
Result: P = 0.95 ns
10.50
One approach is to scale all the resistor values
. To reduce the power from
2.7 mW to 1. 0 mW , the resistor values should all be increased a factor of2.7.
R C1  2.71. 85k  5.00 k | R C2  2.7 2k  5. 40 k
R EE  2.7 11.7k  31. 6 k | R  2.742k  113 k
10.51
Voltage levels remain unchanged
: V REF  1V, V OH  0. 7V, V OL  1.3V, I EE  0.3mA
1  0.7  2  V
0.6V
0.6 V
 1 k | R C1 

 1 k
0.3
mA
0.7  0.7  2
0.6mA
A
1 k
1 2 V
0.3  0.6
I 2

mA  0. 650mA | P = 0.65mA 2V   1.30 mW (-28%)
10
k
2
Note that this gate will now have quite asymmetrical delays at the two outputs
R EE 
since the two collector resistors differ by a fa ctor of two in value.
10.52
The circuit is the pnp version of the ECL gate in Fig. P10. 47. | Y = ABC
10.53
0.7  1.3
1mW
 1. 0V | I 
 333A
2
3V
1 + 0.7  0.7  0.7 
The average voltage at the emitter of Q
 1.55V
D is
2
3  1.55 V
3  1V
0.6V
RE 
 4.84 k | R B 
 60.1 k | R C 
 2.23 k
0. 9333A 
0.1333A 
3  1.7 V
4.84k
V OL  0 | V OH  V OL  V  0.6V | V REF 
14
10.54
*Problem 10.54(a) - PNP ECL GATE
DELAY
VI 4 0 PULSE(0.6 0 0 .01NS .01NS 25NS)
VB 7 0 DC 0.6
VREF 6 0 DC 1.0
VEE 1 0 DC 3
QA 0 4 3 PBJT
QB 0 7 3 PBJT
QC 0 7 3 PBJT
QD 0 3 2 PBJT
QE 5 6 2 PBJT
RB 1 3 60.1K
RE 1 2 4.84K
RC 5 0 2.23K
.OP
.TRAN 0.1N 50N
.MODEL PBJT PNP BF=40 BR=0.25
IS=5E-16
+TF =0.15NS TR=15NS
+CJC=0.5PF CJE=.25PF CJS=1.0PF
+RB=100 RC=5 RE=1
.PROBE V(4) V(3) V(5)
.END
800mV
600mV
vI
400mV
vO
200mV
0V
Time
-200mV
0s
10ns
20ns
30ns
40ns
50ns
Result: P = 6.0ns. This delay is dominated by a slow charge up at the base of Q D.
*Problem 10.54(b) - Fig. P10.4
VIN 1 0 PULSE( -2.3 -1.7 0 .01NS .01NS 15NS)
VREF 6 0 -2.0
IEE 2 0 0.0003
Q1 3 1 2 NBJT
Q2 4 6 2 NBJT
R1 0 5 3.33K
RC1 5 3 2K
RC2 5 4 2K
.OP
.TRAN 0.1N 30N
.MODEL NBJT NPN BF=40 BR=0.25 IS=5E-16 TF =0.15NS TR=15NS
+CJC=0.5PF CJE=.25PF CJS=1.0PF RB=100 RC=5 RE=1
.PROBE V(1) V(3) V(4)
.END
Result: P = 2.4 ns.
*Problem 10.54(c) - Fig. P10.14
VIN 1 0 PULSE( -1.5 -1.1 0 .01NS .01NS 15NS)
VREF 6 0 DC -1.30
IEE 2 0 DC 0.0002
Q1 3 1 2 NBJT
Q2 4 6 2 NBJT
Q3 0 3 7 NBJT
Q4 0 4 8 NBJT
R1 0 5 2K
RC1 5 3 2K
RC2 5 4 2K
RE1 7 9 50K
RE2 8 9 50K
15
VEE 9 0 DC -2
.OP
.TRAN 0.1N 30N
.MODEL NBJT NPN BF=40 BR=0.25 IS=1E-17 TF =0.15NS TR=15NS
+CJC=0.5PF CJE=.25PF CJS=1.0PF RB=100 RC=5 RE=1
.PROBE V(1) V(3) V(4) V(7) V(8)
.END
Result: P = 3.0 ns.
10.55 Applying the Gummel-Poon model
  V 
 V  I   V  
I C  I S exp BE   exp BC  S exp BC  1
 V T   R   V T  
  V T 
IB 
I S   V BE   I S   V BC  
exp
exp
 1 
  1
 F   V T    R   V T  

0.2 
4.8  10 15
I C  1015 exp

 exp

 
0. 025 
 0.025 
 0. 25
IB 
10 15
40

 0.2   1  10 15
exp



0. 025  

 0.25
  4.8  
exp
 1  2.98 pA

 0.025  


 4.8   1  74.5 fA

exp
0.025  


Although the transistor is technically in the forward-active region, (and operating with IC =
F IB), it is esentially off - its terminal currents are zero for most practical purposes.
10.56
For I C = 0, V CESAT
IC
1
 1 
 R  1I B  V ln 1 
 V T ln  
T
 

 R  1  I C
 R 
 F IB
  1
1.25 
V CESAT  V T ln  R
  0. 402 V
  0. 025 ln 

0.25 
 R 
16
10.57 (a) For the Gummel-Poon model with VBE = VBC, the transport current iT = 0:
V  
I 
I   V   I

40
I C  S exp BC   1 and IE  S exp BE   1  C  F 
 160
R 
V

V
I

0.
25
 T  
 T  
F 
E
R
b  v BE  V B  0.6 | v BC  V B  0.8 = v BE  0.2


v
v  I 
v
i E  I S exp BE  exp BC  S exp BE 1
VT
V T   F 
VT



v
v
0.2  I S
i E  I S exp BE  exp BE exp

VT
VT
V T 

  F


v BE
exp V  1


T

 I 

v
v 
1 
v  I
i E  I S exp BE   S exp BE   I S 1 
exp BE   S


V T   F 
V T 
V T   F

  F 
 

v
v
0.2  I S
i C  I S exp BE  exp BE exp

VT
VT
V T 

  R

v BE 
exp V 

T 


v BE  0.2
1
exp
VT



v 
i
40
i C  I S exp BE  | C   F 
 0.976
V
i
41

T 
E
c
iC
 1  i B  iE  i C  2i E | Both junctions will be forward - biased. Neglect
iE

IS
v
I
v
v
v 
I
v
exp BE  S exp BC  2I S exp BE  exp BC   2 S exp BE
F
VT
R
VT
V
V

VT

T
T 
F
1
1
2
2
R
0.25  27. 2mV
 V T ln
 0.025V ln
1
1
2
2
F
40
the -1 terms:
v BE  v BC
v B  v I  v B  0.8   27.7mV
10.58
F 
S 
F
40

 0. 976
 F  1 41
R 
0.976 0. 4ns  0.212ns
1  0.976 0.2
t S  3.40ns ln
10.59
| v I  0.773 V
R
0. 25

 0. 200
R 1 1.25
 3.40ns i CMAX 
2mA  0.5mA 
 5.07 ns
2.5mA
 0.5mA 
40
(a)
I C  F I B  Forward  active region | V BE  V T ln
b  IC   F I B  saturation region; V BE
V BE
5V
 2.5 mA
2k
IC
10 3 A
 0.025 V ln
 0.691 V
15
IS
10 A
is given by Eqn . 5.45
 1 
I B  
I C
I  1   R IC
 R  1 
 V T ln B
 V T ln
 1

 1  1 
IS   1   R 
I S   

 F

 F  R  1
17
 1
 3
 
10
0.25  1
 0.025 V ln
 0.691 V
 1  1

10 15   

80 0.25  1
25x10
V BE
6
c I C   F IB  saturation region | V BE
1

10 3  

10 3
0.25  1 
 0.025V ln
 0.710 V
1



15  1
10   

40 0. 25 1 

10.60
 1 
  1
1. 25 
For I C = 0, V CESAT  V T ln    V T ln  R
  40.2 mV
  0.025 ln 
0. 25 


 R 
 R 
 1 
  1
 41 
For I E = 0, V ECSAT  V T ln    V T ln  F
  0.617 mV
  0. 025 ln 
40 
 F 
  F 
10.61
V OH  V CC  3.0 V
V OL  V CESAT  0.15 V
V IL  0. 7  V CESAT  0.7  0.04V = 0.66 V
V IH  V BESAT 2  0.8 V
3  0.7  0. 8 V
 375A | I B 2  1.25I B1  469A
4
k
3  0.8  0.15 V
3  0.15
V I  0.15V: I IL  
 513A | I C2SAT 
A  1. 43mA
4
k
2000
1.43mA  N513A   40469A  N  33.8  N  33.
V I  3V: I B1 
10.62
5  0. 7  0.8
5  0.15

 4.13mA | P = 54.13mA   20.6 mW
0.8 4k
0.82k
5  0. 8  0.15
v I  V OL : I =
 0.844 mA | P = 5 0. 844mA   4.22 mW
1.24k
v I  V OH : I =
P max  20.6 mW
P min  4. 22 mW
10.63
Using Eqs . 10.55 and 10.58: V CC
iC
1
 1 

 R  1iB
 iC R C  V T ln  
 R  1  i C
F i B
iC
1
1.25 1. 09mA 
 1 
5  2000iC  0.025 ln  
 i C  2.4659 mA
iC
. 2 
1
40 1. 09mA 
v CESAT  5  2000i C  0.0682 V
10.64
V OH  2. 5 V
V OL  V VCESAT  0.15 V
V IL  0. 7  V CESAT  0.55V V IH  V BESAT 2  0.8 V
NM L  0.55  0.15  0. 40 V NM H  2.5  0.8  1.7 V
18
10.65
For v I  VOH , we require VCC  V BE 2SAT  V BC1  I B1 R B  0.8  0.7  V  1.5V  V
where V is the volatge across the base resistor. V must be large enough to abosorb
V BE process variations and to establish the base current. 0.5 V should be sufficient.
Thus VCC  2.0V or more is acceptable.
10.66 The VTC transitions are set by the values of v BE and vBESAT and are not changed by
the power supply voltage.
(b) VIL = 0.66 V and VIH =0.80 V. But VOH = 3V and VOL =
0.15 V. (c) NMH = 3 - 0.8 = 2.2 V | NML = 0.66-0.15 = 0.51 V.
10.67 We need to reduce the currents by a factor of 11.2. Thus
RB = 11.2 (4k) = 44.8 k and RC = 11.2 (2k) = 22.4 k
10.68 (a)
*Problem 10.47 - Prototype TTL Inverter
+Delay
VI 1 0 DC 0 PWL(0 0 0.2N 5 25N 5
25.2N 0 +50N 0)
VCC 5 0 DC 5
Q1 3 2 1 NBJT
Q2 4 3 0 NBJT
RB 5 2 4K
RC 5 4 2K
*RB 5 2 45.2K
*RC 5 4 22.6K
.OP
.TRAN .1N 80N
.MODEL NBJT NPN BF=40 BR=0.25
+IS=5E-16 TF =0.15NS TR=15NS
+CJC=0.5PF CJE=.25PF CJS=1.0PF
+RB=100 RC=5 RE=1
.PROBE V(1) V(2) V(3) V(4)
.END
(a)
6.0V
vI
4.0V
2.0V
vO
0V
Time
-2.0V
0s
20ns
40ns
Results: (a) P = 2.9 ns
ns.
10.69
(a)
(b)
(c)
60ns
80ns
(b) P = 15.8
V OH  5V
V OL  V CE 2SAT  0.15 V
5  0.15  0. 6
v I  V OL  0.15 V, I IN  
 1. 06 mA
4000
v I  V OH  5V, I IN  I S  0 where IS is the diode saturation current.
5  0.8  0.6
5 - 0.15
IB 
 0.90mA;
 N 1.06mA   40 0.9mA ; N  31.
4000
2000
-1.06 mA compared to -1.01 mA and 0 mA compared to 0.22 mA.
19
10.70 If we assume that the diode on-voltage is 0.7 V to match the base-emitter voltage of
the BJT, then the VTC will be the same as that in Fig. 10.47, and both VTC will be
the same.
10.71
*Figure 10.71 - Prototype TTL Inverter
VTC's
VI 1 0 DC 0
VCC 5 0 DC 5
*DTL
D1A 6 1 D1
D2A 6 7 D1
RBA 5 6 4K
RCA 5 8 2K
Q2A 8 7 0 NBJT
*TTL
Q1B 3 2 1 NBJT
Q2B 4 3 0 NBJT
RBB 5 2 4K
RCB 5 4 2K
.DC VI 0 5 .01
.MODEL NBJT NPN BF=40 BR=0.25
IS=5E-16 TF =0.15NS TR=15NS
+CJC=0.5PF CJE=.25PF CJS=1.0PF
RB=100 RC=5 RE=1
.MODEL D1 D IS=5E-16 TT=0.15NS
CJO=1PF
.PROBE V(1) V(2) V(3) V(4) V(6) V(7) V(8)
.END
10.72
*Figure 10.72 - Prototype Inverter Delays
VI 1 0 DC 0 PWL(0 0 0.2N 5 25N 5 25.2N
0 5 50N 0)
VCC 5 0 DC 5
*DTL
D1A 6 1 D1
D2A 6 7 D1
RBA 5 6 4K
RCA 5 8 2K
Q2A 8 7 0 NBJT
*TTL
Q1B 3 2 1 NBJT
Q2B 4 3 0 NBJT
RBB 5 2 4K
RCB 5 4 2K
.OP
.TRAN 0.1N 100N
.MODEL NBJT NPN BF=40 BR=0.25
IS=5E-16 TF =0.15NS TR=15NS
+CJC=0.5PF CJE=.25PF CJS=1.0PF
RB=100 RC=5 RE=1
.MODEL D1 D IS=5E-16 TT=0.15NS
CJO=1PF
.PROBE V(1) V(2) V(3) V(4) V(6) V(7) V(8)
20
5.0V
vO
4.0V
3.0V
2.0V
1.0V
0V
0V
1.0V
2.0V
vI
3.0V
4.0V
5.0V
The TTL transition is sharper (more abrupt)
and is shifted by approximately 50 mV.
.END
6.0V
vI
4.0V
vO TTL
2.0V
vO DTL
0V
Time
-2.0V
0s
20ns
40ns
60ns
80ns
100ns
The fall time of the output of the TTL gate is
somewhat slower than the DTL gate since
transistor Q1 must come out of saturation.
However, the rise time of the DTL gate is
extremely slow because there is no reverse base
current to remove
transistor base.
the
charge
from
the
10.73
*Figure 10.73 - DTL Inverter Delays
VI 1 0 DC 0 PWL(0 0 0.2N 5 25N 5 25.2N
0 50N 0)
VCC 5 0 DC 5
*DTLA
D1A 6 1 D1
D2A 6 7 D1
RBA 5 6 4K
RCA 5 8 2K
Q2A 8 7 0 NBJT
*DTL-B
D1B 2 1 D1
D2B 2 3 D1
Q2B 4 3 0 NBJT
RBB 5 2 4K
RCB 5 4 2K
RB1 3 0 1K
.OP
.TRAN 0.1N 100N
.MODEL NBJT NPN BF=40 BR=0.25
IS=5E-16 TF =0.15NS TR=15NS
+CJC=0.5PF CJE=.25PF CJS=1.0PF
RB=100 RC=5 RE=1
.MODEL D1 D IS=5E-16 TT=0.15NS
CJO=1PF
.PROBE V(1) V(2) V(3) V(4) V(6) V(7) V(8)
.END
6.0V
vO (b)
4.0V
vI
2.0V
vO (a)
0V
Time
-2.0V
0s
20ns
40ns
60ns
80ns
100ns
Without the 1 k resistor, the rise time of the
DTL gate is extremely slow because there is no
reverse base current to remove the charge from
the transistor base. The resistor provides an
initial reverse base current of -0.7 mA to turn
off the transistor and significantly reduces the
rise time and propagation delay.
21
10.74
See problem 10.75. Note that R3 should be 3 k in the first printing.
10.75
*Figure 10.74 - Inverter VTC
VI 1 0 DC 0
VCC 6 0 DC 3.3
Q1 3 2 1 NBJT
Q2 5 3 4 NBJT
Q3 5 4 0 NBJT
R1 6 2 4K
R2 6 5 2K
R3 4 0 3K
.OP
.DC VI 0 3.3 0.01
.MODEL NBJT NPN BF=40 BR=0.25
IS=1E-16 TF =0.15NS TR=15NS
+CJC=0.5PF CJE=.25PF CJS=1.0PF
RB=100 RC=5 RE=1
.PROBE V(1) V(2) V(3) V(4) V(5)
.END
The first break point occurs when the input reaches a voltage large enough to just start
turning on Q2, approximately VCESAT1 + VBE2 = 0.04V + 0.6 V = 0.64V. The second
breakpoint occurs when the input reaches VCESAT1 + VBE2 +VBE3 = 0.04V + 0.7 + 0.6 V =
1.34V. Note that the shallow slope is set by the ratio of R 2/R3 = 2/3. Also note that Q3
cannot saturate. VOH = 3.3 V, VOL = VBE3 +VCESAT2 = 0.80V. NMH = 3.3 -1.5 = 1.8 V
NML
= 1.4 - 0.8 = 0.60 V
10.76
V
CC
4 k
= +5 V
0.875 mA
2 k
i
R
N (0.875 mA)
V OH < 5 V
N
i =0
C
V OL
0.15 V
Q
Q1
+
2
"Off"
0.875 mA
0.19 V
-
From the analysis in the text, we see that the fanout is limited by the VOH condition.
i B1 
5  0.7  0. 8 V
 0.875mA | i E1   R i B1  0.875mA
4
k


5  2000N  0.875 x10 3  1. 5  N  2  Fanout  2
22
10.77
+5 V
(1.2)(2 k 
(1.2)(4 k 
v
V OH
  i
IH
1.5 V
B1
i
B1
R B1
(1.2)(2 k 
+ 0.7
Q
-
+
( + 1) i
R
1
B1
Q
+
N
0.8 V
2 0.15 V
-
-
From the analysis in the text, we see that the fanout is limited by the VOH condition.
i B1 
5  0.7  0. 8 V
 0.729mA | i E1   R i B1  0.25 0.729mA   0.182mA
4 1.2 
k


5  20001.2 N  0.182x10 3  1.5  N  8.01  Fanout  8
i B1 
5  0.7  0. 8 V
 1.09mA | i E1   R i B1  0.25 1.09mA   0.273mA
4 0.8 
k


5  20000.8 N  0.273x10 3  1.5  N  8. 01  Fanout  8
The result is independent of the tolerance if the resistors track each other
.
Note that Eq. 10.83 also yields N = 8 if more digits are used in the calculation.
10.78
From the analysis in the text, we see that the fanout is limited by the VOH condition.
5  1.5 V
5V  2000N i E1   1.5V  i E1  
 0.175mA
2000 10  
i E1   R i B1 | i B1 
10.79
(a)
0.175mA
5  0. 7  0.8 V
 0.700mA | R B 
 5.00 k
0. 25
0. 700
mA
Q 4 is in the forward- active region with I E   F 1IB
I E  101
(b)
5  0.7  0. 6
 234 mA
1600
Q 4 saturates; IE  I B  I C 
10.80
5  0.8  0.6 5  0.6  0.15

 34. 9 mA
1600
130
(a) P D  5V 234mA   1.17 W (b) P D  5V 34.9mA   0.175 W
10.81
*Problem 10.81 - TTL Output Current
VCC 5 0 DC 5
RB 5 3 1.6K
RS 5 4 130
Q1 4 3 2 NBJT
D1 2 1 D1
IL 1 0 DC 0
23
+CJC=0.5PF CJE=.25PF CJS=1.0PF RB=100
RC=5 RE=1
.MODEL D1 D IS=5E-16
.PROBE V(1) V(2) V(3) V(4)
.END
.DC IL 0 30MA 0.01MA
.MODEL NBJT NPN BF=40 BR=0.25 IS=5E-16
TF =0.15NS TR=15NS
5.0V
vO
4.0V
3.0V
2.0V
iL
1.0V
0A
5mA
10.82
*Problem 10.82 - Modified TTL Inverter
VTC
VI 1 0 DC 0
VCC 9 0 DC 5
10mA
15mA
20mA
25mA
30mA
4 .0 V
vO
3 .0 V
Q1 2 8 1 NBJT
Q2 4 3 0 NBJT
Q3 6 2 3 NBJT
Q4 7 6 5 NBJT
D1 5 4 DN
RB 9 8 4K
RC 9 6 1.6K
RS 9 7 130
RL 4 0 100K
Q5 10 11 0 NBJT
RB5 3 11 3K
RC5 3 10 1K
.DC VI 0 5 .01
.MODEL NBJT NPN BF=40 BR=0.25
IS=1E-17 TF =0.25NS TR=25NS
+CJC=0.6PF CJE=.6PF CJS=1.25PF
RB=100 RC=5 RE=1
.MODEL DN D
.PROBE V(1) V(2) V(3) V(4) V(5) V(6)
.END
10.83
24
2 .0 V
1 .0 V
0V
0V
1 .0 V
2 .0 V
vI
3 .0 V
4 .0 V
5 .0 V
In the modified TTL circuit, Q3 cannot start
conducting until its base reaches at lease VBE5
+ VBE6 = 1.2 V.
+ 5V
20 k 
8k 
+
0.7 V
-
Q
Q
1
3
+
0.8 V
-
Q
2
+
5k
0.8 V
-
v I  V OH : Q 4 off  I B 4  0  IC 4 | Q 2 saturated with I
I B1 
5  0. 7  0. 8  0. 8 V
20 k
I C1  169 A |
IC 3 
5  0.15  0. 8 V  506 A
8 k
I B 2  675 A 
v I  V OL : Q 2 ,Q 3 off; Q4 on
10.84
0
 135 A | I E 1   R I B1  0. 25 135 A   33 . 8 A
I E 3  506 A  169 A  675 A |
I B1 
C4
0. 8 V
 515 A
5 k
5  0.8  0.15 V  203 A = I | I  0
E1
C1
20k
See Problem 10.85.
10.85
*Problem 10.85 - Low Power TTL Inverter
VTC versusTemperature
VI 1 0 DC 0
VCC 9 0 DC 5
Q1 2 8 1 NBJT
Q2 4 3 0 NBJT
Q3 6 2 3 NBJT
Q4 7 6 5 NBJT
D1 5 4 DN
RB 9 8 20K
RC 9 6 8K
RS 9 7 650
RL 4 0 100K
RE 3 0 5K
.DC VI 0 5 .01
.TEMP -55 25 85
.MODEL NBJT NPN BF=40 BR=0.25
IS=1E-17 TF =0.25NS TR=25NS
+CJC=0.6PF CJE=.6PF CJS=1.25PF
RB=100 RC=5 RE=1
.MODEL DN D
.PROBE V(1) V(2) V(3) V(4) V(5) V(6)
.END
25
4.0V
vO
3.0V
2.0V
-55 o C
1.0V
+25 o C
+85 o C
0V
0V
1.0V
vI
2.0V
3.0V
4.0V
5.0V
10.86
V
CC
= + 5V
1.6 k
R
C
RS
130 
Q
4
V OH  5  0.7  0.7 
D1
N
v
26
0.17 mA
O
N0.17mA 
1600 
40  1
 2. 4V  N  180
V OH  3. 6 
V OH
NI IH 
RC
 F 1
10.87
For small  R , fanout is limited by the vO  V OL case ( v I  VOH ).
i B 3   R  1i B1  1.05
5  0.7  0.8  0.8 V
 567A
5k
5  0.15  0.8 V  567A  0.8V  1.95mA
i B 2  iE 3  i R E 
2k
1. 25k
5  0.8  0.15 V  0.810mA |    R  0.05  0.0476
i IL  i E1  i B1 
R
5k
1   R 1. 05
1
1
0. 0476 403.4 
0.15V 
Using Eq . 10.61,  = exp

  403.4   FOR  20
 9.52
20
1
0. 025V 
1
0. 05 403. 4
N 0.810mA   9.52 1. 95mA   N  22
10.88
For the vO = VOL case, the equations
are given in Prblem 10.87. For vO =
VOH,
function [N,X]=P1088
br=0;
bf=40;
g=exp(.15/.025);
for i=1:50
br=br+.1;
ar=br/(1+br);
ib3=(1+br)*675;
ib2=1730+ib3;
bfor=40*(1-1/(ar*g))/(1+bf/(br*g));
N1=fix(bfor*ib2/1013);
N2=1.2*(bf+1)*4000/(2.7*br*1600);
N(i)=min(N1,N2);
X(i)=0.1*i;
end
V OH  5  I B 4 R C  0.7  0.7  2.4V
5  0.7  0. 8  0. 8 
 2.7 
I IH   R 
   R 



4000 
4000
IB 4 
N
NI IH
N R  2.7 



 F  1  F  1 4000 
1.2 F  14000 
2.7 R 1600 
100
»[Y,X]=p1088;
»plot(X,Y)
Fanout
80
60
40
20
0
0
1
2
3
4
Inverse Current Gain
5
27
10.89
+2 V
+2 V
+
2 k
2 k
0.8 V
+
V OH
Q
1
I IN
2 k
0.7 V
-
Q
Q
+
2
0.8 V +
3
0.8 V
-
Q
-
1
0.15 V
a V OH  2  V ECSAT 2  2  0.15  1. 85 V | V OL  V CESAT 3  0.15 V
2  0.7  0. 8V
 62.5 A
b  i IH : i B2  0 | i IH  0.25
i IL  i B1  
2  0.8  0.15 V
2k
c Assume  FOR  28.3
2k
2  0.8  0.8  0.15 V

 650 A
2k
For the pnp transistor: N 62.5A   28. 3
2  0.8  0.8  0.15V  N  56
2k
2  0.7  0.8 V  N  13
For the npn transistor: N 650A   28.3 1. 25
2k
10.90
a V OL  V CESAT3  0.15 V | V OH  2  V BE 2  2  0.7  1.3 V
2  0. 8  0.15 2  0.15  0.15 

  247 A

10000
12000

b  v I  0.15V: i IL   i B1  i C1    
2  0.7  0.8 
v I  1. 3V: i IL   R i B1  0.25 
  12.5 A


10 4
2  0.8  0.15 2  0.15  0.15

 1.875mA
c Using  FOR  28.3: i L  iB 2  i C2 
6000
1000
2  0.8
2  0. 7  0.8 
 1.25 

  162.5A
 10000

12000
28.3 0.1625 mA   N 0.247mA   1.875mA  N  11
iB3 
10.91
a Y = ABC b  V OL  V CESAT 3  0.15 V | V OH  3.3  V BE1  V D  3.3 1. 4  1.9 V
c v I  1. 9V, input diode is off and iIH  0. v I  0.15V, i IL  
28
3.3  0.7  0.15
 408 A
6000
2.0V
vO
1.5V
1.0V
0.5V
vI
0V
0V
10.92
1.0V
2.0V
3.0V
4.0V
The VTC starts to decrease immediately
because Q2 is ready to conduct due to the
0.7 V drop across the input diode. When
the input has increased to approximately
0.7 V, Q3 begins to conduct and the output
drops rapidly. The VTC is much slopier
than that of the corresponding TTL gate.
For this particular circuit VIL = 0 and VIH =
0.8 V. Based upon our definitions, NML =
0.
However, the initial slope can be
reduced by changing the ratio RC/R2 so
that VIL = 0.7 V.
(a) If either input A is low or input B is low, V B2 will be low. Q2 will be off, Q3
will be on and Y will be low. Therefore Y  A  B  Y  AB .
+5 V
+5 V
4 k
0.8 V
+ 0.3 V
4 k
+
Q
+0.45 V
VB
1
Q
- 0.15 V +
Q
1
2
+ 4.3 V
10 k 
10 k 
-5 V
5 k
-5 V
b  V OH  5  I B5 R 2  V BE 5  5  V BE5  5  0.7  4.30 V
V OL  5   F I E 3R 2  I B5 R 2  V BE5  5  I E3 R 2  V BE 5
0.7  0. 7  5
 1.00mA | V OL  5  0.0014000   0.7  0. 300 V
5000
5  0.7  V B  V B  5  V B  0.7  5 1
c v I  4.3V: 1.25 

 

 V B  1. 97V

4000

10000
5000
41
5  0.7 1.97
I B1 
 582 A | I E1  0.25I B1  146 A | I IH  146 A
4000
0.3  0.15  5 
5  0.8  0.3
v I  0. 3V: I B1 
 975 A | I C1  
 545 A
4000
10000
I E1  IB1  IC1  430 A | I IL  430 A
IE 3 
29
10.93
1.5 V
1 k
800 
0.70 V
0.25 V
Off
1 k
800 
V OH
Q
- 0.45 V +
1.5 V
1
Off
+
Off
0.45 V
+
0.7 V
Q
1
-
a V OH  V CC  1. 5 V | V OL  " V CESAT1 "  0.7  0.45  0.25 V
b  For v I  1.5V, the input diode is off and IIH  0.
1.5  0.45  0.25
 1.00 mA
800
c Note that Q1 operates as if it were in the forward- active region:
For v I  0.25 V, I IL 
1.5  0. 25
1.5  0. 45  0. 70 
 F IB1  NI IL  I R 2 | 40 
  N 0.001 
 N  16


800
1000
10.94
v BE  v D2  v D1  v CE | For v D2  v D1, v CE  v BE  0.7 V
Note, the external base current source should be labeledBB
i .
i C  iCC  iD1 | i B  iBB  i D1 | i C   F i B
i CC  i D1   F i BB  iD1   i D1 
 F iBB  iCC 20 0.25   1

mA  0.191 mA
 F 1
21
i D2  i BB  i D1  0.25  0.191  0. 059 mA | i C  20i B  20iD2  1.18 mA
10.95
In this circuit as drawn, the collector- base junction of Q1 is
bypassed by a Schottky diode. Q1 will be " off" with VBC  0.45 V.
5  0.45  0.7
i B1 
 963 A | I IN  0 | i B 2  i B1  963 A
4000
10.96
i B1 
10.97
30
5  0.7  0. 25
 1. 01 mA | I IN  iB1 = 1. 01 mA | i B2  0
4000
10.98
For v I = 5 V, the Schottky diode bypasses the collector- base junction, I IH  0,
5. 45  0.7
and i B2  i B1 
 963A
4000
5  0.7  0.25
For v I = 0.25V, I IL  
 1.01 mA
4000
5  0.25
40 963A   N 1.01mA  
 N  35
2000
5  0. 45  0. 7  0.7
5  0.25  0.7
 1.13 mA | i C 3 
 4.50 mA
2800
900
 1.13 mA | i B1 = iB 3  1.13 mA
a v I  V OH: i B3  i RB 
i E 3 = 0 | i C1 = i B 3
0.7  0.25 
1 
1 
  1.85 mA
 40 
250
i B 2  1.13mA  4.50mA  1. 85mA  3.78 mA | Q 4 and Q5 are off.
5  0.7  0. 25
b  v I  V OL : Q 2 ,Q3 ,Q4 and Q6 are all off. i B1  i RB 
 1.45 mA
2800
5  900i B5  0.7 5  0.7
iE5 

 1.23 mA
3500
3500
i B 2  i B3  i C 3  i C6  iB 6  |
iC 6  i B6  
10.99
4.0V
4.0V
vO
vI
3.0V
3.0V
2.0V
2.0V
1.0V
1.0V
vO
Time
0V
0V
1.0V
2.0V
vI
3.0V
4.0V
5.0V
0V
0s
5ns
10ns
15ns
20ns
25ns
Result: P = 3.0 ns
*Problem 10.99 - Schottky TTL Inverter VTC
VI 1 0 DC 3.5 PWL(0 3.5 0.2N 0.25 15N 0.25 15.2N 3.5 30N 3.5)
VCC 9 0 DC 5
Q1 2 8 1 NBJT
D1 2 8 DS
Q2 4 3 0 NBJT
D2 3 4 DS
Q3 6 2 3 NBJT
D3 2 6 DS
Q4 7 5 4 NBJT
Q5 7 6 5 NBJT
D5 6 7 DS
31
30ns
RB 9 8 2.8K
RC 9 6 900
RS 9 7 50
R5 5 0 3.5K
RL 4 0 100K
Q6 10 11 0 NBJT
D6 11 10 DS
R2 3 11 500
R6 3 10 250
.OP
.DC VI 0 5 .01
.TRAN .025N 30N
.MODEL NBJT NPN BF=40 BR=0.25 IS=1E-17 TF =0.15NS TR=15NS
+CJC=1PF CJE=.5PF CJS=1PF RB=100 RC=10 RE=1
.MODEL DS D IS=1E-12
.PROBE V(1) V(2) V(3) V(4) V(5) V(6)
.END
10.100
+5V
20 k 
120 
8 k
Off
Q
Off
Q
5
V OH
D
+
2
Q
+
Off
D Off
3
O
5
4 Off
R
2
6
3 k
+
1.5 k
Q
+
0.7 V
v
4 k
D
-
32
R
2 0.25 V
-
0.7 V
R
4
6
0.25 V
-
-
+
Q
3 0.25 V
+
-
0.7 V
-
a v I  V OH: Q4 and Q5 are off.
5  0.7  0.7
5  0.25  0.7
 180 A | i C 2 
 506 A
20000
8000
0.7  0.25 
1 
 i B2  i C 2  i C6  iB 6  | iC 6  i B6  
1 
  154 A
3000
 40 
i B2 
i B3
i B 3  180A  506A 154A  532 A
b  v I  V OL : Q 2 ,Q3 ,Q4 ,Q5 and Q 6 are all off.
10.101
*Problem 10.101 - Low Power Schottky TTL Inverter VTC
VI 1 0 DC 3.5 PWL(0 3.5 0.2N 0.25 10N 0.25 10.2N 3.5 20n 3.5)
VCC 9 0 DC 5
DS1 8 1 DS
Q3 4 3 0 NBJT
D3 3 4 DS
Q2 6 8 3 NBJT
D2 8 6 DS
Q4 7 5 4 NBJT
Q5 7 6 5 NBJT
D5 6 7 DS
DS3 5 6 DS
DS4 4 6 DS
RB 9 8 20K
RC 9 6 8K
RS 9 7 120
R5 5 4 4K
Q6 10 11 0 NBJT
D6 11 10 DS
R2 3 11 1.5K
R6 3 10 3K
RL 4 0 100K
.OP
.DC VI 0 5 .01
.TRAN .025N 20N
.TEMP -55 +25 +85
.MODEL NBJT NPN BF=40 BR=0.25 IS=1E-17 TF =0.25NS TR=25NS
+CJC=0.6PF CJE=.6PF CJS=1.25PF RB=100 RC=5 RE=1
.MODEL DS D IS=1E-12
.PROBE V(1) V(2) V(3) V(4) V(5) V(6)
.END
33
Result:
SPICE.
10.102
P = 13 ns. Note that the delays are dependent upon the specific BJT models used in
In the first printing, see solution to Problem 10.101.
*Problem 10.102 - Advanced Low Power Schottky TTL Inverter VTC
VI 1 0 DC 4 PWL(0 4 0.2N 0.3 125N 0.3 125.2N 4 150N 4)
VCC 9 0 DC 5
Q4 0 1 2 PBJT
R1 9 2 40K
Q1 12 2 8 NBJT
D1 2 12 DS
R2 9 12 60K
DS1 8 1 DS
Q8 4 3 0 NBJT
D8 3 4 DS
Q6 6 8 3 NBJT
D6 8 6 DS
Q3 7 5 4 NBJT
Q2 7 6 5 NBJT
D2 6 7 DS
DS3 4 6 DS
R3 9 6 15K
R4 9 7 50
R5 5 4 4K
Q7 10 11 0 NBJT
D7 11 10 DS
R6 3 11 3K
R7 3 10 6K
RL 4 0 100K
.OP
*.DC VI 0 5 .01
.TRAN .05N 150N
.TEMP -55 +25 +85
.MODEL NBJT NPN BF=40 BR=0.25 IS=1E-17 TF =0.15NS TR=15NS
+CJC=1PF CJE=.5PF CJS=1PF RB=100 RC=10 RE=1
.MODEL PBJT PNP BF=40 BR=0.25 IS=1E-17 TF =0.15NS TR=15NS
34
+CJC=1PF CJE=.5PF CJS=1PF RB=100 RC=10 RE=1
.MODEL DS D IS=1E-12
.PROBE V(1) V(3) V(4) V(5) V(6)
.END
5.0V
5.0V
vO
4.0V
4.0V
-55 o C
3.0V
3.0V
vO
+25 oC
2.0V
2.0V
1.0V
1.0V
+85 oC
vI
Time
0V
0V
1.0V
2.0V
vI
3.0V
4.0V
5.0V
0V
0s
50ns
100ns
150ns
Result: P = 22 ns. Note that the delays are highly dependent upon the specific BJT models
used in SPICE.
35
10.103 Note that Prob. 10.103 in the first printing is a duplicate of Prob. 10.101.
Y  A  B  C | V OH  0 V | V OL  540I C  540
V REF  0.7  3
 0.72 V REF  2.3
750
V OH  V OL
 V REF  0.7  0.4  0.7  V REF  0. 4
2
0  0.72V REF  2.3 
 V REF  0.4  V REF  0.903V | V OL  0.72. 903  2.3  1.01 V
2
R
C
3.3 k
Y
Y
V
C
V REF - 0.4
REF
+
Q
0.7
-V
R
V REF
V REF - 0.7
R
10.103
E
2.4 k
-3
V
10.104
-3 V
10.104
Y  A  B  C | V OH  0 V | V OL  V REF  0. 4
0  V REF  0.4 
V OH  V OL
 V REF |
 V REF  V REF  0.40 V | V OL  0.80V
2
2
10.105 The circuit can be modeled by a normal BJT with a schottky diode in parallel with
the collector base junction. If iC and iB are defined to be the collector- and basecurrents of the BJT,
5  0.7
1. 075mA
iC  iB 
 1. 075mA | i C   F i B  i B 
 26.9 A | iC  1.05 mA
4000
40
36
+5 V
i=0
4 k
iC
iB
Q
1
37