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TRANSISTOR AMPLIFIER
CONFIGURATION
-BJT Common-Emitter AmplifierBy:
Syahrul Ashikin Azmi
School of Electrical System Engineering
1
Objectives


To understand and familiar with dc
analysis of bipolar transistor circuits.
To study common-emitter amplifier in
term of ac analysis and familiar with
general characteristic of this circuit.
2
Introduction

3 basic single-transistor amplifier configuration
that can be formed are:




Common-emitter (C-E configuration)
Common collector / emitter follower (C-C
configuration)
Common base (C-B configuration)
Each configuration has its own advantages in
form of:



Input impedance
Output impedance
Current / voltage amplification
3
Basic common-emitter circuit
Dc voltage
-> power the amplifier
VCC
Voltage divider biasing
-> set Q-point
Coupling capacitor ->
dc isolation between amplifier
and signal source
R1
vo
CC
vs
Emitter at ground
-> common emitter
RC
R2
4
Rules in dc analysis




Replacing all capacitors by open
circuit.
Replacing all inductors by short
circuit.
Replacing ac voltage source by short
circuit or ground connection.
Replacing ac current source by open
circuit.
5
VCC
1st: Perform DC
analysis


The circuit can be
analyzed by forming a
Thevenin equivalent
circuit.
CC acts as an open circuit
to dc.
RC
RTH
VTH
6
Thevenin circuit analysis

We know that,
I CQ   I BQ

I EQ  (1   ) I BQ
Thevenin voltage, VTH is:
VTH
 R2 
VCC
 
 R1  R2 
Apply KVL around B-E
loop;
VTH  I BQ RTH  V BE ( on)  0
VTH  VBE ( on)
I BQ 
RTH
Thevenin resistance, RTH
is:
RTH  R1 R2



The collector current,
ICQ is then:
I CQ   I BQ
 VTH  V BE ( on)
  
RTH
7 




Cont. Thevenin circuit analysis

Apply KVL to collector-emitter loop;
VCC  I CQ RC  VCEQ  0
VCEQ  VCC  I CQ RC
 VCC  I BQ RC

Thus, Q-point of the amplifier circuit is the
coordinate between ICQ and VCEQ.
8
Rules in ac analysis




Replacing all capacitors by short
circuits
Replacing all inductors by open
circuits
Replacing dc voltage sources by
ground connections
Replacing dc current sources by open
circuits
9
2nd: Perform AC analysis
-small-signal equivalent circuit-
Inside the transistor
10
Small-signal hybrid-π parameters

Small-signal input resistance,
rπ
V 
r  T
I CQ

Transconductance, gm
gm 

I CQ
VT
Small-signal output
resistance, ro
ro 
VA
I CQ

Control voltage, Vπ
 R1 R2 r

V  
 R1 R2 r  RS


Output voltage, Vo

Input resistance, Ri

V
 s

Vo  gmV ro RC 
Ri  R1 R2 r
11
Small-signal hybrid-π parameters

Output resistance, Ro
Ro  ro RC

Voltage gain, Av
 R1 R2 r 
Vo

r R 
Av    g m 
 R1 R2 r  RS  o C
Vs


12
Example 1
VCC
R1
R1
vs
R2
Given VCC=12V,RS=0.5kΩ,
R1=93.7kΩ, R2=6.3kΩ,
RC=6kΩ, β=100,
VBE(on)=0.7V and VA=100V.

Determine small-signal
voltage gain, input
resistance and output
resistance of the circuit.
RC
vo
CC

13
Solution Example 1




1st step: DC solution
Find Q-point values.
ICQ = 0.95mA
VCEQ=6.31V.
14
Cont Solution Example 1


2nd step: AC solution
Small-signal hybrid-π parameters are:
VT  (0.026)(100)
r 

 2.74k
I CQ
0.95
gm 
I CQ
VT
0.95

 36.5mA / V
0.026
VA
100
ro 

 105k
I CQ 0.95
15
Cont Solution Example 1


Small-signal voltage gain is:
 R1 R2 r
Vo
Av 
 gm 
R R r R
Vs
S
 1 2 

(r R )
 o C

 5.9 2.74 
(105 6)  163
Av  ( 36.5)
 5.9 2.74  0.5 


Input resistance, Ri is:
Ri  R1 R2 r  5.9 2.74  1.87k
16
Cont Solution Example 1

O/p resistance, Ro -> by setting independent
source Vs = 0 -->no excitation to input portion,
Vπ=0, so gmVπ=0 (open cct).
Ro  ro RC  105 6  5.68k
17
Common-emitter circuit with emitter
resistor



Why we need to add emitter resistor, RE in the
circuit design?
Without RE, when β increases or decreases -> ICQ
and VCEQ also vary, thus Q-point will be shifted
and makes the circuit unstable.
By adding RE, there will be not much shift in Qpoint is stabilized even with variation of β.
Moreover, the voltage gain is less dependent on
transistor current gain in ac analysis.
18
Common-emitter circuit with emitter
resistor
VCC
R1
RC
vo
CC
vs
Emitter resistor
R2
RE
19
Thevenin circuit analysis
VCC
RC

Apply KVL around B-E loop,
VTH  I BQ RTH  VBE ( on)  I EQ RE  0
VTH  I BQ RTH  VBE ( on)  (1   ) I BQ RE  0
RTH
I BQ RTH  (1   ) R E   VTH  V BE ( on)
VTH
RE
I BQ 
VTH  V BE ( on )
RTH  (1   ) R E
20
Thevenin circuit analysis

We will get collector current as:
I CQ   I BQ
 VTH  V BE ( on)
  
 RTH  (1   ) R E





Apply KVL around C-E loop to find VCEQ,
VCC  I CQ RC  VCEQ  I EQ RE  0
VCEQ  VCC  I CQ RC  I EQ RE
 VCC   I BQ RC  (1   ) I BQ RE
 VCC  I BQ  RC  (1   ) RE 
21
Ac analysis
-small-signal equivalent circuit-
22
Small-signal hybrid-π parameters


The ac output voltage is: (if we consider equivalent
circuit with current gain β)
Vo  (  I b ) RC
Input voltage equation:
Vin  I b r  ( I b  I b ) RE

Input resistance looking into the base of BJT, Rib:
Vin
Rib 
 r  (1   ) R E
Ib

Input resistance to the amplifier is:
R i  R1 R 2 R ib
23
Small-signal hybrid-π parameters


By voltage divider, we get relate Vin and Vs:
 Ri 
V s
Vin  
 Ri  R S 
Exact value
Small-signal voltage gain is then:
Vo
 RC
Av 

V s r  (1   ) R E

 Ri

 Ri  R S



If Ri>>RS and if (1+β)RE >> rπ, voltage gain is:
Vo
 RC
 RC
Av 


V s (1   ) R E
RE
Approximate value
24
Example 2

VCC
R1
RS
vs
RC
vo
CC
R2
RE
Given VCC=10V, R1=56kΩ,
R2=12.2kΩ, RC=2kΩ,
RE=0.4kΩ, RS=0.5kΩ,
VBE(on)=0.7V, β=100 and
VA=∞.
a) Sketch Thevenin equivalent
circuit.
b) Determine Q-points.
c) Sketch and label small-signal
equivalent hybrid-π circuit.
d) Find small-signal voltage
gain, AV.
25
Common-emitter circuit with positive and
negative voltage biasing

Biasing with dual supplies in desirable in
some applications because:


Eliminate coupling capacitor
Allow dc input voltages as input signals.
26
Example 3

A simple transistor circuit biased with both +ve and
–ve dc voltages is shown in figure below. Given
β=100 and VBE(on)=0.7V. Calculate IEQ, ICQ and
VCEQ.
27
Solution Example 3


For dc analysis, set vs=0 so that base terminal is at
ground potential.
KVL around B-E loop,
0  VBE ( on)  I EQ RE  V 

So, emitter current:
I EQ 

 (V   VBE ( on) )
RE
 ( 5  0.7)

 2.15mA
2
Collector current:
I CQ
 
 
1 

 100 
 I EQ  
2.15  2.13mA
 101 

28
Cont solution example 3

Apply KVL around C-E loop yields
V   I CQ RC  VCEQ  I E RE  V 

Rearrange the equation to find VCEQ;
VCEQ  (V   V  )  I CQ RC  I EQ RE
 (5  5)  (2.13)(1.5)  ( 2.15)( 2)  2.15V
29
Example 4

Let β=120, R1=175kΩ,
R2=250kΩ, RC=10kΩ,
RE=20kΩ and
VBE(on)=0.7V.

For the given circuit,
i) Find RTH, VTH and
Q-points.
ii) Sketch dc load line
30
Solution Example 4

1st: Sketch Thevenin equivalent circuit to find
RTH and VTH.


2nd: Apply KVL around B-E loop to find equation
for IBQ. Then, find ICQ and IEQ.



IBQ = 3.92μA
ICQ = 0.471mA & IEQ = 0.474mA
3rd: Apply KVL around C-E loop to find equation
for VCEQ.


RTH = 103kΩ & VTH = 1.6V
VCEQ = 3.8V
4th: Sketch dc load line and indicate the Qpoints. Find IC(max) at y-axis and VCE(cutoff)=
VCC=V+-V-=18V at x-axis.
31
C-E Amplifier with Emitter Bypass Capacitor
CE provides a short
circuit to ground for the
ac signals
32
Cont..






By include RE, it provide stability of Q-point.
If RE is too high +++> small-signal voltage gain will
be reduced severely. (see Av equation)
Thus, RE is split to RE1 & RE2 and the second resistor
is bypassed with “emitter bypass capacitor”. CE
provides a short circuit to ground for ac signal.
So, only RE1 is a part of ac equivalent circuit.
For dc stability: RE=RE1+RE2
For ac gain stability: RE=RE1 since CE will short RE2 to
ground.
33
Example 6

Given β=100, VBE=0.7V and VA=100V. Determine: (a) smallsignal voltage gain (b) input resistance seen by the signal
source, Rin and the output resistance looking back into the
output terminal, Ro.
34
AC Load Line Analysis




Dc load line -> a way of visualizing r/ship between
Q-point and transistor characteristic.
When capacitor included in cct, a new effective load
line  ac load line exist.
Ac load line -> visualizing r/ship between smallsignal response and transistor characteristic.
Ac operating region is on ac load line.
35
Ac load line cont..
36
Ac load line cont..

For Dc load line:
Apply KVL around collector-emitter loop,

But

Substitute and rearrange both equations:

If β>>1, then we can approximate

Dc load line
equation
37
Cont..

For ac analysis, apply KVL around collector-emitter loop,
i c RC  v ce  i e RE 1  0

Assume ic ≈ ie,

The slope is given by:
vce  ic ( RC  RE 1 )
1
Slope 
RC  R E 1

The slope of ac load differ from dc load line  RE2 is not
included in the equivalent circuit. Small-signal C-E voltage and
collector current response are functions of resistor RC and RE1.
38
Dc and ac load lines for CE circuit
39
AC load line cont..
+ IC
icsat
i
Slope 
VCC
RC  R E
i  2 ICQ
1
 I CQ  ic
2
Q
ICQ
0
v  ic ( RC  RE 1 )
VCEQ
VCC
v
1
RC  RE 1
+ VCE
vce  VCEQ  vce
40
Maximum symmetrical swing



When symmetrical sinusoidal signal applied to i/p of
amplifier, symmetrical sinusoidal signal generated at
o/p.
Use ac load line to determine the maximum output
symmetrical swing.
If output exceed limit, a portion of o/p signal will be
clipped and signal distortion occur.
41
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