Download Critical Design Delta Review 2 electronics modification

Electronics Modification:
Critical Design Delta Review 2
Tom Montagliano
July 27th, 2012
1
Open Items
Modifications
1. Perform noise measurement on larger scale
2. Zoom into noise data and analyze
3. Determine how current will be measured with Virgo
attached
4. Re-select protection diode that will not allow
voltages over 5.7 V
5. Gather more information on temperature sensor
and develop action plan
6. Re-simulate crosstalk with proper values for the
input voltage
7. Propose PCB layout, schematic and mounting
2
Noise analysis with varied time scales
Critical Design Delta Review 2
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Noise analysis with different time
scales on plot
x-axis=ADU y-axis = time (ms)
measurements made with current source added
CDS noise = 9.84 µV
measurements made with no current source
CDS noise = 8.88 µV
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Diode Selection
Critical Design Delta Review 2
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Diode selection
2.
3.
4.
The Vishay 5.65 V zener diode (TZX5V6D) is an ideal choice for our application since there is little
current draw at 5V and the voltage drop will not exceed 5.7 V.
The Fairchild 5.6 V zener diode (1N5343BTR) is not as good as the Vishay diode for our application
since there is relatively more current draw at 5V.
With 5 V on the bias line, the voltage across the diode will be 4.95 V for the Vishay diode and 4.87 V
for the Fairchild diode.
CONCLUSION: The Vishay 5.65 V zener diode (TZX5V6D) will be used as the protection diode.
IV Curve for Vishay and Fairchild Diodes
Bias Voltage (V)
-5.9
-5.7
-5.5
-5.3
-5.1
-4.9
-4.7
-4.5
-4.3
-4.1
-3.9
0.1
1
10
100
1000
10000
Current through diode (uA)
1.
Vishay 5.65
Fairchild 5.6
6
Temperature Sensor
Critical Design Delta Review 2
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Temperature Sensor
1. There is 1 DT470-SD-12A located on the
motherboard of the Virgo package.
2. This will be routed to the Lakeshore through the
cabling and will not involve the electronics system.
DT470-SD-12A
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Crosstalk Simulations
Critical Design Delta Review 2
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Notes on Source-follower
Transimpedance
1.
2.
3.
It was suggested to assume RDS(on) = 2 kΩ, BUT:
Using this value results in bogus simulation results (flat lines)
PSPICE parameter “RDS”:
a.
b.
4.
5.
Description: “Drain-source shunt resistance”
Units: ohms; Default value: infinity
We know that an ideal MOSFET acting as a switch will have RDS = 0 Ω
Recall small-signal model of PMOS FET:
http://www.prenhall.com/howe3/microelectronics/pdf_folder/lectures/mwf/lecture12.fm5.pdf
a.
b.
1.
Ideally ro = infinity; so in PSPICE, RDS must be the same as ro.
The source/drain impedance when FET is “on” is a combination of gm, VGS, and ro. We
don’t know this information without physical testing, or information from Raytheon.
For these simulations, we’re using an ideal PMOS FET
Measured Rout of Leach +16.5 V
VL
Rout
Vs
RL (Ω)
VL (V)
IL (mA)
Rout (Ω)
Inf.
16.585
0.0
n/a
1737.4
16.582
9.5441
0.314
259.16
16.5755
63.9586
0.1485
147.5
16.572
112.3525
0.1157
RL
16.5
0
0
1.
2.
3.
4.
Measure VL with no load (VOC)
Measure RL and add RL to circuit. Measure VL.
Calculate IL = VL / RL.
Calculate Rout = (Voc – VL) / IL.
Schematic
J1
J2
J2N4393
J2N4393
R3
10
V1
16.5
R1
6.5k
R2
6.5k
0
I
Mbreakp
V1 = 1.2
V2 = 2.2
TD = 0
TR = 10n
TF = 10n
PW = 4.99u
PER = 10u
I
Mbreakp
V
M1
V
M2
V6
V2
1.7
0
V3
V5
2.0
2.0
0
0
0
100 KHz square wave with 10 ns rise/fall-time
Voltage Measurements
6 .1 4 6 0 V
6 .1 4 5 8 V
(10.01u,6.14591694)
6 .1 4 5 6 V
(10.214u,6.14546776)
Victims
(10.588u,6.14546299)
6 .1 4 5 4 V
(9.923u,6.14546347)
(10.06u,6.14536047)
6 .1 4 5 2 V
V ( M 2 :s )
6.8V
(10.112u,6.64095783)
6.4V
(10.588u,6.63591194)
(10.214u,6.63233376)
Aggressor
6.0V
(9.923u,5.70718765)
SEL>>
5.6V
9.90us
9.95us
V(M1:s)
10.00us
10.05us
10.10us
10.15us
10.20us
10.25us
10.30us
10.35us
10.40us
10.45us
10.50us
10.55us
10.60us
10.65us
10.70us
10.75us
10.80us
10.85us
10.90us
10.95us
Time
Efficiency of Source Follower:
Duration of crosstalk to within 25 µVPP: (10.11 – 10.0) = 0.11 µs
After 0.11 µs, VPP = 4.29 µV.
fmax > 2 MHz (assuming 25 µVPP takes 0.5 µs).
Current Measurements
-1 9 6 .7 2 1 4 4 8 0 u A
(10.112u,-196.7214485u)
(9.958u,-196.7214485u)
-1 9 6 .7 2 1 4 5 1 9 u A
Victims
-1 9 6 .7 2 1 4 5 5 9 u A
IPP = 14.5 pA
t = 10.11 µs – 10.01 µs = 100 ns
-1 9 6 .7 2 1 4 5 9 9 u A
(10.023u,-196.7214630u)
-1 9 6 .7 2 1 4 6 3 9 u A
I (R 2 )
-196.68uA
-196.70uA
(10.207u,-196.6924977u)
Aggressor
-196.72uA
-196.74uA
(9.949u,-196.7473945u)
IPP = 54.9 nA
SEL>>
-196.76uA
9.90us
9.95us
I(R1)
10.00us
10.05us
10.10us
10.15us
10.20us
10.25us
10.30us
10.35us
10.40us
10.45us
Time
10.50us
10.55us
10.60us
10.65us
10.70us
10.75us
10.80us
10.85us
10.90us
10.95us
Schematic with Bypass Capacitors
J1
J2
C1
0.1u
J2N4393
R3
10
C2
0.1u
J2N4393
0
V1
0
16.5
R1
6.5k
R2
6.5k
0
I
Mbreakp
V1 = 1.2
V2 = 2.2
TD = 0
TR = 10n
TF = 10n
PW = 4.99u
PER = 10u
I
Mbreakp
V
M1
V
M2
V6
V2
1.7
0
V3
V5
2.0
2.0
0
0
0
Voltage Measurements
with Bypass Capacitors
6 .1 4 5 4 6 7 V
(10.022u,6.14546633)
6 .1 4 5 4 6 6 V
VPP = 2.86 µV
6 .1 4 5 4 6 5 V
6 .1 4 5 4 6 4 V
(9.963u,6.14546347)
Victims
(10.200u,6.14546347)
6 .1 4 5 4 6 3 V
V ( M 2 :s )
7.0V
(10.111u,6.64012461)
6.5V
Aggressor
6.0V
(9.942u,5.70718765)
SEL>>
5.5V
9.90us
9.95us
V(M1:s)
10.00us
10.05us
10.10us
10.15us
10.20us
10.25us
10.30us
10.35us
10.40us
10.45us
10.50us
10.55us
10.60us
10.65us
10.70us
Time
Duration of crosstalk to within 25 µVPP: 0.0 ns
fmax limited by rise/fall times
10.75us
10.80us
10.85us
10.90us
10.95us
Crosstalk Conclusions
1. The voltage supply output resistance should be
as small as possible to reduce voltage droops
a. If Rout = 0 Ω: no crosstalk
b. If Rout = 10 Ω: crosstalk is as previously shown
c. Measured Rout ≈ 0.1 Ω
1) Crosstalk will be much less than what was previously
shown
2. Adding small (0.1 µF) bypass capacitors to
each current source significantly reduces
crosstalk to the point of insignificance
Current Source Board (CSB)
schematic, layout and mounting
Critical Design Delta Review 2
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CSB schematic
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CSB layout
Through Hole
JFET
potentiometer
SMT JFET
0 ohm resistor
SMT resistor
20
General procedure for measurement of
calibration of a single current source
Remove 0 Ω resistor from CSB
Ensure potentiometer is at maximum value
Connect ammeter using vias on CSB
Run System so that current source is active
Adjust potentiometer until 200 µA is measured
on ammeter
6. Turn off system
7. Reinstall 0 Ω resistor
1.
2.
3.
4.
5.
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CSB Mounting Side View
ARC46 board in
adjacent slot
Capacitor on bottom :
4.5 mm
DB connector
Mating DB connector
MOD BRACKET
Potentiometer : 5 mm
1/8” Spacer
Current Source Board
16.5 V Supply
Current Source
Board wire
connection to PCB
5/8” 4-40 screws
ARC46 board PCB
Through Hole
Resistor:
1.5 mm
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CSB Mounting Top View
ARC46 board PCB
16.5 V Supply
Mounting
Holes
Potentiometers
Current Source
Board
MOD BRACKETS
pInput through
hole locations
on the ARC-46
(not on CSB)
DB connectors
5/8” 4-40 screws
Mating DB connectors
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Mod Bracket Specifications
0.236”
0.250”
4-40 tapped screw hole
1.673”
0.0625”
Top View
0.750”
0.0625”
0.100”
0.303”
0.531”
4-40
clearance
Front View
Right Side View
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