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EE 434
Lecture 12
Devices in Semiconductor Processes
Diodes
Capacitors
MOS Transistors
Quiz 10
A “10K” resistor has a temperature coefficient of +80ppm/oC If the
resistor was measured to be 9.83K at 20oC, what would be the
resistor value at 80oC?
And the number is ….
8
1
6
7
9
5
4
3
3
2
Quiz 10
A “10K” resistor has a temperature coefficient of +80ppm/oC If the
resistor was measured to be 9.83K at 20oC, what would be the
resistor value at 80oC?
Solution
TCR 

R T2   R T1  1  T2  T1  6 
10 

80 

R T2   9.83K 1  80 - 20  6   1.0048  9.83K  9.877184K
10 

Review from Last Time
• Process Flow is a “recipe” for the process
– Shows what can and can not be made
– Gives insight into performance capabilities and limitations
• Back-End Processes
– Die attach options (eutectic, preform,conductive epoxy)
• Stresses the die
– Bonding
• Wire bonding
• Bump bonding
– Packaging
• Many packaging options
• Package Costs can be large so defective die should be
eliminated before packaging
Basic Devices and Device Models
•
•
•
•
•
Resistor
Diode
Capacitor
MOSFET
BJT
Diodes (pn junctions)
N
P
Depletion region created that is ionized but void of carriers
pn Junctions
N
P
Physical Boundary
Separating n-type and
p-type regions
If doping levels identical, depletion region extends
equally into n-type and p-type regions
pn Junctions
N+
-
P
Physical Boundary
Separating n-type and
p-type regions
Extends farther into p-type region if p-doping lower
than n-doping
pn Junctions
-
N
+
P
Physical Boundary
Separating n-type and
p-type regions
Extends farther into n-type region if n-doping lower
than p-doping
pn Junctions
N
P
I
V
pn Junctions
I
N
P
V
I
V
Diode Equation:
V

nVT

I  JS Ae
0
V 0
V0
JS= Sat Current Density
A= Junction Cross Section Area
VT=kT/q
n is approximately 1
Basic Devices and Device Models
•
•
•
•
•
Resistor
Diode
Capacitor
MOSFET
BJT
Capacitors
• Types
– Parallel Plate
– Fringe
– Junction
Parallel Plate Capacitors
A2
cond1
C
A1
cond2
d
insulator
A = area of intersection of A1 & A2
One (top) plate intentionally sized smaller to determine C
A
C
d
: Dielectric constant
Parallel Plate Capacitors
Cap
If Cd 
unit area
εA
C
d
C  Cd A
where
ε
Cd 
d
Fringe Capacitors
C
d
εA
C
d
A is the area where the two plates are parallel
Only a single layer is needed to make fringe capacitors
Fringe Capacitors
C
Capacitance
Junction Capacitor
C
p
d
n
d
depletion
region
A
C
d
C
C jo A

V 
 1  D 
 φB 
n
φB  0.6V
VD
φB
for VFB 
2
Note: d is voltage dependent
-capacitance is voltage dependent
-usually parasitic caps
-varicaps or varactor diodes exploit
voltage dep. of C
Cj0: junction capacitance at VD = 0V
B: barrier or built-in potential
Basic Devices and Device Models
•
•
•
•
•
Resistor
Diode
Capacitor
MOSFET
BJT
n-Channel MOSFET
Poly
n-active
Gate oxide
p-sub
n-Channel MOSFET
Gate
Drain
Source
L
W
LEFF
Bulk
n-Channel MOSFET
Poly
n-active
Gate oxide
p-sub
depletion region (electrically induced)
n-Channel MOSFET Operation and Model
VDS
ID
VGS
VBS
IB
IG
Apply small VGS
(VDS and VBS assumed to be small)
Depletion region electrically induced in channel
Termed “cutoff” region of operation
ID=0
IG=0
IB=0
n-Channel MOSFET Operation and Model
VDS
ID
VGS
VBS
IB
IG
Increase VGS
(VDS and VBS assumed to be small)
Depletion region in channel becomes larger
ID=0
IG=0
IB=0
n-Channel MOSFET Operation and Model
VDS
Critical value of
VGS that creates
inversion layer
termed threshold
voltage, VT)
ID
VGS
VBS
IB
IG
(VDS and VBS small)
Increase VGS more
Inversion layer forms in channel
Inversion layer will support current flow from D to S
Channel behaves as thin-film resistor
IDRCH=VDS
IG=0
IB=0
n-Channel MOSFET Operation and Model
VDS
ID
VGS
VBS
IB
IG
(VDS and VBS small)
Increase VGS more
Inversion layer in channel thickens
RCH will decrease
Termed “ohmic” or “triode” region of operation
IDRCH=VDS
IG=0
IB=0
Triode Region of Operation
ID
IG
VGS
VDS
IB
VBS = 0
For VDS small
L
VGS  VT  1
RCH 
W
COX
I D  μCOX
I G  I B 0
W
VGS  VT VDS
L
n-Channel MOSFET Operation and Model
VDS
ID
VGS
VBS
IB
IG
(VBS small)
Increase VDS
Inversion layer thins near drain
ID no longer linearly dependent upon VDS
Still termed “ohmic” or “triode” region of operation
ID=?
IG=0
IB=0
Triode Region of Operation
ID
IG
VGS
VDS
IB
VBS = 0
For VDS larger
L
VGS  VT  1
RCH 
W
COX
I D  μCOX
I G  I B 0
VDS 
W
 VGS  VT 
 VDS
L 
2 
n-Channel MOSFET Operation and Model
VDS
ID
VGS
VBS
IB
IG
(VBS small)
Increase VDS even more
Inversion layer disappears near drain
Termed “saturation”region of operation
Saturation first occurs when VDS=VGS-VT
ID=?
IG=0
IB=0
Saturation Region of
Operation
ID
IG
VGS
VDS
IB
VBS = 0
For VDS at saturation
VDS 
W
I D  μCOX
 VGS  VT 
 VDS
L 
2 
or equivalently
VGS  VT 
W
V

V

 GS
VGS  VT 
T
L 
2

or equivalently
μCOX W
VGS  VT 2
ID 
2L
I G  I B 0
ID  μCOX
n-Channel MOSFET Operation and Model
VDS
ID
VGS
VBS
IB
IG
(VBS small)
Increase VDS even more (beyond VGS-VT)
Nothing much changes !!
Termed “saturation”region of operation
ID=?
IG=0
IB=0
Saturation Region of
Operation
ID
IG
VGS
VDS
IB
VBS = 0
For VDS in Saturation
μCOX W
2
VGS  VT 
ID 
2L
I G  I B 0
Model Summary
ID
IG
VGS
VDS
IB
VBS = 0

0

W
VDS 

ID  μCOX
 VGS  VT 
 VDS
L 
2 


W
2


μC
V

V
 OX
GS
T
2L

VGS  VT
VGS  VT VDS  VGS  VT
VGS  VT VDS  VGS  VT
Note: This is the third model we have introduced for the MOSFET
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