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Transcript
```Reflection suppression
methods
EECS 713
Liyao Wang
Outlines
Theory
Simulation circuit
Termination
•
•
•
•
•
Source termination
Thevenin termination
RC termination
Diode termination
Theory
Figure_1
𝑍𝑠 ≠ 𝑍0 ≠ 𝑍𝐿
Reflection 1: Source reflection
Reflection coefficient:
𝑍0 − 𝑍𝑠
Γ𝑠 =
𝑍0 + 𝑍𝑠
Reflection coefficient:
𝑍𝐿 − 𝑍0
Γ𝐿 =
𝑍𝐿 + 𝑍0
Theory
Set the voltage source as a dc source in which
Vdc=100V, 𝑍𝑠 =150Ω, 𝑍0 = 50Ωand 𝑍𝐿 =(10^16) Ω
Figure_3
Figure_2
Simulation circuit
Simulation circuit
Simulation Result
Source termination
1)
2)
3)
4)
Easy to assemble
Reduce ringing
Increase signal integrity
Reduce EMI
2) Increase the rise time of input signal
3) Wasting power
Source termination
Source termination
• Simulation result
1) Easy to assemble
2) Reduce ringing
3) Easy to find the resistor value
1) Increase power consumption
Simulation result
Thevenin termination
Standard:
𝑍0 = 𝑅1 ||𝑅2
𝑅1 22
=
𝑅2 33
𝑅2
𝑉𝑇ℎ𝑒𝑣 = 𝑉𝑐𝑐
𝑅1 + 𝑅2
The standard is not required for all the situation.
Thevenin termination
1) Good overshoot suppression
1) Large current drive (increase power consumption)
2) Increase the difficulty of layout
3) Hard to choose the resistor value and Vcc value
Thevenin termination
Thevenin termination
Simulation result
RC termination
1) Absorbing all the reflection wave
2) Low power consumption
1) Increase signal delay
2) The time constant of RC circuit may cause reflection
3) In high speed digital design, need to be careful of the
capacitor value
RC termination
RC termination
Simulation Result
Reference
 Paul, Clayton R., Introduction to Electromagnetic
compatibility, Wiley Series in Microwave and Optical
Engineering, 2006.
Wakerly, John F., Digita l Design Principles and Practices,
Pearson Education, Inc., 2006.
 R. Jagdale, A. Reddy, and K. Sundeep, “Optimization of
reflection issues in high speed printed circuit boards,”
in Proceedings of the 12th International Conference on
Networking, VLSI and Signal Processing, pp. 108–112, World
Scientific and Engineering Academy and Society, 2010
```