Download A Design-Oriented Compact MOST Model for Advanced - Mos-AK

MOS-AK Meeting, September 16, 2005
The EKV3.0 MOS Transistor Model
A Design-Oriented Compact Model for Advanced CMOS
Matthias Bucher
Technical University of Crete (TUC)
Outline
 Basic charge model
 Extensions to charge model
 Total charges modeling
 Mobility modeling
 Noise modeling
 EKV3.0 summary – effects & parameters
 Application – EKV3.0
 DC scaling
 Noise, RF - NQS, Load-Pull
 Summary
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
2
Basic charge model structure
CORE: Charge Model
EXTENSIONS
Quasi-Static Effects
EXTENSIONS
NQS Effects
EXTENSIONS
Noise
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
3
Inversion charge linearization



Inversion charge vs. surface potential (fixed VG) is essentially linear
Explicit use of linearization defines charge linearization factor nq
Intersection with x-axis defines pinch-off surface potential Yp


2q si N sub

YP  VG  VFB   s   s  ( s ) 2  VG  VFB  where  s 

2
Cox
2


Related concepts of pinch-off voltage Vp and slope factor nv

Use the same parameters (Tox, Nsub, VFB) as surface potential model
© M. Bucher TUC 2005
Workshop on Compact Models – Anaheim, 10-12 May 2005
4
Inversion charge linearization

Relation between inversion charge and
surface potential


dYS
1 dQi

 dx
dx
nqCox
Linear relationship among
Qi and YS: nq is the inversion charge
linearization factor
dI
dVch
Relationship among
channel conductance and Qi

Current & charge normalization

Voltage-charge relationship


 (VG  VFB  YS   YS )
Qi  Cox
c.f. also UCCM1993, ACM1995;
Bucher e.a. ISDRS 1997
Drain current including drift
& diffusion terms

Symmetric forwardreverse operation, valid
in all modes of inversion
© M. Bucher TUC 2005

I Spec  2nq Cox

x
W
(Qi( x))
L
W 2
UT
L
  2nq Cox
 U T2
QSpec
vP  vch  2qi  ln( qi ) where v 
I D  W (Qi)
Q
V
, qi  i

UT
QSpec
dVch
dY
dQi
 W (Qi S  U T
)
dx
dx
dx
I D  I Spec (i f  ir ) where i f ( r )  q iS2 ( D )  q iS ( D )
Workshop on Compact Models – Anaheim, 10-12 May 2005
5
Surface potential & “charge” model
3.0
Ys [V]
2.5
VS=2 V
Numerical
EKV
1.5 V
2.0
1V
1.5
0.5 V
1.0
0V
0.5
Vs = 2V
0.0
-0.5
-2
-1
0
1
2
3
4
VG – VFB [V]



Surface potential vs. VG – approximation by EKV “charge” model
“Charge” model needs to be adequately extended to cover
depletion/accumulation
Uses physics-based expressions, no fitting parameters involved
© M. Bucher TUC 2005
Workshop on Compact Models – Anaheim, 10-12 May 2005
6
Charge model extensions
 Charge model extensions for <100nm CMOS:
 Bias-dependent overlap & inner fringing
capacitances
 NQS model via channel segmentation
 Mobility/Velocity sat. & CLM
 Short-channel thermal noise
 Gate tunneling
 NQS noise
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
7
CV long-channel -- 120nm CMOS
1.0
0.6
0.4
0.2
0.0
-1.5
C11n NMOS Long-Wide
CGG Vc=0V
EKV3.0
CGC Vc=0V
EKV3.0
CGC Vc=0.5V
EKV3.0
CGC Vc=1V
EKV3.0
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
1,0E-09
8,0E-10
dC/dV [F/V]
C / Cox*Weff*Leff [-]
L > 100um
0.8
6,0E-10
4,0E-10
2,0E-10
0,0E+00
-2,0E-10
dCGG/dVG
EKV3.0
-4,0E-10
2.5
-6,0E-10
-1,5
-0,5
VG [V]
0,5
1,5
VG [V]
 Normalized CV characteristics
 Shows correct modeling of accumulation-depletion-inversion
 Long-Wide NMOS transistors, Ldrawn=100um
 Normalization w.r.t. C’ox*Weff*Leff
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
8
Short-channel effects in charge model
 Modeling of short-channel effects in charge/capacitances
 Non-uniform doping, QME, PDE,….
… effects get naturally coupled into the charges model
 Additionally, account for CLM & VSAT in transcapacitances
 Effective channel length for charges/capacitances Leff,C
 may differ from Leff used for IV
 Bias-dependent overlap charge/capacitance model
 Accounts for QME, PDE effects
 Inner fringing charge/capacitances
 MOS capacitor/varactor modeling
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
9
CV short-channel -- 120nm CMOS
C / Cox*Weff*Leff [-]
1.4
L = 120nm
1.2
1.0
0.8
CGG Vc=0V
EKV3.0
CGC Vc=0V
3,5E-11
EKV3.0
3,0E-11
CGC Vc=0.5V
EKV3.0
2,5E-11
CGC Vc=1V2,0E-11
EKV3.0
0.6
0.4
0.0
-1.5
CGG
EKV3.0
CGC
EKV3.0
CGB
EKV3.0
C [F]
0.2
C11n PMOS Short-Wide
1,5E-11
-1.0
-0.5
0.0
0.5
1.0
1.5
VG [V]
2.0
1,0E-11
2.5
5,0E-12
0,0E+00
-1,5
-1
-0,5
0
0,5
1
-VG [V]
 Normalized CV characteristics
 Shows correct modeling of overlap & inner fringing capacitance
 Short-Wide NMOS transistors, Ldrawn=120nm
 Normalization w.r.t. C’ox*Weff,C*Leff,C
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
10
1,5
Extensions of static effects (EKV3.0)
 Vertical/lateral non-uniform doping effects
 Polydepletion/quantum effects
 Vertical field mobility, based on effective field
 Velocity saturation/channel length modulation
 DIBL, charge-sharing
 RSCE, INWE, combined short&narrow-channel effects
 Halo/Pocket implant effects including @long channel
 Bias-dependent series resistance model
 Optional internal, bias-dependent, charge-based series resistance
 Avoids internal nodes -- increases efficiency
 Gate tunnelling
 Natural partitioning
 Geometry & temperature scaling
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
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Charge-based mobility modeling
 Effective-field based mobility
modeling
 Surface-roughness scattering
(high vertical field)
 Phonon-scattering intermediate
field strengths
 Coulomb scattering effects
(low vertical field; particularly at
very high Nsub, low T)
Eeff  Qb    Qi
 5 parameters in all:
 E0, E1, ETA, THC, ZC
 Local mobility is integrated
along the channel
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
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Integral mobility bias dependence
 Mobility versus VG, VD – EKV3.0 simulation
 Coulomb scattering (low Eeff), surface roughness scattering (high Eeff)
 Saturation behaviour is included naturally
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
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Velocity saturation/CLM modeling
 Consider a variable-order (1st-
2nd) velocity-field relationship
 Requires 2 parameters:
UCRIT, DELTA [1..2]
 New charge-based channel
length modulation (CLM)
model.
 Continuous at VD=VS
LAMBDA
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
14
EKV3.0 model parameter list (1/3)


Setup pars.


SIGN
TG


SCALE
QOFF
1 (nmos), -1 (pmos)
-1 (enhancement)
1 (depletion)
scaling factor L, W
charge model off
Oxide, Substrate and Gate Doping related
pars. (7)









COX
oxide capacitance
XJ junction depth
VTO
threshold voltage
PHIF
fermi-bulk voltage
GAMMA
body factor
GAMMAG
gate factor
N0
long channel slope
Quantum Mechanical effect (3)



AQMA
AQMI
ETAQM
QME accumulation
QME inversion
QME coefficient
Vertical Field Mobility effect (6)







transconductance fact.
1st order coefficient
2nd order coefficient
QB and QI balance
Coulomb sc. Par. 1
Coulomb sc. Par. 2
Mobility geometrical pars. (4)





KP
E0
E1
ETA
ZC
THC
LA
LB
KA
KB
char. mobility length A
char. mobility length B
char. mobility factor A
char. mobility factor B
Velocity Saturation & CLM (4)




UCRIT
DELTA
LAMBDA
ACLM
critical long. field
order of vsat model
CLM effect
pocket implant factor
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
15
EKV3.0 model parameter list (2/3)
 Long-channel
 LVT
 AVT
 LR
 QLR
 NLR
 INWE (3)
 WR
 QWR
 NWR
VTO corr. char. length
VTO corr. factor
RSCE char. length
RSCE factor charge
RSCE factor doping
 Halo-related gds degradation (5)
 FPROUT
 PDITS
 PDITSL
 PDITSD
 DDITS
INWE char. length
INWE factor charge
INWE factor doping
 Gate current pars. (3)
 XB
crit. difference potential
 EB
crit. electrical field
 KG
transc. factor Igate
VT & RSCE (5)
 Charge Sharing effect (5)
 LETA0
Long-ch. CS factor
 LETA
1st order CS factor
 LETA2
2nd order CS factor
 NCS
CS slope factor degr.
 WETA
Narrow-ch. CS factor
 DIBL effect (2)
 ETAD
char. length factor DIBL
 SIGMAD
bias factor DIBL
 Impact ionization (3)
 IBA
II current factor A
 IBB
II current factor B
 IBN
II current coefficient
 Overlap & fringing capacitance (6)
 GAMMAOV overlap body factor
 VFBOV
overlap flat-band voltage
 LOV
overlap length
 VOV
overlap bias factor
 KJF
inner fringing cap. par.
 CJF
inner fringing cap. factor
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
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EKV3.0 model parameter list (3/3)
 Geometrical pars. (10)
 DL
gate length offset
 DLC
gate length CV offset
 DW
gate width offset
 DWC
gate width CV offset
 LDW
short-ch. DW correct.
 WDL
narrow-ch. DL correct.
 LL
hyperbolic length fact.
 LLN
exp. Length fact.
 XL
 XW
 LIBB
length scaling IBB
 Width Scaling
 WE0
 WE1
 WUCRIT
 WLAMBDA
 WETAD
 WQLR
 WNLR
 WLR
 WIBB
pars. (9)
width scaling E0
width scaling E1
width scaling UCRIT
width scaling LAMBDA
width scaling ETAD
width scaling QLR
width scaling NLR
width scaling LR
width scaling IBB
 Temperature effects (12)
 TNOM
nominal temp.
 BEX
KP temp. coeff.
 TE0EX
E0 temp. coeff.
 TE1EX
E1 temp. coeff.
 TETA
ETA temp. factor
 UCEX
UCRIT temp. coeff.
 TLAMBDA
LAMBDA temp. fact.
 TCV
VTO temp. coeff.
 TCVL
short-ch. VTO temp.
coeff.
 TCVW
narrow-ch. VTO
temp. coeff.
 TCVWL
short-narr.-ch. VTO
temp. coeff.
 TIBB
IBB temp. factor
 NOTE: this list is subject to
modification
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
17
Parameter extraction
 Principle of EKV3.0 parameter extraction for CV and IV vs. L, W & Temp.
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
18
Short-channel characteristics
L = 70nm
L=70nm VD=1.5V
L=70nm VD=1.5V
8.0E-01
1.0E-02
6.0E-01
GM*UT/ID [-]
1.0E-04
1.0E-05
ID [A]
measured
EKV3.0
7.0E-01
1.0E-03
1.0E-06
1.0E-07
5.0E-01
4.0E-01
3.0E-01
2.0E-01
1.0E-08
measured
EKV3.0
1.0E-09
1.0E-01
0.0E+00
1.0E-10
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
1.00E-08
1.00E-07
VG [V]
1.00E-06
1.00E-05
1.00E-04
1.00E-03
1.00E-02
ID [A]
 Correct weak & moderate inversion behavior
 Smoothness and correct asymptotic behavior
 Correct weak inversion slope and DIBL modeling
 Transconductance-to-current ratio vs. drain current (log. axis)
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
19
VTO [a.u.]
ID,sat / (W/L) [-]
Scaling example 90nm CMOS
1.0E-08
1.0E-07
1.0E-06
1.0E-05
1.0E-08
1.0E-07
Lg [m]
1.0E-06
1.0E-05
Lg [m]
1.30
ID, lin / (W/L) [-]
1.28
1.26
n [-]
1.24
1.22
1.20
1.18
1.16
1.14
1.0E-08
1.0E-07
1.0E-06
Lg [m]
1.0E-05
1.0E-08
1.0E-07
1.0E-06
1.0E-05
Lg [m]
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
20
EKV3.0 output characteristics modeling
L = 70nm
L=70nm VB=-1V
L=70nm VB=0V
9.0E-03
8.0E-03
8.0E-03
measured
EKV3.0
7.0E-03
6.0E-03
6.0E-03
5.0E-03
5.0E-03
ID [A]
ID [A]
measured
EKV3.0
7.0E-03
4.0E-03
4.0E-03
3.0E-03
3.0E-03
2.0E-03
2.0E-03
1.0E-03
1.0E-03
0.0E+00
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
0.0E+00
1.8
0
0.2
0.4
0.6
0.8
VD [V]
1
1.2
1.4
1.6
1.8
VD [V]
L=70nm VB=-1V
L=70nm VB=0V
1.0E-01
1.0E-01
measured
EKV3.0
measured
EKV3.0
1.0E-02
gds [A/V]
gds [A/V]
1.0E-02
1.0E-03
1.0E-03
1.0E-04
1.0E-04
0
0.2
0.4
0.6
0.8
1
VD [V]
1.2
1.4
1.6
1.8
1.0E-05
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
VD [V]
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
21
NQS and noise extensions
 Non-quasistatic (NQS) model
 Requires coherent AC and large signal operation
 Short-channel thermal noise model
 Induced noise in gate and substrate
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
22
NQS model via channel segmentation
G
VD’(VD)
G
VD’(VD)
Channel Segmentation
S
D
S
D
B
B
 Non-quasistatic (NQS) model
 Approach via channel segmentation (similar to MM11)
 Requires appropriate handling of short-channel effects
 Need to ensure coherence among segmented and non-segmented
channel for DC aspects
 Ease of implementation in Verilog-A
 Number of segments is a parameter
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
23
NQS model @ RF
NMOS Lg=80nm (saturation)
NMOS Lg=2um (saturation)
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
24
Short-channel thermal noise – contains mobility
reduction, carrier heating, vel. sat., CLM effects
4
dsat
3
vd = VD / UT = 70
L = 0.18 m
Ec = 2 V/ m
(lc = 0.15)
q = 0.3, c = 30 nm
Scholten (IEDM99) L=0.17 m
Chen (TED02) L=0.18 m
no MRV, with CLM
2
with MRV, with CLM
1
with MRV, no CLM
0
5
10
15
20
25
no MRV, no CLM
30
35
40
45
vp = VP / UT
A.S. Roy, C.C. Enz, Int. Conf. MIXDES, June 2004
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
25
NQS noise -- induced gate & substrate noise
S n,i 2  S n,i 2  S n,i i*  4kT  Gnd
d
s
d s
S n,i 2  4kT  Gng
D
noiseless
In,D
g
G
B
In,B
In,G
In,S
S n,i 2  (n  1) 2  S n,i 2
b
g
S n,i i*  S n,i i*  4kT  Gngd
g d
g s
S
A.-S. Porret, C. C. Enz, IEE Proc. Circuits, Devices & Syst., 2004
 Channel thermal noise is the predominant noise source at high
frequencies
 Channel thermal noise is coupled to the gate and to the substrate at
high frequencies
 Previous modeling approaches usually do not cover moderate & weak
inversion, ignore coupling to the substrate
 The NQS modeling approach is consistently extended to model
induced gate/substrate noise in all operating regions
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
26
Harmonic distortion
0
Amplitude [dbm]
-10
-20
-30
VD=VG,
Fundamental
EKV3.0
2nd Harmonic
EKV3.0
3rd Harmonic
EKV3.0
VD
EKV3.0 harmonics at
RF – 0.14um CMOS
-40
-50
ID
VG
VB
VS
-60
-20dbm – 30MHz
-70
-80
-100
-0.1
f = 30MHz
M. Bucher e.a., IEEE ICECS, 2004
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
-0.9
-1
-1.1
-1.2
VG [V]
VD=VS
Harmonic Distortion vs. Input Power
NMOS 40*5um/0.14um VG=1V, VD=VS=0V @ F=1.0 GHz
-20
EKV3.0 shows correct
simulation of
3rd Harmonic slope
vs input power
[3dB/dB]
-40
ID
VG
VB
VS
Output Power dB
-90
-60
-80
F1 EKV3.0
F2 EKV3.0
F3 EKV3.0
-100
-120
-140
-40
-35
-30
-25
Input Power dB
-20
-15
-10
-- shows correct
symmetry&continuity
modeling
viz. P. Bendix e.a., CICC’2004
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
27
Large signal verification at RF (1/2)
Load Tuner
Source 50Ω
Freq=2.45GHz
S. Yoshitomi, MIXDES 2005
 Large-signal characterization: CMOS RF power amplifiers
 Load-pull simulation setup in ADS
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
28
Large signal verification at RF (2/2)
Measured
EKV3.0
Gain at 50Ω load vs Input power
24
S. Yoshitomi, MIXDES 2005
22
18
16
Pout
Gain [dB]
20
14
12
10
-40
-35
-30
-25
-20
-15
-10
-5
Input Power [dBm]
Lg=0.11um, Wf=5.2um, Nf=12
freq = 2.45 GHz
VGS=0.9V, VDS=1V
indep(Pdel_contours_p) (0.000 to 60.000)
IndexPoutdBm (1.000 to 234.000)
Gain range 3dB…8.5dB
Gain contour @ Pin = -6dBm
 Gain compression & Gain contour plots
 Courtesy of TOSHIBA, S. Yoshitomi (Mixdes2005)
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
29
EKV3.0 Summary
 EKV3.0: a design-oriented, charge-based, compact
model for Next Generation CMOS
 Validated on 120nm, 90nm CMOS, ongoing for 65nm CMOS
 Number of parameters:
 ~ 60 (basic intrinsic & overlap cap.)
 ~ 30 (geometry & scaling parameters)
 ~ 15 (temperature)
 Implementations:
 Verilog-A Beta-code is available to circuit simulator vendors -Simple license agreement needed
 ELDO (Mentor), ADS (Agilent), Spectre (Cadence), GoldenGate
(Xpedion)
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
30
Acknowledgments
 Antonios Bazigos, Eleni Kitonaki, NTUA
 For code R&D & support
 François Krummenacher,
Jean-Michel Sallese,
Christian Enz, Ananda Roy, EPFL
 For R&D contributions
 Wladek Grabinski
 For Web-site and Verilog-A support
 S. Yoshitomi, Toshiba
 J. Assenmacher, Infineon
 Both for financial support
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
31
EKV References (I)
 Website [admin. W. Grabinski]: http://legwww.epfl.ch/ekv
 A. S. Roy, C. C. Enz, “Compact Modeling of Thermal Noise in the MOS Transistor”,
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IEEE Trans. Electron Devices, Vol. 52, N° 4, pp. 611-614, April 2005.
J.-M. Sallese, F. Krummenacher, F. Pregaldiny, C. Lallement, A. Roy, C. Enz, „A
Design-Oriented Charge Based Current Model for Symmetric DG MOSFET and its
Correlation with the EKV Formalism”, Solid-State Electronics, Vol. 49, N° 2, pp. 485489, February 2005.
M. Bucher, A. Bazigos, N. Nastos, Y. Papananos, F. Krummenacher, S. Yoshitomi,
„Analysis of Harmonic Distortion in Deep Submicron CMOS“, 11th IEEE Int. Conf. On
Electronics, Circuits and Systems (ICECS 2004), pp. 395-398, Tel Aviv, Israel,
December 2004.
M. Bucher, C. Lallement, F. Krummenacher, C. Enz, “A MOS Transistor Model for
Mixed Analog-Digital IC Design”, (Book Chapter 3, 47 p.) in R. Reis and J. Jess
(Eds.), in Design of System on a Chip. Devices & Components. ISBN 1-4020-7928-1,
Kluwer Academic Publishers, 2004.
J.-M. Sallese, F. Krummenacher, P. Fazan, “Derivation of Shockley-Read-Hall
Recombination Rates in Bulk and PD SOI MOSFET’s Channels Valid in All Modes of
Operation, Solid State Electronics, Vol. 48, N° 9, pp. 1539-1548, September 2004.
A. Bazigos, M. Bucher, S. Yoshitomi, “Benchmarking the EKV3.0 MOSFET Model in
Verilog-A with 0.14µm CMOS, 11th Int. Conf. on Mixed Design (MIXDES 2004), pp.
104-109, Sczcecin, Poland, June 2004.
A. S. Roy, C. Enz, “Compact Modeling of Thermal Noise in the MOS Transistor”, 11th
Int. Conf. on Mixed Design (MIXDES 2004), pp. 71-78, Sczcecin, Poland, June 2004.
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
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EKV References (II)
 C. Enz, A. S. Roy, “A Comprehensive Study of Thermal Noise in the MOS Transistor”,
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SPIE Symp. on Fluctuation & Noise, Maspalomas, Spain, May 2004.
A.-S. Porret, C. C. Enz, “Non-Quasi-Static (NQS) Thermal Noise Modeling of the
MOS Transistor”, IEE Proc. Circuits, Devices and Syst., 2004.
______, SPIE Int. Symp. on Fluctuation and Noise, Santa Fe, USA, June 2003.
M. Bucher, D. Kazazis, F. Krummenacher, “Geometry- and Bias-Dependence of
Normalized Transconductances in Deep Submicron CMOS”, Workshop on Compact
Models, NANOTECH 2004, Boston, March 2004. [Available Online:
http://www.ntu.edu.sg/home/exzhou/WCM/WCM2004/wcm04.htm#Slides]
C. Lallement, J.-M. Sallese, M. Bucher, W. Grabinski, P. Fazan, "Accounting for
Quantum Effects and Polysilicon Depletion from Weak to Strong Inversion in a
Charge-Based Design-Oriented MOSFET Model", IEEE Trans. Electron Devices ,
Vol. 50, N° 2, pp. 406-417, February 2003.
J.-M. Sallese, M. Bucher, F. Krummenacher, P. Fazan, "Inversion Charge
Linearization in MOSFET Modeling and Rigorous Derivation of the EKV Compact
Model", Solid-State Electronics, Vol. 47, pp. 677-683, 2003.
M. Bucher, D. Kazazis, F. Krummenacher, D. Binkley, D. Foty, Y. Papananos,
“Analysis of Transconductances at All Levels of Inversion in Deep Submicron CMOS”,
9th IEEE Conf. on Electronics, Circuits and Systems (ICECS 2002), pp. 1183-1186,
Dubrovnik, Croatia, September 2002.
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
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EKV References (III)
 M. Bucher, C. Enz, F. Krummenacher, J.-M. Sallese, C. Lallement, A.-S. Porret, “The

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EKV3.0 Compact MOS Transistor Model: Accounting for Deep Submicron Aspects”,
Workshop on Compact Models-MSM 2002, pp. 670-673, Puerto Rico, April 2002.
C. Enz, “An MOS Transistor Model for RF IC Design Valid in All Regions of
Operation”, IEEE Trans. Microwave Theory and Tech., Vol. 50, N° 1, pp. 342-359,
January 2002.
A.-S. Porret, J.-M. Sallese, C. Enz, “A Compact Non Quasi-Static Extension of a
Charge-Based MOS Model”, IEEE Trans. Electron Devices, Vol. 48, N° 8, pp. 16471654, August 2001.
J.-M. Sallese, M. Bucher, C. Lallement, “Improved Analytical Modeling of Polysilicon
Depletion in MOSFETs for Circuit Simulation”, Solid-State Electronics, Vol. 44, N° 6,
pp. 905-912, June 2000.
J.-M. Sallese, A.-S. Porret, “A Novel Approach to Non-Quasi-Static Model of the MOS
Transistor Valid in All Modes of Operation”, Solid-State Electronics, Vol. 44, N° 6, pp.
887-894, June 2000.
C. Enz, Y. Cheng, “MOS Transistor Modeling for RF IC Design”, IEEE Trans. SolidState Circuits, Vol. 35, N° 2, pp 186-201, February 2000.
C. C. Enz, F. Krummenacher, E. A. Vittoz, “An analytical MOS Transistor Model Valid
in All Regions of Operation and Dedicated to Low-Voltage and Low-Current
Applications”, J. AICSP, Vol. 8, pp. 83-114, 1995.
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
34
Contact

Prof. Matthias Bucher
Technical University of Crete
Dept. of Electronics & Comp. Eng.
73100 Chania, Crete, Greece

phone: +30 28210 37210
fax:
+30 28210 37542
[email protected]
http://www.electronics.tuc.gr
M. Bucher TUC -- MOS-AK Meeting, September 16, 2005
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