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UNIVERSITI MALAYSIA PERLIS
Ujian 2 Semester 1
Sidang Akademik 2011/2012
23 Disember 2011
EKT 102 – Basic Electronic Engineering
Masa: 1 ½ Jam
This question paper has THREE questions. Answer all THREE questions.
[Kertas soalan ini mengandungi TIGA soalan. Jawab KETIGA-TIGA soalan ini.]
Name:_____________________________________________________
Matric No:_________________________________________________
Course Program:____________________________________________
Question 1
a) Sketch symbols for n-p-n and p-n-p transistor.
[2 marks]
________________________________________________________________________
b) A n-p-n Bipolar Junction Transistor, BJT can be used as a switching device. Explain
the condition when the base-emitter junction:
(i) Forward -biased
[1 mark]
(ii) Reverse - biased
[1 mark]
_______________________________________________________________________
c)
Draw collector characteristics curve and label the region.
[3 marks]
d)
A direct current bipolar junction transistor (BJT) circuit, as shown in Figure 1(a)
has the values of VCC = 15V, VBB = 5V, RC = 180Ω, RB = 3.9kΩ and βDC = 50.
Calculate the values of:
(i)
base current, IB
[1 mark]
(ii)
collector current, IC
[1 mark]
(iii)
emitter current, IE
[1 mark]
(iv)
collector-emitter voltage, VCE.
[2 marks]
(v)
collector-base voltage, VCB.
[2 marks]
Figure 1(a)
Question 2
a)
Briefly explain dc load line.
[2 marks]
________________________________________________________________________
b)
Figure 2(a) shows the stiff voltage-divider biased transistor circuit. Calculate the
following:
(i)
base voltage, 𝑉𝐵 .
[2 marks]
(ii)
collector current, 𝐼𝐶.
[2 marks]
(iii)
collector voltage, 𝑉𝐶.
[2 marks]
(iv)
collector-emitter voltage, 𝑉𝐶𝐸 .
[2 marks]
Figure 2 (a)
c)
Figure 2 (b) shows a dc biased transistor. Given that VCC = 20V, VBB = 10V,
RC = 330Ω, RB = 47 kΩ and βDC = 200. Answer the following questions:
(i)
Sketch the dc load line and label the parameter of IC(sat) and VCE (off)
at the x and y axis.
[3 marks]
(ii)
Determine Q-point from the dc load line for the circuit.
Figure 2(b)
[4 marks]
Question 3
a)
Briefly explain pinch – off voltage, Vp.
b)
The JFET in Figure 3(a) has values of VGS(off) =-8 V and IDSS=16 mA. Determine
the following values :
[2 marks]
(i)
gate to source voltage, VGS.
[1 mark]
(ii)
drain current, ID.
[2 marks]
Figure 3 (a)