Download 6.5 The Common Source Amp with Active Loads

5/4/2011
section 6_5 The Common Source Amp with Active Loads
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6.5 The Common Source
Amp with Active Loads
Reading Assignment: pp. 582-587
Amplifiers are frequently made as integrated circuits (e.g.,
op-amps).
Although both BJTs and MOSFET integrated circuit
amplifiers are implemented as ICs, we find that MOSFETs
amplifiers are almost exclusively implemented as integrated
circuits (i.e., rarely are MOSFET amps made of “discrete”
components).
Making integrated circuit amplifiers has many positives, but a
few negatives:
Positives:
Jim Stiles
The Univ. of Kansas
Dept. of EECS
5/4/2011
section 6_5 The Common Source Amp with Active Loads
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The amplifier circuit can be quite complex, yet still small and
inexpensive. Thus, current sources are “no big deal”.
Negatives:
We cannot make large capacitors (i.e., COUS), so that DC
blocking capacitors are not possible—this makes bias solutions
more complex, particularly for multi-stage amplifiers.
Additionally, it if difficult to make resistors in integrated
circuits. Instead, we use “resistors” constructed from
transistors—so-called “active loads”.
HO: Enhancement loads
HO: The Common Source Amp with an Active Load
The sensitivity problem of the previous circuit can be solved
using a current source as a “load”
HO: The Common Source Amp with a Current Source
Jim Stiles
The Univ. of Kansas
Dept. of EECS
5/4/2011
Enhancement Loads
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Enhancement Loads
Resistors take up far too much space on integrated circuit
substrates.
Therefore, we need to make a resistor out of a transistor!
Q: How can we do that!? After all, a resistor is a two terminal
device, whereas a transistor is a three terminal device.
A: We can make a two terminal device from a MOSFET by
connecting the gate and the drain!
i
+
+
v
v
-
Enhancement Load
i
-
Resistor Load
Q: How does this “enhancement load” resemble a resistor?
A: Consider the i-v curve for a resistor:
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Enhancement Loads
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i
i =
v
R
v
Now consider the same curve for an enhancement load.
Since the gate is tied to the drain, we find vG = vD , and thus
vGS = vDS . As a result, we find that vDS > vGS −Vt always.
Therefore, we find that if vGS > Vt , the MOSFET will be in
saturation (iD = K (vGS −Vt )2 ), whereas if vGS < Vt , the MOSFET
is in cutoff (iD = 0 ).
Since for enhancement load i = iD and v = vGS , we can describe
the enhancement load as:
⎧0
⎪⎪
i =⎨
⎪
2
K
v
V
−
(
)
⎪⎩
t
for v < Vt
for v > Vt
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Enhancement Loads
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Plotting this equation:
i
i = K (v −Vt )2
v
Vt
So, resistors and enhancement loads are far from exactly the
same, but:
1) They both have i = 0 when v = 0 .
2) They both have increasing current i with increasing
voltage v.
i
Resistor
Enhancement
Load
v
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Therefore, we can build a common source amplifier with either
a resistor, or in the case of an integrated circuit, an
enhancement load.
VDD
VDD
vO
vO
vI
vI
For the enhancement load amplifier, the load line is replaced
with a load curve (v = VDD − vDS )!
iD
ID ,VDS
vDS
VDD −Vt
And the transfer function of this circuit is:
VDD
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vO
Q in saturation
dvO
1
dv I
vI
Vt
Q: What is the small signal behavior of an enhancement load?
A: The enhancement load is made of a MOSFET device, and we
understand the small-signal behavior for a MOSFET!
Step 1 - DC Analysis
If V > Vt , then I = K (V −Vt )
2
+
or:
V =
I
+Vt
K
V
I
-
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Step 2 – Determine gm and ro
gm = 2K (VGS −Vt ) = 2K (V −Vt )
ro =
1
λID
=
1
=
λI
1
λK (V −Vt )
2
Step 3 – Determine the small-signal circuit
Inserting the MOSFET small-signal model, we get:
i = id
G
+
v =vgs
-
D
gm v gs
ro
S
Redrawing this circuit, we get:
i
G
D
+
v
-
gm v
S
ro
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Or, simplifying further, we have the small-signal equivalent
circuit for an enhancement load:
It is imperative that you understand that the circuit to
my right is the small-signal equivalent circuit for an
enhancement load.
Please replace all enhancement loads with this smallsignal model whenever you are attempting to find the
small-signal circuit of any MOSFET amplifier.
i
+
gm v
v
ro
-
Enhancement Load
Small-Signal Model
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The Common Source Amp
with Enhancement Load
VDD
Consider this NMOS amplifier
using an enhancement load.
Q2
* Note no resistors or
capacitors are present!
vO(t)
* This is a common source
Q1
amplifier.
* ID stability could be a
problem
vi(t)
+
_
VG
Q: What is the small-signal open-circuit voltage gain, input
resistance, and output resistance of this amplifier?
A: The values that we will determine when we follow precisely
the same steps as before!!
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The Common Source Amp with Enhancement Load
Step 1 – DC Analysis
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Note that:
The DC circuit of this amplifier is:
ID 1 = ID 2 ID
VDD
and that:
ID1
VGS 1 =VG − 0 =VG
Q2
and also that:
VO
VDS 2 = VGS 2
Q1
VG
and finally that:
ID2
VDS 1 =VDD −VDS 2
Let’s of course ASSUME that both Q1 and Q2 are in
saturation. Therefore we ENFORCE:
ID 1 = K1 (VGS 1 −Vt 1 )
2
= K1 (VG −Vt 1 )
2
Note that there are no unknowns in the previous equation. The
drain current is explicitly determined from K1 , VG , and Vt 1 !
Continuing with the ANALYSIS, we can find the drain current
through the enhancement load (ID2), since it is equal to the
current through Q1:
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The Common Source Amp with Enhancement Load
ID 2 = ID 1 = K1 (VG −Vt 1 )
2
Yet we also know that VGS2 must be related to this drain
current as:
ID 2 = K2 (VGS 2 −Vt 2 )
2
and therefore combining the above equations:
ID 1 = I D 2
K1 (VG −Vt 1 ) = K2 (VGS 2 −Vt 2 )
2
2
Note this last equation has only one unknown (VGS 2 ) !
Rearranging, we find that:
VGS 2 =
K1
(VG −Vt 1 ) +Vt 2
K2
Since VDS 2 = VGS 2 and VDS 1 =VDD −VDS 2 , we can likewise state
that:
VDS 2 =
K1
(VG −Vt 1 ) +Vt 2
K2
and:
VDS 1 =VDD −Vt 2 −
K1
(VG −Vt 1 )
K2
Now, we must CHECK to see if our assumption is correct.
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The Common Source Amp with Enhancement Load
The saturation assumption will be correct if:
VDS 1 >VGS 1 −Vt 1
>VG −Vt 1
and:
VGS 1 >Vt 1
∴ if VG >Vt 1
Step 2 – Calculate small-signal parameters
We require the small-signal parameters for each of the
transistors Q1 and Q2. Therefore:
gm 1 = 2K1 (VG −Vt 1 )
and:
ro 1 =
1
λ1 ID
and
and
gm 2 = 2K1 (VGS 2 −Vt 2 )
ro 2 =
1
λ2 ID
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The Common Source Amp with Enhancement Load
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Step 3 – Determine the small-signal circuit
First, let’s turn off the DC sources:
Q2
vO(t)
Q1
vi(t)
+
_
We now replace MOSFET Q1 with its equivalent small-signal
model, and replace the enhancement load with its equivalent
small-signal model.
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G2
+
ro 2
vgs2
gm 2 v gs 2
-
S2
id
G1
D1
+
vi
vgs1
+
-
-
vo
ro 1
gm v gs 1
S1
Note S1 and G2 are at small-signal ground!
Therefore, we can rewrite this circuit as:
id
G1
+
vi
+
-
vgs1
-
gm v gs 1
S1
ro 1
D1
S2
gm 2v gs 2
G2
-
vgs2
+
vo
ro 2
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Simplifying further, we find:
-
+
vi
+
-
vo
vgs1
(g
-
m1
Therefore, we find that:
and that:
v gs 1 − gm 2 v gs 2 )
vgs2
+
v gs 1 = vi
v gs 2 = −vo
as well as that:
vo = −(gm 1 v gs 1 − gm 2 v gs 2 ) (ro 1 ro 2 )
= −(gm 1 vi + gm 2 vo ) (ro 1 ro 2 )
Rearranging, we find:
Avo =
But recall that:
−(ro 1 ro 2 )gm 1
− gm 1
vo
=
≈
vi 1 + (ro 1 ro 2 )gm 2
gm 2
gm = 2K (VGS −Vt )
= 2 K ID
where we have used the fact that ID = K (VGS −Vt ) to
2
determine that (VGS −Vt ) = ID K .
ro 1 ro 2
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The Common Source Amp with Enhancement Load
Therefore:
Avo =
− gm 1
gm 2
=
2 K 1 ID
2 K2
K1
=
=
K2
ID
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(W L )
(W L )
1
2
In other words, we adjust the MOSFET channel geometry to
set the small-signal gain of this amplifier!
Now let’s determine the small-signal input and output
resistances of this amplifier!
ii
-
+
vi
+
_
vgs1
(g
-
m1
v gs 1 − gm 2 v gs 2 )
vgs2
vooc
ro 1 ro 2
+
It is evident that since ii = i g = 0 :
Ri =
vi
=∞
ii
(Great!!!)
Now for the output resistance, we know that the open-circuit
output voltage is:
vooc = −(gm 1 v gs 1 − gm 2 v gs 2 ) (ro 1 ro 2 )
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iosc
ii
vi
+
-
-
+
vgs
-
(g
m1
v gs 1 − gm 2 v gs 2 )
vgs2
ro 1 ro 2
+
Likewise, the short-circuit output current iosc is:
ios = −(gm 1 v gs 1 − gm 2 v gs 2 )
Thus, the small-signal output resistance of this amplifier is
equal to:
vooc −(gm 1 v gs 1 − gm 2 v gs 2 ) (ro 1 ro 2 )
= (ro 1 ro 2 )
Ro = sc =
−(gm 1 v gs 1 − gm 2 v gs 2 )
io
The input resistance and open-circuit voltage gain
of this common source amplifier are good, but the
output resistance stinks!!
Smells like a common emitter amplifier!
(Doh!!!)
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The Common Source Amp with current source
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The Common Source Amp
with a Current Source
VDD
Now consider this NMOS
amplifier using a current source.
I
* Note no resistors or
vO(t)
capacitors are present!
Q1
* This is a common source
amplifier.
+
_
vi(t)
* ID stability is not a
VG
problem!
Q: I don’t understand! Wouldn’t the small-signal circuit be:
vo(t) =???
Q1
vi(t)
+
_
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A: Remember, every real current source (as with every
voltage source) has a source resistance ro . A more accurate
current source model is therefore:
ro
I
Ideally, ro = ∞ . However, for good current sources, this
output resistance is large (e.g., ro = 100 KΩ ). Thus, we mostly
ignore this value (i.e., approximate it as ro = ∞ ), but there
are some circuits where this resistance makes quite a
difference.
VDD
This is one of those circuits!
ro
I
Therefore, a more accurate
amplifier circuit schematic is:
vO(t)
Q1
vi(t)
VG
+
_
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And so the small-signal circuit becomes the familiar:
ro
vo(t)
Q1
vi(t)
+
-
Therefore, with the hybrid-pi model:
id
G1
D1
+
vi
+
-
vgs1
-
vo
gm v gs 1
ro 1
ro
S1
Q: But, we implement a current source using a current
mirror. What is the output resistance ro of a current mirror?
A: Implementing a PMOS current mirror, we find that our
amplifier circuit:
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VDD
I
vO(t)
Q1
+
_
vi(t)
VG
is specifically:
VSS
-
Q3
-
VGS3
+
+
VSS
VGS2
Q2
vO(t)
Iref
Q4
Q1
vi (t)
VG
+
_
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The Common Source Amp with current source
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Q: Yikes! Where did all those transistors come from? What
is it that they do?
A: Transistors Q2, Q3, and Q4 form the current mirror that
acts as the current source. Note that transistor Q4 is an
enhancement load—it acts as the resistor in the current
mirror circuit.
Note this amplifier circuit is entirely made of NMOS and
PMOS transistors—we can “easily” implement this amplifier as
an integrated circuit!
Q: So again, what is the source resistance ro of this current
source?
A: Let’s determine the small-signal circuit for this
integrated circuit amplifier and find out!
Q: But there are four (count em’) transistors in this circuit,
determining the small-signal circuit must take forever!
A: Actually no.
The important thing to realize when analyzing this circuit is
that the gate-to-source voltage for transistors Q2, Q3, and
Q4 are DC values!
Q: ??
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A: In other words, the small signal voltages v gs for each
transistor are equal to zero:
v gs 2 = v gs 3 = v gs 4 = 0
Q: But doesn’t the small-signal source vi (t ) create small-
signal voltages and currents throughout the amplifier?
A: For some of the circuit yes, but for most of the circuit no!
Note that for transistor Q1 there will be small-signal voltages
v gs 1(t ) and vds 1(t ) , along with id 1(t ) . Likewise for transistor
Q2, a small-signal voltage vds 2(t ) and current id 2(t ) will occur.
VSS
−VSS
−
VGS 3 +0
−
VDS 3 +0 Q3
VGS 2 +0
+
+
−
Q2
+
VDS 2 +vds 2
+
Iref +id
+
Iref +0
+
+
+
Q4 V +0
DS 4
−
VGS 4 +0
−
vi (t)
+
_
Q1 VDS 1 +vds 1
−
VGS 1 +v gs 1
−
VG
vO(t)
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But, for the remainder of the voltages and currents in this
circuit (e.g., VDS 4 , VGS 2 , ID 3 ), the small-signal component is
zero!
Q: But wait! How can there be a small-signal drain current
id 2(t ) through transistor Q2 , without a corresponding smallsignal gate-to-source voltage v gs 2(t ) ?
A: Transistor Q2, is the important device in this analysis.
Note its gate-to-source voltage is a DC value (no small-signal
component!), yet there must be (by KCL) a small-signal drain
current id 2(t ) !
This is a case where we must consider the MOSFET output
resistance ro 2 . The small-signal drain current for a PMOS
device is:
id 2 = gm 2 v gs 2 −
vds 2
ro 2
Since v gs 2 =0 , this equation simplifies to:
v
id 2 = − ds 2
ro 2
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Equivalently, the small-signal PMOS model is:
S2
-
-
vgs2
gm v gs
+
G2
ro 2
vds2
+
D2
Thus for v gs 2 =0 , the small-signal model becomes:
S2
-
-
G2
ro 2
vds2
vgs2 =0
+
+
D2
Or, simplifying further:
id
S2
-
ro 2
vds2
+
D2
v
id 2 = − ds 2
ro 2
id
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Thus, the small-signal model of the entire current mirror is
simply the output resistance of the MOSFET Q2 !
ro 2
vo(t)
Q1
vi (t)
+
-
Comparing this to the earlier analysis--with a current source
of output resistance ro :
ro
vo(t)
Q1
vi(t)
+
-
It is evident that the output resistance of the current mirror
is simply equal to the output resistance of MOSFET Q2 !!!!
ro = ro 2
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And so this circuit:
VSS
VSS
Q2
Q3
vO(t)
Iref
Q4
Q1
+
_
vi (t)
VG
VDD
is equivalent to this circuit:
Iref
ro 2 =
vO(t)
Q1
vi(t)
VG
+
_
1
λ Iref
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The resulting small-signal circuit of this amp is:
vo
+
vi
+
-
vgs1
gm 1 v gs 1
-
ro 1 ro 2
And so the open-circuit voltage gain is:
Avo = − gm 1 ( ro 1 ro 2 ) = 2 K1 Iref ( ro 1 ro 2 )
Note this result is far different (i.e., larger) than the result
when using the enhancement load for RD:
Avo = −
K1
K2
However, we find that the output and input resistances of
this amplifier are the same as with the enhancement load:
Ri = ∞
Ro = ro 1 ro 2