Download MMP3415AE - M-MOS Semiconductor

MMP3415AE
Data Sheet
M-MOS Semiconductor Hong Kong Limited
20V P-Channel Enhancement-Mode MOSFET
VDS= -20V
ESD Protected Gate: 2kV
RDS(ON), [email protected], Ids@-2A = 90mΩ
RDS(ON), [email protected], Ids@-4A = 63mΩ
RDS(ON), [email protected], Ids@-4A = 55mΩ
Features
Advanced trench process technology
High Density Cell Design For Ultra Low On-Resistance
SOT-23
Internal Schematic Diagram
Top View
P-Channel MOSFET
Maximum Ratings and Thermal Characteristics (TA = 25oC unless otherwise noted)
Parameter
Symbol
Limit
Drain-Source Voltage
VDS
-20
Gate-Source Voltage
VGS
±8
ID
-4
IDM
-30
Continuous Drain Current
Pulsed Drain Current
1)
Maximum Power Dissipation
TA = 25oC
PD
o
TA = 75 C
Operating Junction and Storage Temperature Range
Junction-to-Ambient Thermal Resistance (PCB mounted)
2)
Unit
V
A
1.4
W
0.9
TJ, Tstg
-55 to 150
RqJA
140
o
o
C
C/W
Note: 1. Repetitive Rating: Pulse width limited by the maximum junction temperature
2. Repetitive Rating: Pulse width limited by the maximum junction temperature
3. 1-in2
2oz Cu PCB board
V 1.4
1
www.m-mos.com
MMP3415AE
Data Sheet
P-Channel Enhancement-Mode MOSFET
ELECTRICAL CHARACTERISTICS
Parameter
Test Condition
Symbol
Min
Typ
Max
Unit
Static
Drain-Source Breakdown Voltage
BVDSS
VGS = 0V, ID = -250uA
Drain-Source On-State Resistance
RDS(on)
VGS = -1.8V, ID = -2A
63.0
90.0
Drain-Source On-State Resistance
RDS(on)
VGS = -2.5V, ID = -4A
51.0
63.0
Drain-Source On-State Resistance
RDS(on)
VGS = -4.5V, ID = -4A
44.0
55.0
Gate Threshold Voltage
VGS(th)
VDS =VGS, ID = -250uA
-0.6
-1
V
Zero Gate Voltage Drain Current
IDSS
VDS = -16V, VGS = 0V
-1
uA
Gate Body Leakage
IGSS
VGS = ± 8V, VDS = 0V
±10
uA
-20
-0.4
V
mW
3)
Dynamic
Total Gate Charge
Qg
10.8
VDS =-10V, ID = -4.2A
VGS = -4.5V
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
2.41
Turn-On Delay Time
td(on)
48.8
Turn-On Rise Time
tr
Turn-Off Delay Time
td(off)
Turn-Off Fall Time
tf
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
VDD = -10V, RL = 10Ω
ID = -1A, VGEN = -4.5V
RG = 2.8Ω
nC
2.46
95.5
ns
680
257
1310
VDS = 1V, VGS = 0V
f = 1.0 MHz
pF
333
277
Source-Drain Diode
Max. Diode Forward Current
Diode Forward Voltage
IS
VSD
IS = -1A, VGS = 0V
0.686
-2.2
A
-1
V
Note: Pulse test: pulse width <= 300us, duty cycle<= 2%
3. Guaranteed by design; not subject to production testing
V 1.4
2
www.m-mos.com
Disclaimer Notice
Notice
1. Specification of the products displayed herein are subject to change without notice. Continuous
development may necessitate changes in technical data without notice. M-MOS Semiconductor Sdn.
Bhd. or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
2. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. These are stress ratings only, and functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
V 1.4
3
www.m-mos.com