Download MC74LVXT4051DTR2中文资料

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MC74LVXT4051DTR2 中文资料
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MC74LVXT4051Analog Multiplexer/Demultiplexer
High?Performance Silicon?Gate CMOS
The MC74LVXT4051 utilizes silicon?gate CMOS technology toachieve fast propagation
delays,
low
ON
resistances,
and
low
leakagecurrents.
This
analog
multiplexer/demultiplexer controls analogvoltages that may vary across the complete
power supply range (fromVCC to VEE).
The LVXT4051 is similar in pinout to the LVX8051, the HC4051A,and the metal?gate
MC14051B. The Channel?Select inputs determinewhich one of the Analog Inputs/Outputs
is to be connected, by meansof an analog switch, to the Common Output/Input. When
the Enablepin is HIGH, all analog switches are turned off.
The Channel?Select and Enable inputs are compatible with standardTTL levels. These
inputs are over?voltage tolerant (OVT) for leveltranslation from 6.0 V down to 3.0
V.
This device has been designed so the ON resistance (RON) is morelinear over input
voltage than the RONhttp://doc.guandang.net/b16eb6f18cc25f21c62647038.html of
metal?gate CMOS analogswitches and High?Speed CMOS analog switches.
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Features
http://onsemi.com
MARKINGDIAGRAMS
16
SOIC?16D SUFFIXCASE 751B
1
LVXT4051AWLYWW
16
TSSOP?16DT SUFFIXCASE 948F
1
LVXT4051ALYW
??????
Select Pins Compatible with TTL LevelsFast Switching and Propagation SpeedsLow
Crosstalk Between Switches
Analog Power Supply Range (VCC ? VEE) = *3.0 V to )3.0 VDigital (Control) Power Supply
Range (VCC ? GND) = 2.5 to 6.0 VImproved Linearity and Lower ON Resistance Than
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Metal?Gate,HSL, or VHC CounterpartsLow Noise
SOEIAJ?16M SUFFIXCASE 966
1LVXT4051ALYW
?
?Designed to Operate on a Single Supply with VEE = GND, or Using??
Split Supplies up to $3.0 VBreak?Before?Make CircuitryPb?Free Packages are
Available*
A
WL or LY
WW
or
W====Ahttp://doc.guandang.net/b16eb6f18cc25f21c62647038.htmlssembly
LocationWafer LotYear
Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the packagedimensions section on
page 2 of this data sheet.
*For additional information on our Pb?Free strategy and soldering details,
pleasedownload the ON Semiconductor Soldering and Mounting Techniques
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Reference Manual, SOLDERRM/D.
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MC74LVXT4051
FUNCTION TABLE
VCC16
X215
X114
X013
X312
A11
B10
C9
Control InputsEnableLLLLLLLLHX = Don’t Care
CLLLLHHHHX
SelectBALLHHLLHHX
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LHLHLHLHX
ON Channels
X0X1X2X3X4X5X6X7NONE
1X42X63X4X7
5678X5EnableVEEGND
Figure 1. Pin Connection and Marking Diagram
(Top View)
ANALOG
INPUTS/OUTPUTS
X
COMMONOUTPUT/INPUhttp://doc.guandang.net/b16eb6f18cc25f21c62647038.htmlT
CHANNELSELECT INPUTS
CCEE
Figure 2. Logic Diagram
Single?Pole, 8?Position Plus Common Off
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ORDERING INFORMATION
Specifications Brochure, BRD8011/D.*This package is inherently Pb?Free.
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MC74LVXT4051
values (not normal operating conditions) and are not valid simultaneously. If these
limits are exceeded, device functional operation is not implied,damage may occur and
reliability
may
be
affected.1.Tested
to
EIA/JESD22?A114?A.2.Tested
EIA/JESD22?A115?A.3.Tested to JESD22?C101?A.4.Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
NORMALIZED FAILURE RATE
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
100
TIME, YEARS
11
10
1000
to
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Figure 3. Failure Rate vs. Time Junction Temperature
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MC74LVXT405http://doc.guandang.net/b16eb6f18cc25f21c62647038.html1
DC CHARACTERISTICS ? Digital Section (Voltages Referenced to GND)
DC ELECTRICAL CHARACTERISTICS ? Analog Section
AC CHARACTERISTICS (Input t = t = 3 ns)
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MC74LVXT4051
AC CHARACTERISTICS (C
= 50 pF, Input t = t = 3 ns)
DPDCCCCCCADDITIONAL APPLICATION CHARACTERISTICS (GND = 0 V)
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MC74LVXT4051
Figure 4. On Resistance, Test Set?Up
VVVN/C
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Figure 5. Maximum Off Channel Leakage Current,
Any One Channel, Test Set?UpFigure 6. Maximum On Channel Leakage Current,
Channel to Channel, Test Set?Up
Figure 7. Maximum On Channel Bandwidth, Test Set?Up
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MC74LVXT4051
Config = NetworkFormat = T/R (dB)CAL = Trans Cal
VISO(dB) = 20 log (VT1/VR1)
Display
=
Rectan
X*A)BScale
Ref
=
Auto
ScaleView
=
Off,
Off,
Ofhttp://doc.guandang.net/b16eb6f18cc25f21c62647038.htmlfTrig = Cont Mode
Source Amplitude = )13 dBReference Attenuation = 20 dBTest Attenuation = 0 dB
Figure 8. Maximum Off Channel Feedthrough Isolation, Test Set?Up
Format = T/R (dB)CAL = Trans Cal
Display = Rectan X*A)BScale Ref = Auto ScaleView = Off, Off, OffTrig = Cont Mode
Source Amplitude = )13 dBReference Attenuation = 20 dBTest Attenuation = 0 dB
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VISOC(dB) = 20 log (VT1/VR1)
Figure 9. Maximum Common?Channel Feedthrough Isolation, Test Set?Up
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MC74LVXT4051
VIN
VOUT
OUT
Figure 10. Charge Injection, Test Set?Up
Format = T/R (dB)CAL = Trans Cal
Display = Rectan X*A)BScale Ref = Auto ScaleView = Off, Off, OffTrig = Cont Mode
Source Amplitude = )13 dBReference Attenuation = 20 dBTest Attenuation = 20 dB
VONL(dB) = 20 log (VT1/VR1)
Figure
11.
Maximum
On
Chahttp://doc.guandang.net/b16eb6f18cc25f21c62647038.htmlnnel Feedthrough On Loss,
Test Set?Up
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MC74LVXT4051
CC
Figure 12. Break?Before?Make, Test Set?UpFigure 13. Break?Before?Make Time
TEST
POINT
*
PZHPZLWTEST
POINTL*
Figure 16. Propagation Delays, Enable to
Analog OutFigure 17. Propagation Delay, Test Set?Up
Enable to Analog Out
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MC74LVXT4051
Figure 18. Power Dissipation Capacitance, Test Set?Up
Figure 19. Total Harmonic Distortion, Test Set?Up
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MC74LVXT4051
APPLICATIONS INFORMATION
The Channel Select and Enable control pins should be atVCC or GND logic levels. VCC
being recognized as a logichigh and GND being recognized as a logic low. In
thisexample:
VCC = )5 V = logic highGND = 0 V = logic low
The
maximum
analog
voltage
swing
http://doc.guandang.net/b16eb6f18cc25f21c62647038.htmldetermined
by
is
thesupply
voltages VCC and VEE. The positive peak analogvoltage should not exceed VCC. Similarly,
the negative peakanalog voltage should not go below VEE. In this example,the
difference between VCC and VEE is five volts. Therefore,using the configuration of
Figure 21, a maximum analogsignal of five volts peak?to?peak can be controlled.
Unusedanalog inputs/outputs may be left floating (i.e., notconnected). However,
tying unused analog inputs and
)3.0 V*3.0 V
3.0 V*3.0 V
outputs to VCC or GND through a low value resistor helpsminimize crosstalk and
feedthrough noise that may bepicked up by an unused switch.
Although used here, balanced supplies are not arequirement. The only constraints on
the power supplies arethat:
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VEE ? GND = 0 to *6 voltsVCC ? GND = 2.5 to 6 voltsVCC ? VEE = 2.5 to 6 volts
and VEE v GND
When
voltage
transients
above
VCC
and/or
below
ahttp://doc.guandang.net/b16eb6f18cc25f21c62647038.htmlreanticipated
on
VEE
the
analog channels, external Germanium orSchottky diodes (Dx) are recommended as shown
inFigure22. These diodes should be able to absorb themaximum anticipated current
surges during clipping.
)5 VGND
)5 VGND
*
Figure 20. Application ExampleFigure 21. Application Example
Figure 22. External Germanium or Schottky Clipping Diodes
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MC74LVXT4051
A
X0
X1
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B
X2
X3
C
X4
X5
ENABLE
X6
X7
X
Figure 23. Function Diagram, LVXT4051
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MC74LVXT4051
PACKAGE DIMENSIONS
SOIC?16D SUFFIXCASE 751B?05
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ISSUE J
NOTES:
1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.
2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDEMOLD
PRhttp://doc.guandang.net/b16eb6f18cc25f21c62647038.htmlOTRUSION.
4.MAXIMUM MOLD PROTRUSION 0.15 (0.006)PER SIDE.
5.DIMENSION D DOES NOT INCLUDE DAMBARPROTRUSION.
ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTALIN EXCESS OF THE D DIMENSION ATMAXIMUM MATERIAL
CONDITION.
0.25 (0.010)TB
A
TSSOP?16DT SUFFIXCASE 948F?01ISSUE A
16X
REFK
NOTES:
1.DIMENSIONING AND TOLERANCING PERANSI Y14.5M, 1982.
2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLDFLASH.
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PROTRUSIONS OR GATE BURRS.MOLD FLASH OR GATE BURRS SHALL NOTEXCEED 0.15 (0.006) PER
SIDE.
4.DIMENSION B DOES NOT INCLUDEINTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALLNOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K
DOES NOT INCLUDEDAMBAR PROTRUSION. ALLOWABLEDAMBAR PROTRUSION SHALL BE 0.08(0.003)
TOTAL IN EXCESS OF THE KDIMENSION AT MAXIMUM MATERIALCONDITION.
6.TERMINAL
NUMBERS
Ahttp://doc.guandang.net/b16eb6f18cc25f21c62647038.htmlRE
SHOWN FORREFERENCE ONLY.
7.DIMENSION A AND B ARE TO BEDETERMINED AT DATUM PLANE ?W?.
MILLIMETERS4.905.104.304.50???1.200.050.150.65
BSC0.180.280.090.200.090.160.190.256.40 BSC0
8
INCHES
0.1930.2000.1690.177???0.0470.0020.0060.026
BSC0.0070.0110.0040.0080.0040.0060.0070.0100.252 BSC0
8
ABCDGHJJ1K1LM
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MC74LVXT4051
SOEIAJ?16M SUFFIXCASE 966?01ISSUE O
ON Semiconductor and
Industries, LLC (SCILLC).
notice
are registered trademarks of Semiconductor Components
SCILLC reserves the right to make changes without further
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to any products herein.
SCILLC makes no warranty, representation or guarantee
regarding the suitability of its products for any particular purpose, nor does SCILLC
assume any liabilityarising out of the application or use of any product or circuit,
and
specifically
disclaims
any
and
all
liability,
including
withouthttp://doc.guandang.net/b16eb6f18cc25f21c62647038.html limitation special,
consequential or incidental damages.“Typical” parameters which may be provided in
SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time.
Alloperating parameters, including
“Typicals” must be validated for each customer application by customer’s technical
experts.
SCILLC does not convey any license under its patent rightsnor the rights
of others.
SCILLC products are not designed, intended, or authorized for use as
components in systems intended for surgical implant into the body, or other
applicationsintended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or
death may occur.
ShouldBuyer purchase or use SCILLC products for any such unintended
or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers,
employees,
subsihttp://doc.guandang.net/b16eb6f18cc25f21c62647038.htmldiaries,
affiliates,and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any
claim of personal injury or deathassociated with such unintended or unauthorized use,
even if such claim alleges that SCILLC was negligent regarding the design or
manufacture of the part.
SCILLC is an EqualOpportunity/Affirmative Action Employer.
This literature is subject to all applicable copyright laws and is not for resale
in any manner.
PUBLICATION ORDERING INFORMATION
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