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Transcript
REPETITIVE SHORT CIRCUIT BEHAVIOUR OF TRENCH-/FIELD-STOP IGBTS
B. Gutsmann1, P. Kanschat1, M. Münzer1, M. Pfaffenlehner2, T. Laska2
1
eupec GmbH, Max-Planck-Straße 5, D 59581 Warstein, Germany
Infineon-Technologies AG, Balanstraße 59, D-81541 Munich, Germany
Abstract: This paper has a focus on the shortcircuit robustness of eupec modules with
1200V 3rd generation IGBT chip from Infineon.
Short-circuit failure modes are described and
measures with regard to an optimised and
robust chip structure are presented.
Measurements of repetitive short-circuit
pulses based on the Trench/Field-Stop IGBT 3
show that the typical number of short circuit
pulses
until
destruction
depends
exponentially
on
the
maximum
chip
temperature reached within the pulse.
1st gen.
2nd gen.
3rd gen.
4th gen.
4
3,5
V CEsa t (125°C) [V] @ 75A
2
A=1
3
A = 0,65
2,5
2
A = 0,44
1,5
A = 0,32?
1
1988
For traditional 600V, 1200V and 1700V
applications in the industrial drives segment an
essential demand for short circuit capability of
IGBTs exists. Among others this is one reason
why the robust “Non Punch Through” IGBT
technology with homogeneous base material
dominated the original “Punch Through” concept
based on Epitaxial technology. In the last two
years a tendency towards a new vertical structure
called “Field Stop” IGBT [1,2] can be observed,
which is also known as “Soft Punch Through” [3]
or “Light Punch Through” [4].
Because of economic reasons there is a strong
demand for smaller chips. Figure 1 demonstrates
the shrink of the IGBT chip size and the thickness
over the last 15 years. For the 4th generation
IGBT a further chip volume reduction can be
expected as indicated in figure 1a. As a
consequence of smaller chip sizes current
densities are increased not only under nominal
but also in short circuit condition. This results in a
strong increase of power dissipation density in
combination with smaller silicon heat capacity. It
becomes obvious that short circuit robustness is
a general challenge in the development process
of modern IGBT technologies. Therefore it is no
surprise, that many publications in the last years
have already dealt in detail with the short circuit
behaviour and specific physical device aspects
1990
1992
1994
1996
1998
2000
2002
2004
2006
2008
a.
300
600V
280
260
1200V
240
220
Chip thickness / µm
INTRODUCTION
1700V
200
180
160
140
120
100
80
60
40
NPT
20
0
1988
1990
1992
1994
FS
1996
1998
2000
2002
2004
2006
2008
b.
Figure 1: a. Chip shrink of a 75A/1200V-IGBT, b.
Decrease of chip thickness for NPT and Field-Stop
IGBTs; past and forecast
[5][6]. A recent publication by Otsuki et. al. [2]
has even reported about critical short-circuit
properties of the above mentioned new vertical
structures.
In the first part of this paper different failure
modes of an IGBT under short-circuit conditions
are described and it is explained in short how
these failures in the new vertical structure were
avoided in Infineons latest 3rd generation IGBT 3
with an optimised Trench-cell and Field-Stop
design.
In many industrial applications it is important not
only to get experience about the robustness in
case of just one short circuit event, but also about
the number of short-circuit pulses a modern chip
will withstand until its destruction. Therefore the
second part of this paper will investigate the
reliability of the IGBT chip based on the Trench
and Field-Stop concept under repetitive short
circuit conditions at various operation conditions.
FAILURE MODES AND OPTIMISED CHIP DESIGN
As is demonstrated in detail in [7] three failure
modes can be observed during a typical 10µs
short-circuit pulse:
1. Chip
destruction
many
hundred
microseconds after a successful shortcircuit turn-off.
2. Chip destruction during short-circuit turnoff.
3. So called “Short-circuit destruction mode”
appearing during the short circuit pulse
itself.
By experiment it is found that failure modes 1 and
2 depend on the dissipated power during the
short-circuit pulse. The third destruction mode is
still under investigation. This failure occurs just
after few microseconds in the short circuit pulse
at moderate d.c.-link voltages and operation
temperatures, but at high current densities. This
mode seems to be independent of the dissipated
power.
generation is distributed more homogenous
because of the trapezoidal electric field
distribution and so temperature distribution is
more homogeneous. Both effects, short circuit
current limitation and trapezoidal field distribution,
lead to a smaller temperature rise in the
Trench/Field-Stop device despite smaller chip
size, thickness and higher current densities.
These statements are confirmed by simulation in
[7]. A third helpful aspect concerning failure mode
1 and 2 is the design of a latch-up free cell
geometry, which was realized by the introduction
of a highly conductive p well near the chip emitter
[7].
The investigation of the third failure mode
appearing during the short circuit pulse and its
physical mechanism is still ongoing. Experiments
have shown that main parameters that influence
the destruction condition are the doping profile of
the Field-Stop layer and the backside emitter as
well as the chip thickness. Especially the carrier
concentration gradient in the neutral region near
the backside emitter seems to influence this
failure mode. Although the physics have not been
fully understood, the phenomenological analysis
lead to a short circuit rugged IGBT 3.
REPETITIVE SHORT CIRCUIT BEHAVIOUR
To investigate the robustness of the
Trench/Field-Stop IGBT 3 chip two types of
power modules for high and medium power
applications which are based on this chip
technology have been analysed (figure 2). Each
of these power modules contains the biggest
available 150A IGBT 3 chip which is arranged in
parallel to realize nominal currents up to 3600A
corresponding to short-circuit currents rated
approximately 5 times the nominal current. The
objective of these experiments is to answer the
To handle the problems of over-temperature in
failure mode 1 and 2 the cell structure of
Infineons Trench/Field-Stop-IGBTs was efficiently
optimised with regard to moderate short circuit
current levels of about five times of the rated
current. Furthermore compared to the NPT (“Non
Punch Through”) chip design
the IGBT 3 has a more
a.
b.
homogeneous distribution of
heat generation inside the chip.
This is due to the triangular
electric field distribution in the
vertical chip direction of the NPT
concept where most of the heat
is generated near the pn
junction. As a consequence of
this, in short circuit condition
temperature distribution in the
chip is inhomogeneous with a
Figure 2: eupec IGBT Power Modules for (a) High Power
(1200V/3600A) and (b) Medium Power (1200V/600A) applications
maximum at the pn junction. In
the Trench/Field-Stop concept
electric
field
and
heat
Rp
60.000
900V active
Vcc
Rg
clamping
Ic
Vg
Number of short circuit cycles
Lp
Tc = 125 °C
50.000
Tc = 25 °C
40.000
30.000
20.000
10.000
0
1
20V Vge-clamping
Figure 3: Circuit for repetitive short-circuit analysis
(Lp and Rp: parasitic elements)
following questions:
1. How many repetitive short-circuit pulses
under different operation conditions does a
power module withstand until destruction
of chip or module interconnects ?
2. Are there any aging effects observable ?
3. Is it possible to recognize any dependence
on the operation conditions ?
Figure 3 shows the electrical circuit with parasitic
elements for the repetitive short-circuit analysis.
For the measurements an active clamping with
zener diodes rated 900V and a gate-emitter
clamping at 20V is included. In the IGBT High
Power module 24 and in the IGBT Medium
Power module 4 IGBT chips are arranged in
parallel to realize the output power.
A typical short-circuit switching pulse at nominal
condition (d.c.-link voltage Vcc=600V, gate
voltage Vg=15V, module case temperature
Tc=125°C) for a pulse length of 10µs is shown in
2
3
4
Module No.
Figure 5: Short circuit cycling of an eupec module
for High Power applications (1200V/3600A), no
failure.
figure 4. The maximum transient dissipated
power is about 3 MW and the cycling frequency
for the repetitive short-circuit analysis is 1/3 Hz.
Four modules have been stressed, each with a
different number of short-circuit pulses. Figure 5
shows how the in all 90.000 cycles were split up
between the 4 modules. No failure occurred and
the maximum number of pulses applied to a
module was 50.000. The most stressed device
was analysed for aging effects. No differences in
the electrical parameters like collector-emitter
cut-off current, gate-emitter leakage current and
device avalanche voltage were observed.
Additionally, the output and transfer characteristic
remain unchanged.
Concerning the power module mechanical
properties the bond wire connections were
analysed by pull- and shear test. All connections
Vge
Ic
a.
b.
Vcc
c.
Figure 4: Typical short circuit pulse at nominal
conditions Vge [5V/div], Vcc [200V/div], Ic
[2000A/div]
Figure 6: Unstressed (a.) and stressed (b.) chip
metal surface; c. Emitter contact hole cross
section (stressed device)
1.000.000
Tc=50°C
number of pulses until destruction
number of pulses until destruction
100.000
10.000
1.000
100
10
1
500
100.000
10.000
Tc=75°C
1.000
Tc=100°C
100
Vg und Vcc variation
Vcc variation
Tc variation
1
550
600
650
700
Vcc [V]
750
800
850
900
Tc=125°C
Vg variation
10
3
4
5
6
7
chip pulse energy [J]
8
9
number of pulses until destruction
100.000
Figure 8: Number of short-circuit pulses until
failure as a function of dissipated pulse energy
10.000
1.000
changes (e.g. melted areas due to a local overtemperature) in the contact hole region
recognized (figure 6c).
100
10
1
14
15
16
17
18
Vg [V]
19
20
21
22
number of pulses until destruction
100.000
10.000
1.000
100
10
1
25
50
75
100
Tc [°C]
125
150
175
Figure 7: Number of short-circuit pulses until
module destruction for Vcc=800V, Vg=20V,
Tc=150°C (each diagram represents the variation
of just one of these parameters)
remained in the production specifications. An
ultrasonic analysis of the chip solder connections
and a visual inspection of the chip and module
interconnections do not show any signs of
degradation phenomena.
For the IGBT the chip metal surface and the
contact hole region between metal and silicon
were analysed. The only changes observed are
recrystallization effects of the top aluminium
contact layer (Figure 6a/b). However these
changes due to the high temperature load are
known to be absolutely uncritical for the device
performance. Additionally, there were no critical
The medium power module reached more than ½
a million short-circuit pulses without module
destruction. So measurements with intensified
operation conditions were carried out to get an
impression about the possibilities of the IGBT
chip and the connection technology of the power
module. Figure 7 shows the dependence of the
number of reached short-circuit pulses until chip
destruction on the d.c.-link voltage, the gate
voltage (which influences the current levels
according to the chip transfer characteristic), and
the module case temperature. For all parameters
there exists a strong exponential dependence. In
the analysed parameter range the number of
“survived” short circuits varies between 11 for
very hard conditions and 560.000 for the nominal
case (the nominal case is not included in the
charts).
To combine all these measurements the
dissipated pulse energy was calculated to put all
measurements into one diagram (figure 8). For
the d.c.-link and gate voltage this plot reveals a
common exponential dependence on the short
circuit pulse energy except for the measurements
based on the temperature variation. In another
approach the maximum chip temperature at the
end of each pulse under consideration of the
module case temperature was determined. As
shown in figure 9 the maximum chip temperature
within a short-circuit pulse can be identified as
the decisive parameter for the expected number
of short-circuit pulses a power module is capable
to handle: For all parameter variations (Vcc, Vg,
Tc) the same exponential dependence on Tj,max
is found.
560.000 (nominal conditions, module not destroyed)
100.000
10.000
1.000
100
750V 16V 100°C
600V 15V 125°C
number of pulses until destruction
1.000.000
Vcc variation
nominal conditions
10
Vg variation
Tc variation
1
230
Vg and Vcc variation
250
270
290
310
330
350
370
390
Tj,max [°C]
Figure 9: Number of short-circuit pulses until failure as a function of the calculated max. chip temperature,
The measurement at nominal condition for which the module did not get destroyed after more than ½ a million
pulses is also included in this chart.
CONCLUSION
Three different failure modes during short-circuit
operation in modern IGBT chips are presented
and design aspects with regard to a high degree
of short-circuit capability for the Trench IGBT with
Field-Stop concept are discussed. We have
shown that IGBT 3 technology is designed for
excellent short-circuit robustness and moreover
module and chip technology are typically tolerant
to a large number of short circuit pulses under
relevant operation conditions. No signs of power
module degradation and changes in electrical
performance were observed. It is demonstrated
by experiment that there exists an exponential
dependence of the number of short circuit pulses
on the maximum chip temperature at the end of
each pulse. The investigations of the actual
destruction mechanism after many short circuit
pulses are ongoing.
[3]
[4]
[5]
[6]
REFERENCES
[1]
[2]
T. Laska, M. Münzer, F. Pfirsch, C. Schäffer,
T. Schmidt, “The Field Stop IGBT (FS IGBT)
– A New Power Device Concept with a
Great Improvement Potential”, Proceedings
of the 12th ISPSD, pp.355-358, 2000
M. Otsuki, Y. Onozawa, M. Kirisawa, H.
Kanemaru,
K.
Yoshihara,
Y.
Seki,
[7]
“Investigation on the Short-Circuit Capability
of 1200V Trench Gate Field-Stop IGBTs“,
Proceedings of the 14th ISPSD, pp.281-284,
2002
S. Dewar et al, “Soft Punch Through (SPT) –
Setting new Standards in 1200V IGBT“,
Proc. PCIM Europe, 2000
K. Nakamura, S. Kusunoki, H. Nakamura, Y.
Ishimura, Y. Tomomatsu, T. Minato,
“Advanced Wide Cell Pitch CSTBTs Having
Light Punch-Through (LPT) Structures“,
Proceedings of the 14th ISPSD, pp.277-280,
2002
I. Takata, “Destruction Mechanism of PT
and NPT IGBTs in the Short Circuit
Operation – an Estimation from the QuasiStationary Simulations“, Proceedings of the
13th ISPSD, pp.327-330, 2001
I. Takata, “Non Thermal Destruction
Mechanism of IGBTs in the Short Circuit
Operation“, Proceedings of the 14th ISPSD,
pp.173-176, 2002
T. Laska, G. Miller, M. Pfaffenlehner, P.
Türkes, D. Berger, B. Gutsmann, P.
Kanschat, M. Münzer, “Short Circuit
Properties of Trench-/Field-Stop-IGBTs –
Design Aspects for a Superior Robustness “,
to be published in Proceedings of the 15th
ISPSD, 2003