Download EC1-EC6304-SET2 ECE III SEM Model

LOYOLA – ICAM
COLLEGE OF ENGINEERING AND TECHNOLOGY (LICET)
Loyola College Campus, Nungambakkam , Chennai – 34
Branch:ECE
Date:DD/MM/2014
Semester: III
Time: 8.00 – 11.00 am(3Hrs)
MODEL EXAM
ELECTRONIC CIRCUITS-1(EC6304)
Part-A (Answer all the questions)
(10x2=20)
1. Draw the fixed bias single stage FET amplifier?
2. Comment on the slope of ac and dc load line.
3. What is ac degeneration and how it can be avoided?
4. What is the impact of adding a constant current source as active load in a differential amplifier?
5. Draw the small signal equivalent JFET common source circuit?
6. What are features of Cascodeamplifiers?
7. Draw the hybrid π equivalent circuit of BJTs?
8. What is half power frequencies or 3dB frequencies?
9. Draw the circuit of MOSFET differential amplifier with active load.
10. Sketch the DC transfer characteristics of a MOSFET differential amplifier.
Part-B(Answer all the questions)
(5x16=80)
11. (i) Explain the circuit which uses a diode to compensate for changes in VBE.
(8)
(ii) In the transistor shown in the following figure, RC=8KΩ, RL=24KΩ and VCC=24V. Draw
thed.c.load line and a.c. load line. Determine the optimum operating point.
(8)
+VCC
RB
RC
CC
CC
VAC
RL
(OR)
12. i) What is bias stability? Explain the factors which affect the stability of the BJT
ii) With the help of neat diagram explain the voltage divider bias for JFET
(8)
(8)
13. Explain the various methods of improving the input resistance of a BJT amplifier? (16)
(OR)
14. For the common collector amplifier circuit shown below, the transistor hybrid parameters are
hic=1.2kΩ, hfc=-101, hrc=1 and hoc=25µA/V. The component values are RS=1kΩ, R1=10kΩ,
R2=10kΩ, RE=5kΩ, RL=20kΩ, VCC=22V Calculate the Ri, Ai, Ais, Avs, Ro. (16)
+VCC
R1
RS
CC
CC
VS
R2
RL
RE
15. Determine the small-signal voltage gain, input and output resistances of a common-source
amplifier MOSFET amplifier shown in the figure with the parameters: VDD=3.3V, RD =10kΩ,
R1=140 kΩ, R2=60kΩ, and RSi=4kΩ. The transistor parameters are: VTN = 0.4V, Kn=0.5mA/V2,
and λ=0.02V-1. (16)
+VDD
R1
RD
CC
VO
RSi
Vin
CC
RL
R2
(OR)
16. Explain the JFET source follower amplifier and derive the expression for voltage gain using small
signal analysis. (16)
17. Determine the α- and β-cut off frequencies for a transistor with the following specifications.
gm=.038 mho, rb’e=5.9kΩ, hie=6kΩ, rbb’=100Ω, Cb’c=12pF, Cb’e=63pF, fT=80MHz, hfe=224 at
1kHz. Also, calculate the CE chort circuit current gain at the frequencies fα, fβ and fT. (16)
(OR)
18. Derive the expression for gain bandwidth product for high frequency FET amplifiers. (16)
19. Determine the small-signal voltage gain of the NMOS amplifier with depletion load. For the
circuit shown in the figure, assume transistor parameters of VTND= +0.8V, VTNL= −1.5V, KnD=1
mA/V2, KnL=0.2 mA/V2, and λD= λL= 0.01 V−1. Assume the transistors are biased at IDQ= 0.2mA.
(16)
(OR)
20. Describe the operation of an NMOS amplifier with an enhancement load and depletion load. (16)