Survey
* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project
* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project
Transistors Three-terminal devices with three doped silicon regions and two P-N junctions versus a diode with two doped regions and one P-N junction Two basic ways of implementation: Bipolar Junction Transistor (BJT) Field-Effect Transistor (FET) Transistors • • • • Many types ! 3- terminal devices Made with semiconductor materials Used for … amplifier design and as switches ! (but many more … ) • Common types: – BJT: Bipolar Junction Transistor – FET: Field Effect Transistor • MOSFET: Metal Oxide Semiconductor FET • MISFET: Metal Insulator Semiconductor FET • CMOS Technology: Complementary Metal Oxide Semiconductor FETs ! Transistors Bipolar Junction Transistors C C = collector B = base E = emitter n p B n E NPN transistor Transistors BJT Transistors BJT Transistors BJT PNP NPN Typical Transistor Circuit • Both DC and AC signals • DC signals for “powering” up the transistor and establishing an “operating point” • AC signals – what we want to “process” i.e. amplify Common Emitter Amplifier 8 Common Emitter Amplifier DC Equivalent Circuit 9 Common Emitter Amplifier AC Equivalent Circuit 10 How Do We Handle Trans ?? • Determine “operating mode” and replace transistor with appropriate model (linear!) Analysis Method 12 Analysis Method 13 a. Since VBB = 0.3V < 0.7V, transistor operates in CUTOFF region So IB = IC = 0. Write KVL equation around the input loop: VBB = 80k(IB) + VBE VBE = 0.3 V Write KVL14 equation around b. Since VBB = 2.7V > 0.7V, transistor is ON and VBE = 0.7V Write KVL equation around the input loop: VBB = 80k(IB) + VBE IB = (2.7 – 0.7)/80k = 25 A Assuming ACTIVE mode, IC = IB > 0.2V, so transistor IS in active region IC = 2.5 mA 15 c. Since VBB = 6.7V > 0.7V, transistor is ON and VBE = 0.7V IC = (VCC – VCE) / 2k = 4.9 mA Write KVL equation around the input loop: VBB = 80k(IB) + VBE IB = (6.7 – 0.7)/80k = 75 A Assuming ACTIVE mode, IC = IB < 0.2V, so transistor is in SATURATION region IC = 7.5 mA 16 Transistors Field-Effect Transistors Transistors Field-Effect Transistors Transistors FET MOSFETs – Circuit Symbols • n-MOS and p-MOS “working together” • “n” and “p” for ntype and p-type semiconductor • n-type: negative charges – electrons • p-type: positive charges – “holes” Transistors FET When VG is positive, electrons in the p-type substrate are attracted to the oxide–silicon interface, and form an n-type conduction channel. The electrical model is represented by resistors in series. The transistor is in its ON state. NMOS Transistors FET When VG = 0, the area underneath the oxide layer is still p-type, which forms a “ back-to-back ” diode with the n region, as shown in the electrical representation. The transistor is in its OFF state. NMOS Transistors FET PMOS NMOS vs. PMOS - Operation NMOS vs PMOS INPUT NMOS INPUT PMOS High “1” ON High “1” OFF Low “0” OFF Low “0” ON NMOS Inverter • What happens when Vin is “high” ? i.e. logic level “1” • What happens when Vin is “low” ? i.e. logic level “0” INPUT High “1” Low “0” OUTPUT CMOS Inverter CMOS Inverter CMOS “Gate” A B LO LO LO HI HI LO HI HI OUT CMOS “AND Gate” A B LO LO LO HI HI LO HI HI OUT CMOS “AND Gate” A B LO LO LO HI HI LO HI HI OUT CMOS “AND Gate” A B OUT LO LO LO LO HI LO HI LO LO HI HI HI CMOS “AND Gate” A B OUT 0 0 0 0 1 0 1 0 0 1 1 1