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Small- and Large-Signal Modeling for Submicron InP/InGaAs DHBT’s ‘ Tom K. Johansen*, Virginie Nodjiadjim**, Jean-Yves Dupuy**, Agnieszka konczykowska** *DTU Electrical Engineering, Electromagnetic Systems Group, Technical University of Denmark DK-2800 Kgs. Lyngby Denmark **III-V Lab, F-91461 Marcoussis France Outline • The ”InP/InGaAs DHBT” device • Specific modeling issues for III-V HBT devices: -The integral charge control relation (ICCR) for HBT modelling -Charge and transit-time modelling in III-V HBT devices -Temperature effects and self-heating • Small-signal modellng: Direct parameter extraction • Scalable large-signal model verification • Summary 2 The ”InP/InGaAs DHBT” Device • The introduction of an wide-gap emitter and collector to form a Double Heterojunction Bipolar Transistor (DHBT) offers several advantages over Homojunction Bipolar Transistors: - Higher fT and fmax characteristic - increased breakdown voltage - better performance under saturation operation 6 BVceo (V) 5 4 HBT SiGe IBM HBT SiGe IBM Cryo HBT InP UIUC HBT InP EHTZ HBT InP UCSB HBT InP ALTH HEMT Indicated in red are the 1.5µm and 0.7µm InP/InGaAs DHBT technologies developed at the III-V Lab. 3 2 1 100 500 fT (GHz) 1000 The ”InP/InGaAs DHBT” Device • InP/InGaAs DHBT allows simultaneously high output power and high frequency: - mm-Wave power amplifiers - VCOs for PLLs - Electronic laser drivers and transimpedance amplifiers for ultra-high bit rate optoelectronics (>100Gbit/s operation) III-V Lab’s 0.7µm InP/InGaAs DHBT: Emitter Base plug Collector InP DHBT Frequency Performance Geometrical parameters: Frequency characteristic: Device Lein [um] Ae [um2] Ac [um2] T5B3H7 5.0 2.7 8.6 T7B3H7 7.0 3.9 10.9 T10B3H7 10.0 5.7 14.3 • An InP DHBT large-signal model must predict the frequency characteristic dependence on bias and on geometry HBT large-signal model topology Circuit diagram of HBT model: Agilent ADS SDD implementation: • The large-signal topology is nearly identical for the various HBT models (UCSD HBT model, Agilent HBT model, FBH HBT model) The integral charge control relation DC model of bipolar transistor: 1D BJT cross-section: Base Current Reverse Operation Base Current Net Transport Forward Current Operation The transport current in a npn transistor depends directly on the hole charge! Vbc Vbe qVT A e VT I cc e VT e p Hole X c p( x ) p dx 2 Xe n ni concentraction The Gummel-Poon model for BJTs Gummel-Poon model formulation: I I cc s qb Vbc Vbe V V e T e T Normalized base charge: Q B Q BO Q Ej (Vbe ) Q Cj (Vbc ) Q F Q R QB q q qb q1 2 q b 1 Q BO qb 2 Is : saturation current q b : normalized base hole charge q12 q2 4 V V q1 1 q Ej q Cj 1 BE BC V VF R Models the Early effect VBC VBC VBE VBE I Is Is Is V V V q 2 F s e VT 1 R e T 1 e T 1 e T 1 Q BO Q BO I KF I KR Models the Webster effect Extended GP model for HBTs Energy band diagram for abrupt DHBT: HBT modeling approach: ≈1 in HBTs q qb 1 2 I Icc s qb Vbc Vbe N V N V e F T e R T Vbe Vbc 2 q1 I I q 2 s e N A VT s e N BVT 4 ISA ISB • In an abrupt DHBT additional transport mechanisms such as thermionic emission over the barrier and tunneling through it tend to drag the ideality factor away from unity (NF>1). • The collector blocking leads to earlier saturation at high collector voltages (the so-called ”soft knee” effect) Forward Gummel-plot for InP DHBT device Nf=1.14 •Base current in UCSD HBT model: VBE VBE I I BE s e N FVT 1 ISE e N E VT 1 q b F Ideal Non ideal Forward Gummel-plot for InP DHBT device •Nf=1.14 •Base current in Agilent HBT model: VBE VBE I BE ISH e N H VT 1 ISE e N E VT 1 Ideal Non ideal Charge modeling in III-V HBT • In any transistor a change in bias requires charge movement which takes time: - built up depletion layers in the device - redistribution of minority carriers AC model of bipolar transistor: Total emitter-collector delay: ec Qdiff (Vbe , Vbc ) Transcapacitances in the small - signal model dQ be dI cc Vce dQ bc dI cc Vce C je C bc gm Qbe Q je FexQdiff depletion charge diffusion charge Qbc Q jc (1 Fex )Qdiff depletion charge diffusion charge b c • Diffusion charge partitionen with Fex Transit time formulation Analytical transit-times: 2 WB WB b 2D n v exit c Wc 2v c Velocity-field diagram for InP: Base thickness (assumed constant) (varies with bias) Collector thickness Typ. c b in III - V HBTs! Velocity modulation effects in collector: • Collector transit-time c increase with electrical field • Collector transit-time c decrease with current due to modulation of the electrical field with the electron charge (velocity profile modulation) • Intrinsic base-collector capacitance Cbci decrease with current Transit time formulation: Full depletion Collector transit-time model: Slowness of electrons in InP: Wc Wc2 k1 k1 Tc k 0 (Vjc Vbci ) ( N dc 2n ) 2 2 2 12 0 r Conv. delay Av. field increase Velocity profile modulation Ic n qv( av )A e Av. electron density Base-collector capacitance model: Cbci 0 r Ae Wc Ic Tc A Ik kIW Cbci 0 r e c 1 1 1 c c Vbci Wc 2 6 0 r Ae • Formulation used in UCSD HBT model 1 / v(E) k 0 k1E Inclusion of self-heating Self-Heating formulation: d delT Q th dt R th d 0 delT I th R th R th Q th dt I th delT : Tempeture rise Thermal network I th : Power dissipation R th : Thermal resistance Q th C th delT : Thermal charge • The thermal network provides an 1.order estimate of the temperture rise (delT) in the device with dissipated power (Ith). InP HBT self-heating characteristic Ic Ic E g T I const T kT b • Self-heating in HBT devices manifests itself with the downward sloping Ic-Vce characteristic for fixed Ib levels. Small-signal modeling Rbcx Cbcx Rbci Rbx Cbci Rbi Rci B Rcx C + Vbe _ Cbe Rbe gmVbe z be R be || 1 jC be z bc R bc || 1 jC bc Cceo gm=gmoe-jd Re z bcx R bcx || 1 jC bcx z11 Z be R bi (R ci Z bcx ) R bi Z bc R bx R e 1 g m Z be R bi R ci Z bc Z bcx (R bi R ci Z bc Z bcx )(1 g m Z be ) z12 Z be R bi R ci R bi Z bc Re 1 g m Z be R bi R ci Z bc Z bcx (R bi R ci Z bc Z bcx )(1 g m Z be ) z 21 Zbe R bi R ci R bi Zbc g m Zbc Zbcx Zbe Re 1 g m Zbe R bi R ci Zbc Zbcx (R bi R ci Zbc Zbcx )(1 g m Zbe ) z 22 Z be R ci (R bi Z bcx ) Z bc (R bi Z bcx ) R cx R e 1 g m Z be R bi R ci Z bc Z bcx (R bi R ci Z bc Z bcx )(1 g m Z be ) Resistance Extraction: Standard method Open-Collector Method: HBT base current flow: •Rbx underestimated due to shunting Saturated HBT device: effect from forward biased external Re( Z11 Z12 ) R bx for I b base-collector diode! Re( Z12 ) R e R bi || R ci for I b Re( Z 22 Z12 ) R cx for I b •Re overestimated due to the intrinsic collector resistance! Standard method only good for Rcx extraction Emitter resistance extraction Forward biased HBT device: Re( Z12 )( 0) R bi C bcx R e for I c (C bci C bcx )(1 ) Correction factor Notice: Rbi extracted assuming uncorrected Re value. Re can be accurately determined if correction is employed Extrinsic base resistance extraction (I) Circuit diagram of HBT model: • Distributed base lumped into a few elements • The bias dependent intrinsic base resistance Rbi describes the active region under the emitter • The extrinsic base resistance Rbx describes the accumulative resistance going from the base contact to the active region • Correct extraction of the extrinsic base resistance is important as it influence the distribution of the base-collector capacitance fmax modeling! Extrinsic base resistance extraction (II) Base-collector capacitance model: A k I C bci 0 r e 1 c Wc 2 k1I c Wc 1 6 A 0 r e Linearization of capacitance: K1=0.35ps/V Ae=4.7m2 Wc=0.13m Physical model Low current linear approximation: C bci C bci 0 1 Ic I p Characteristic current A C bci 0 0 r e Wc Linear approx. I p 2Cbci0 / k1 • Linear approximation only valid at very low collector currents. Extrinsic base resistance extraction (III) Base-collector splitting factor: C bci 0 [1 I c / I p ] C bci C bci C bcx C bci 0 [1 I c / I p ] C bcx X 0 [1 I c / I p ] X 0 [1 (1 X 0 ) I c / I p ] 1 X 0Ic / Ip X Linearization of splitting factor: K1=0.35ps/V Ae=4.7m2 Wc=0.13m X0=0.41 Physical model Zero-bias splitting factor: X 0 C bci 0 /(C bci 0 C bcx ) A e / A c Linear approx. • Base collector splitting factor follows linear trend to higher currents. Extrinsic base resistance extraction (IV) Improved extraction method: Effective base resistance model: Def. : R beff ReZ11 Z12 R beff C bci R bi R bx XR bi R bx C bci C bcx I R beff X 0 1 (1 X 0 ) c R bi R bx I p for I c I p Rbx extraction method: R beff R bx for I c Ip 1 X0 • Extrinsic base resistance estimated from extrapolation in full depletion. Intrinsic base resistance extraction Improved Semi-impedance circle method: (Rbx, Re, Rcx de-embedded) H11 1 /(Y11 Y12 ) R be R bi (1 jR be (C be C bc )) 1 jR be C be H11 ( ) R bi C be C bc R bi C be Rbi in InP DHBT devices is fairly constant versus base current Base-collector capacitance extraction Base-collector capacitance modelling: k1I c Wc 1 6 A 0 r e A k I C bci 0 r e 1 c Wc 2 A C bcx 0 r e Wc 1 1 X 0 •Model parameters: •Base-collector capacitance extraction 1 Re 1 /(Z11 Z12 ) R bi C bcx C bci C bci Im1 /(Z22 Z21) (Cbcx Cbci ) Wc 0.130m r 12.56 A e 3.9m 2 k1 0.44ps / V X 0 0.40 Intrinsic element extraction Intrinsic hybrid-pi equivalent circuit i Yi C be Im Y11 12 i Yi R be 1 / Re Y11 12 i C bci Im Y12 i R bci 1 / Re Y12 i Y i / cos( ) g mo Re Y21 d 12 i Yi Im Y21 12 1 d a tan i Yi Re Y21 12 • The influence from the elements Rbx, Rbi, Re, Rcx, Cbcx, and Cceo are removed from the device data by de-embedding to get to the intrinsic data. Direct parameter extraction verification Small-signal equivalent circuit Model Parameter Value Model Parameter Value Rbx [] 8.0 Cbcx [fF] 10.1 Rbi [] 11.1 Cbci [fF] 3.0 Rcx [] 2.6 Rbci [k] 56.0 Re [] 2.7 gmo [mS] 773 Cbe [fF] 340.8 d [pS] ≈0 Rbe [] 34.6 Cceo [fF] 6.8 S-Parameters Scalable UCSD HBT model verification Scalable Agilent HBT model verification Large-signal characterization setup Single-finger device • Load pull measurements not possible. Load and source fixed at 50Ω. • Lowest measurement loss at 74.4GHz Large-signal single-tone verification Measurements versus UCSD HBT model: • The large-signal performance at 74.4GHz of the individual single-finger devices is well predicted with the developed UCSD HBT model except for low collector bias voltage (Vce=1.2V). mm-wave verification! Large-signal single-tone verification Measurements versus Agilent HBT model: • The large-signal performance at 74.4GHz of the individual single-finger devices is well predicted with the developed Agilent HBT model. The agreement at lower collector bias voltage is better. mm-wave verification! Summary • The InP/InGaAs DHBT can be modeled accurately by an extended Gummel-Poon formulation - thermionic emission and tunneling - collector blocking effect - collector transit-time physical modeling • Small-signal InP/InGaAs HBT modeling -unique direct parameter extraction approach •Scalable large-signal HBT model verfication -RF figure-of-merits and DC characteristics -mm-wave large-signal verification