Download j500 j501 j502 j503 j504 j505 j506 j507 j508 j509 j510 j511 current

Survey
yes no Was this document useful for you?
   Thank you for your participation!

* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project

Document related concepts

Electrical substation wikipedia , lookup

Ground (electricity) wikipedia , lookup

Public address system wikipedia , lookup

Immunity-aware programming wikipedia , lookup

Electronic engineering wikipedia , lookup

Rectifier wikipedia , lookup

Ohm's law wikipedia , lookup

Electromagnetic compatibility wikipedia , lookup

Three-phase electric power wikipedia , lookup

Transistor wikipedia , lookup

Islanding wikipedia , lookup

Power engineering wikipedia , lookup

Distribution management system wikipedia , lookup

Surge protector wikipedia , lookup

Current source wikipedia , lookup

Power electronics wikipedia , lookup

Metadyne wikipedia , lookup

History of electric power transmission wikipedia , lookup

Switched-mode power supply wikipedia , lookup

Voltage optimisation wikipedia , lookup

Buck converter wikipedia , lookup

Resistive opto-isolator wikipedia , lookup

Opto-isolator wikipedia , lookup

Stray voltage wikipedia , lookup

Alternating current wikipedia , lookup

Mains electricity wikipedia , lookup

Transcript
LSK389
ULTRA LOW NOISE
MONOLITHIC DUAL
N-CHANNEL JFET AMPLIFIER
Over Three Decades of Quality Through Innovation
FEATURES
ULTRA LOW NOISE
en = 0.9nV/√Hz (typ)
TIGHT MATCHING
IVGS1-2I = 20mV max
HIGH BREAKDOWN VOLTAGE
BVGSS = 40V max
HIGH GAIN
Gfs = 20mS (typ)
LOW CAPACITANCE
25pF typ
IMPROVED SECOND SOURCE REPLACEMENT FOR 2SK389
ABSOLUTE MAXIMUM RATINGS1
@ 25 °C (unless otherwise stated)
Maximum Temperatures
Storage Temperature
-65 to +150°C
Junction Operating Temperature
-55 to +135°C
Maximum Power Dissipation
Continuous Power Dissipation @ +25°C
SOIC-A
Top View
TO-71
Top View
400mW
Maximum Currents
Gate Forward Current
IG(F) = 10mA
Maximum Voltages
Gate to Source
VGSS = 40V
Gate to Drain
VGDS = 40V
* For equivalent single version, see LSK170 family
MATCHING CHARACTERISTICS @ 25°C (unless otherwise stated)
SYMBOL
CHARACTERISTIC
VGS1  VGS2
Differential Gate to Source Cutoff
Voltage
IDSS1
IDSS2
MIN
Gate to Source Saturation Current Ratio
TYP
MAX
UNITS
20
mV
VDS = 10V, ID = 1mA
---
VDS = 10V, VGS = 0V
0.9
CONDITIONS
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise stated)
SYMBOL
BVGSS
VGS(OFF)
IDSS
CHARACTERISTIC
MIN
Gate to Source Breakdown Voltage
-40
Gate to Source Pinch-off Voltage
Drain to Source Saturation
Current
TYP
MAX
-0.15
-2
LSK389A
2.6
6.5
LSK389B
6
12
LSK389C
10
20
LSK389D
17
30
UNITS
CONDITIONS
V
VDS = 0, ID = -100µA
V
VDS = 10V, ID = 0.1µA
mA
VDS = 10V, VGS = 0
IGSS
Gate to Source Leakage Current
-200
pA
VGS = -30V, VDS = 0
IG1G2
Gate to Gate Isolation Current
±1.0
µA
VG1-G2 = ±45V, ID = IS = 0A
Note: All MIN/TYP/MAX limits are absolute numbers. Negative signs indicate electrical polarity only.
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201122
11/29/2016 Rev#A10 ECN# LSK389
ELECTRICAL CHARACTERISTICS CONT. @ 25°C (unless otherwise stated)
SYMBOL
CHARACTERISTIC
MIN
TYP
MAX
UNITS
8
20
mS
Gfs
Full Conduction Transconductance
en
Noise Voltage
1.9
Nv/√Hz
en
Noise Voltage
4.0
Nv/√Hz
CONDITIONS
VDS = 10V, VGS = 0, f = 1kHz
CISS
Common Source Input Capacitance
25
pF
VDS = 10V, ID = 2mA, f = 1kHz,
NBW = 1Hz
VDS = 10V, ID = 2mA, f = 10Hz,
NBW = 1Hz
VDS = 10V, VGS = 0, f = 1MHz,
CRSS
Common Source Reverse Transfer Cap.
5.5
pF
VDG = 10V, ID = 0, f = 1MHz,
Note: The noise spec is a spec that is guaranteed by design.
ORDERING INFORMATION
LSK389 - A - SOIC-8
IDSS Range
A
B
C
D
2.6 - 6.5 mA
6 - 12 mA
10 - 20 mA
17 - 30 mA
Package
TO-71 6L
SOIC-A 8L
TO-71
SOIC-8
PACKAGE DIMENSIONS
TO-71
SOIC-A
0.210
0.170
Note: All Dimensions in inches
NOTES:
1.
Absolute maximum ratings are limiting values above which serviceability may be impaired.
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use;
nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Linear Integrated Systems.
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing high-quality discrete
components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil and Micro
Power Systems by company President John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC
Development at Union Carbide, Co-Founder and Vice President of R&D at Intersil, and Founder/President of Micro Power Systems.
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201122
11/29/2016 Rev#A10 ECN# LSK389