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# Download ECOM 3310 Computer Architecture Dr. Wesam Ashour Midterm

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```ECOM 3310 Computer Architecture
Midterm Exam, Tuesday, 25th November 2014, 11:00am-12:25pm.
Dr. Wesam Ashour
Eng. Ahmed Eldaly, Eng. Ghadeer Aljaro
Problem 1 [3 pts]
Convert the following MIPS program into machine code.
0x1A03001F
0x1A030013
0x1A030017
0x1A03002B
0x1A03002F
0x1A030023
Register name:
Register number:
lw \$t1,-6(\$t3)
bne \$t1,\$t4,loop
sw \$t4, 6(\$t3)
lui \$t0,15
j loop
\$t0
\$t1
\$t2
\$t3
\$t4
\$t5
\$t6
\$t7
8
9
10
11
12
13
14
15
1
Problem 2 [4 pts]
Produce the minimal sequence of actual MIPS instructions that accomplish:
1.
ble \$t5, \$t3, L
if (\$t5 <= \$t3) go to L
a. [1 pt] Assume Label L refers to a location 80,000 bytes away from the current Program Counter.
b. [1 pt] Assume Label L refers to a location 80 Mega-bytes away from the current Program Counter.
c. [1 pt] Assume Label L refers to a location 300 Mega-bytes away from the current Program Counter.
2.
[1 pt] \$t5 = abs (\$t1)
Problem 3 [3 pts]
1.
The pseudo-instruction la rd, imm (load address) is assembled into a lui (load upper immediate)
instruction followed by an ori (or immediate) instruction.
a. [1 pt] Why are two instructions necessary?
b. [1 pt] Why canâ€™t an addi be used in place of the ori?
2.
[1 pt] Represent 20.625 (decimal) in IEEE 754 single precision format.
ECOM 3310 Computer Architecture
Midterm Exam, Tuesday, 25th November 2014, 11:00am-12:25pm.
Dr. Wesam Ashour
Eng. Ahmed Eldaly, Eng. Ghadeer Aljaro
Problem 4 [4 pts]
1.
[3 pts] X = 0100 0110 1101 1000 0000 0000 0000 0000,
Y = 0011 1110 1110 0000 0000 0000 0000 0000,
Representing IEEE 754 floating point numbers, perform X + Y (showing all steps in Binary):
2.
[1 pt] X = 1011 1100 0101 0000 0000 0000 0000 0000,
If X represents IEEE 754 floating point number, what is this number in decimal?
Problem 5 [3 pts]
For a program A, assume we have the following information:
Instruction Class
ALU
Jump/Branch
Store
Clock cycles per instruction
6
5
7
8
Number of instructions
1,000,000,000
140,000,000
180,000,000
200,000,000
We make 2 changes for improvement.
First, we replace load instruction by new instruction load++, this modification lead to eliminate 50,000,000
ALU instructions.
Second, the number of clock cycles per instruction for Jump/load is reduced from 5 to 4.
If the clock rate of the system is 2GHZ, How much improvement we will have after this modification?
3
Problem 6 [3 pts]
Write the MIPS code for the following statement:
M [ I ] = K [ X [ I ] ] + N [ X [ I+4 ] ]
Assume starting address of Array M is stored in \$to.
Assume starting address of Array K is stored in \$t1.
Assume starting address of Array X is stored in \$t2.
Assume starting address of Array N is stored in \$t3.
Assume variable I is stored in \$t4.
Arrays M, K, X and N contain word values.
GOOD LUCK
```
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