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Lecture 3
Computer Organization and
Assembly Language. (CSC-210)
Dr. Muhammad Ayaz
Intel
Microprocessor History
Basic MP architecture

Instruction
Register
ALU

Fetch, decode,
execute.
First instruction
is a fetch
Control
Bus
control
Address Bus
Register Array
Data Bus
AF,
BC,
DE,
HL,
SP,
PC
many
more
History of Microprocessor





Fairchild Semiconductors (founded in 1957) invented
the first IC in 1959.
In 1968, Robert Noyce, Gordan Moore, Andrew
Grove resigned from Fairchild Semiconductors.
They founded their own company Intel (Integrated
Electronics).
Intel grown from 3 man start-up in 1968 to industrial
giant by 1981.
It had 20,000 employees and $188 million revenue
History of Microprocessor

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Current major manufactures and famous microprocessors.
Intel (x86, P1, P2, Atom, Dual Core, Core 2-Duo, Core i7)
Motorola (Motorola 6800, Motorola 68000 )
AMD (AMD K5, AMD K6, AMD K8)
IBM (POWER6, Quad-core z196, Six-core zEC12)
Microprocessor History

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4-Bit Microprocessors
8-Bit Microprocessors
16-Bit Microprocessors
32-Bit Microprocessors
64-Bit Microprocessors
Microprocessor History..…

Intel 4004 (1971)
 0.1
MHz (740 KHz)
 4 bit
 Program memory 4 KB
 16 index registers
 World first Single chip microprocessor
 Register set contained 16 registers of 4 bits each
 It had 2,300 transistors
 It could execute around 60,000 instructions per
second.
Microprocessor History …

Intel 4040 (1974)
was also 4-bit μP.
 Program memory 8 KB
 24 index registers (two banks - 16 and 8 registers)
 It
Microprocessor History

Intel 8008 (1972)
 Max.
CPU clock rate 0.5 MHz to 0.8 MHz
 8-bit CPU with an external 14-bit address bus
 Could address 16KB of memory
 Had 3,500 transistors
Microprocessor History

Intel 8080 (1974)
 Second
8-bit microprocessor
 Max. CPU clock rate 2 MHz
 Was 10 times faster than 8008.
 Large 40-pin DIP packaging
 16-bit address bus and an 8-bit data bus
 Easy access to 64 kilobytes of memory
 Processor had seven 8-bit registers, (A, B, C,
D, E, H, and L)
 It had 4500 transistors.
Microprocessor History

Intel 8086 (1978)
 16-bit
microprocessor
 Max. CPU clock rate 5 MHz to 10 MHz
 20-bit external address bus gave a 1 MB
physical address
 16-bit registers including the stack pointer
 The number of transistors increased to 29,000.
 Over 100 million copies were sold.
Microprocessor History
•
Intel 80286 (1978)
–
–
–
–
16-bit x86 microprocessor
134,000 transistors
Max. CPU clock rate 6 MHz to 25 MHz
Run in two modes
•
•
Protected mode
Real mode
Microprocessor History
•
Intel 80386 (1985)
–
–
–
–
32-bit Microprocessor
275,000 transistors
16-bit data bus
Max. CPU clock rate 12 MHz to 40 MHz
Microprocessor History

Intel 80486 (1989)
 Max.
CPU clock rate 16 MHz to 100 MHz
 FSB(frontside bus) speeds 16 MHz to 50 MHz
 1,180,000 transistors
 An 8 KB on-chip SRAM cache stores
 486 has a 32-bit data bus and a 32-bit address
bus.
 Power Management Features and System
Management Mode (SMM) became a standard
feature
Microprocessor History

Intel Pentium I (1993)
 Intel's
5th generation micro architecture
 Operated at 60 MHz
 A total of 3,100,000 transistors were used.
 Powered at 5V and generated enough heat to
require a CPU cooling fan
 Level 1 CPU cache from 16 KB to 32 KB
 Contained 4.5 million transistors
 compatible with the common Socket 7 motherboard
configuration
Microprocessor History

Intel Pentium II (1997)
 Intel's
sixth-generation microarchitecture
 296-pin Staggered Pin Grid Array (SPGA) package
(Socket 7)
 A total of 7,500,000 transisters were used.
 speeds from 233 MHz to 450 MHz
 Instruction set IA-32, MMX
 cache size was increased to 512 KB
 better choice for consumer-level operating
systems, such as Windows 9x, and multimedia
applications
Microprocessor History

Intel Pentium III (1999)
 400
MHz to 1.4 GHz
 A total of 9,500,000 transisters were used.
 L1-Cache: 16 + 16 KB (Data + Instructions)
 L2-Cache: 512 KB, external chips on CPU
module at 50% of CPU-speed
 the first x86 CPU to include a unique,
retrievable, identification number
Microprocessor History
•
Intel Pentium IV (2000)
–
–
–
–
–
–
–
–
Max. CPU clock rate 1.3 GHz to 3.8 GHz
Instruction set x86 (i386), x86-64, MMX, SSE,
SSE2, SSE3
featured Hyper-Threading Technology (HTT)
The 64-bit external data bus
More than 42 million (42,000,000) transistors.
Processor (front-side) bus runs at 400MHz,
533MHz, 800MHz, or 1066MHz
L2 cache can handle up to 4GB RAM
2MB of full-speed L3 cache
Real Mode vs Protected Mode

In real mode, software communicates directly with
the computer's ports and devices.



This paradigm doesn't work in a multitasking OS when multiple
programs sent data streams to the ports simultaneously
Ports are dumb, and they have no ability to filter or arrange
data streams to match the sending programs.
In protected mode, the system's ports and devices
are protected from the applications that use them


The software thinks it's sending data to a port, but it's a virtual
port.
The OS is grabbing the data stream and managing it, to
ensure that all applications have equal access and to ensure
that data from each application is appropriately preserved.
RISC and CICS

RISC (Reduces Instruction Set Computer)
More instructions and a simpler architecture
 The tradeoff is performance, because the RISC is often so
much faster than a CISC.
 RISC processors use a small and limited number of
instructions
 RISC processors consume less power and are having high
performance.
 Each instruction is very simple and consistent.
 RISC instruction is of uniform fixed length.
 IBM RS6000, DEC’s Alpha 21064

RISC and CICS …

CISC (Complex Instruction Set Computer)
Relatively slow per instruction, but use fewer instructions.
 It's easier to write powerful optimized compilers, since fewer
instructions exist.
 CISC chips have a large amount of different and complex
instructions.
 CISC processors are having limited number of registers.
 Different machine programs can be executed on CISC
machine.

 Intel
386, 486, Pentium, Pentium Pro, Pentium II…
Dual-core

26
Dual-core means a processor is combining
two independent processing cores into a
single processor package. That means the
processor can perform 2 tasks at the same
time. All Intel(r) Core(tm) i3 processors are
dual-core.
Stack Pointer

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A stack pointer is a small register that stores the
address of the last program request in a stack.
A stack is a specialized buffer which stores data
from the top down.
As new requests come in, they "push down" the
older ones.
The most recently entered request always
resides at the top of the stack, and the program
always takes requests from the top.
Hyper threading


28
A technology developed by Intel that enables
multithreaded software applications to execute threads in
parallel on a single multi-core processor instead of
processing threads in a linear fashion
Hyper threading is a more advanced form of super
threading. In hyper threading certain sections of the CPU
are duplicated, so that the processor can appear, to the
operating system, to be two logical processors. The
operating system can then schedules two threads or
processes to run simultaneously.
Multithreading


Multithreading: allows multiple threads to exist within the context
of a single process, sharing the process resources but able to
execute independently. It can allow a single process, to be
executed in par
Dual core Pentiums do not have hyperthreading. i3 processors
are still dual core, but have hyperthreading... so they can
sometimes handle 4 threads at once. That would be the primary
difference.
i5 processors are true quad core, and i7 processors are quad
core with hyperthreading.

29
i7 9** series chips have 4 physical cores and through the use of
Hyper Threading also have for logical cores - so task manager
will show "8 cores
Cores and Threads
i3 = 2 cores with 1 thread per core.
i5 = 4 cores with 1 thread per core.
i7 = 4 cores with 2 threads per core. (OS sees it as
8 cores)
i9 = 6 cores with 2 threads per core. (OS sees it as
12 cores)
30