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2 3 4 5 6 7 A R14 AIN1 20K R5 R15 9 A to display board 1 VI VO GND 5V C2 2 10K 10K 510K R3 10K C13 4.7nF VDDA 3 R30 AIN0 VDDA RTH 51K IC2 78L05 10R R4 100uF 16V 50K R6 P+ 8 + 1 C15 4.7nF GND GND 5V front panel GND GND D4 IN+ 2 1 B +12V 12V input TEMP SENSING + VSENSE SS14 GND 0.1uF C10 D5 SS14 GND GND 2 51K R11 R2 1 C14 1uF GND AIN2 10K TLC272D 510K C12 4.7nF C16 1uF GND GND 10K IC4B 7 TLC272D 10K D3 1N4148 2K R9 C18 4.7nF R37 R28 GND 10K 51R 8 +12V + R33 10K C VR1 A FAN PWM DRIVE 10K R34 GND 5V VCC P+ Q2 W60N10 R23 10K E P- 4 R26 1uF C17 DIFFERENTIAL VOLTAGE MEAS FOR REMOTE SENSE GND 750R R36 E 30A D1 5 GND 10K C22 1uF D GND 6 R7 R10 C P+ 20K R8 V- IC4A GND GND R-SHUNT 3 0.01R R20 10K R19 10K R12 T1 NPN 100u R29 GND I_SET 20K L1 GND 5V1 C19 D2 1uF GND VCC C1 100uF 16V Q3 AM2300 2K R13 C20 FAN_PWM R16 20K FAN NPN = J3Y = S8050 10K 51K V+ + R FAN_PWM LED5 LED4 LED3 LED2 LED1 15uH FAN- GND R17 D 2 1 750R GND 10K FAN+ 2 + 1 SS14 C23 1uF R35 D6 150R R25 R21 4.7nF C21 BUZZER R27 30pF C6 R1 NRST PD7/TLI[TIM1_CH4] PA1/OSC PD6/UART2_RX PA2/OSCOUT PD5/UART2_TX VSS PD4/TIM2_CH1[BEEP] VCAP PD3/TIM2_CH2[ADC_ETR] VDD PD2/TIM3_CH1[TIM2_CH3] VDDIO_1 PD1/SWIM PF4/AIN12 PD0/TIM3_CH2[TIM1_BKIN][CLK_CCO] VDDA PC7/SPI_MISO VSSA PC6/SPI_MOSI PB5/AIN5[I2C_SDA] PC5/SPI_SCK PB4/AIN4[I2C_SCL] PC4/TIM1_CH4 PB3/AIN3[TIM1_ETR] PC3/TIM1_CH3 PB2/AIN2[TIM1_CH3N] PC2/TIM1_CH2 PB1/AIN1[TIM1_CH2N] PC1/TIM1_CH1/UART2_CK PB0/AIN0[TIM1_CH1N] PE5/SPI_NSS 10K C5 GND 30pF GND 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 STM8S105K4T R18 PROTECTION IC1 1 2 3 1uF 4 GND C7 5 1uF VCC 6 C8 7 8 FB1 9 VDDA 1uF 10 GND C9 11 12 13 C11 14 AIN2 4.7nF AIN1 15 16 AIN0 GND 510K 2K GND C4 VDDA B T2 R32 NPN 330uF 16V 12MHz Q1 VCC R31 330uF 16V J3 C 51R C3 GND GND op-amp power F Reverse engineered dummy load schematic Warning! Might contain errors! www.voltlog.com F