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Concept 5 : Resonance
Conditions for Resonance :
Resonance is defined as a circuit condition in which :
 Inductive and capacitive effect neutralizes each other.
 The circuit impedance becomes purely resistive.
 The supply voltage and supply current appears to be in phase to each other.
 The power factor of the circuit is unity.
Difference between Series and Parallel RLC Resonance :
Sr.
1.
Series RLC Resonant Circuit
Circuit diagram
Sr.
1.
Parallel RLC Resonant Circuit
Circuit diagram
2.
Imaginary part of voltage phasor = 0
Im V   0 where V  VR  j (VL  VC )
2.
Imaginary part of current phasor = 0
Im I   0 where I  I R  j ( I L  I C )
i.e.
VL  VC  0
i.e.
VL  VC
3.
I L  IC
3.
Imaginary part of impedance
Im  Z   0
i.e.
X L  XC  0
5.
where X is reactance
Resonant frequency
1
0 
rad/sec
LC
Impedance
1 

Z  R  j  L 

C 

1 

Z  R   L 

C 

1

 L  C
Z  tan 
R


1
4.
5.
7.
0
BL  BC  0
where B is susceptance
Resonant frequency
1
0 
rad/sec
LC
Admittance
1
1 

Y   j  C 

R
L 

2
Y 





Impedance at resonant frequency
Z
Im Y   0
BL  BC
2
6.
Imaginary part of admittance
i.e.
X L  XC
4.
I L  IC  0
2
1 

 C  L 
Y  tan 

1


R


1
6.
 R  Z min
Relationship between impedance V/s
frequency
1 
1 
  C 

2
L 
R 
Admittance at resonant frequency
Y
7.
Page 1 of 3
0

1
 Ymin
R
Relationship between admittance V/s
frequency
Page 2 of 3
8.
Relationship between current V/s frequency
8.
V
I 
Z
9.
V 
9.
Upper cut-off frequency
R
R2
4


2
L
LC
L
H 
rad/sec
2
10.
R

L
R
4

rad/sec
L2 LC
11.
BW  H  L 
12.
Relationship between
R
rad/sec
L
H , L and 0
0  H L 
1
LC
Upper cut-off frequency
Lower cut-off frequency
1
1
4


2 2
R C LC rad/sec
L  RC
2
2
Bandwidth
I
Y
1
1
4


2 2
RC
LC
R
C
H 
rad/sec
2
10.
Lower cut-off frequency
L 
11.
Relationship between voltage V/s frequency
Bandwidth
BW  H  L 
12.
Relationship between
H , L and 0
0  H L 
rad/sec
1
rad/sec
RC
1
LC
rad/sec
13.
It is a acceptor circuit having Z min  R and
I max
13.
It is a rejector circuit having Z max  R and I min
14.
Q-factor (In terms of inductor)
14.
Q-factor (In terms of inductor)
V
V
X
Q  L  L  L  L
VR V
R
Q  L 
15.
0 L 1 L

R
R C
Q-factor (In terms of capacitor)
Q C  
Q C  
16.
17.
VC X C
1


VR
R
R 0C
1
R
16.
Voltage across capacitor
17.
Voltage across resistor
18.
It is a voltage amplifier circuit
(VL  V , VC  V )
IC
R

 R 0 C
IR XC
C
L
Q-factor (Selectivity)
0
C
R
BW
L
Current through inductor
Current through capacitor
IC  jQI  IC  I 
19.
VR  V
20.
Q-factor (In terms of capacitor)
I L   jQI  I L  I 
VC   jQV VC  V 
19.
R
C
R
0 L
L
Q
VL  jQV VL  V 
18.
Q  L 
Q C   R
0
1 L

BW R C
Voltage across inductor
IL IL
R


IR
I
XL
Q C  
L
C
Q-factor (Selectivity)
Q
15.
Q  L 
Current through resistor
IR  I
20.
It is a current amplifier circuit
( I L  I , IC  I )
Page 3 of 3
21.
Impedance phasor (wrt frequency)
21.
Admittance phasor (wrt frequency)
22.
Voltage phasor (wrt frequency)
22.
Current phasor (wrt frequency)