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Download Implementation of 4x4 Vedic Multiplier using Carry
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Implementation of 4x4 Vedic Multiplier using Carry Save Adder in QuantumDot Cellular Automata Abstract: A multiplier is the basic structural unit of many arithmetic logical units(ALU), digital signal processing(DSP) and communication system. So the area, speed and power consumption are the prime factors for the designing of multiplier circuits. QCA (Quantum dotCellular Automata) is one of the alternatives, which yields small size and low power consumption. In this paper, we proposed a 4-bit Vedic multiplier (using Urdhva Tiryagbhyam sutra) in QCA Technology. The generated partial product addition in Vedic multiplier is realized using carry-save technique. The design is simulated on QCA Designer tool and it confirms the efficiency of the design. The simulation result shows that, the proposed design has reduced more cell count, reduction in area and delay as compared to the 4x4 Wallace and Dadda multiplier. System Configuration:In the hardware part a normal computer where Xilinx ISE 14.3 software can be easily operated is required, i.e., with a minimum system configuration HARDWARE REQUIREMENT Processor - Pentium –III Speed - 1.1 GHz RAM - 1 GB (min) Hard Disk - 40 GB Further Details Contact: A Vinay 9030333433, 08772261612, 9014123891 #301, 303 & 304, 3rd Floor, AVR Buildings, Opp to SV Music College, Balaji Colony, Tirupati - 515702 Email: [email protected] | www.takeoffprojects.com Floppy Drive - 1.44 MB Key Board - Standard Windows Keyboard Mouse - Two or Three Button Mouse Monitor - SVGA SOFTWARE REQUIREMENTS Operating System :Windows95/98/2000/XP/Windows7 Front End : Modelsim 6.3 for Debugging and Xilinx 14.3 for Synthesis and Hard Ware Implementation This software’s where Verilog source code can be used for design implementation. Further Details Contact: A Vinay 9030333433, 08772261612, 9014123891 #301, 303 & 304, 3rd Floor, AVR Buildings, Opp to SV Music College, Balaji Colony, Tirupati - 515702 Email: [email protected] | www.takeoffprojects.com
