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Chapter 5
Bipolar Junction Transistors
Microelectronic Circuit Design
Richard C. Jaeger
Travis N. Blalock
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 1
Chapter Goals
• Explore physical structure of bipolar transistor
• Understand bipolar transistor action and importance of carrier transport
across base region
• Study terminal characteristics of BJT.
• Explore differences between npn and pnp transistors.
• Develop Transport and Ebers-Moll models for bipolar device.
• Define four operation regions of BJT.
• Explore model simplifications for each operation region.
• Understand origin and modeling of Early effect.
• Present SPICE model for bipolar transistor.Provide examples of worstcase and Monte Carlo analysis of bias circuits.
• Discuss bipolar current sources and current mirror.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
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Chap 5 - 2
Physical Structure
• Consists of 3 alternating layers of n- and
p-type semiconductor called emitter (E),
base (B) and collector (C).
• Majority of current enters collector,
crosses base region and exits through
emitter. A small current also enters base
terminal, crosses base-emitter junction
and exits through emitter.
• Carrier transport in the active base
region directly beneath the heavily
doped (n+) emitter dominates i-v
characteristics of BJT.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
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Chap 5 - 3
Transport Model for npn Transistor
• Narrow width of the base region
causes coupling between the two
back to back pn junctions.
• Emitter injects electrons into base
region, almost all of them travel
across narrow base and are
removed by collector
Jaeger/Blalock
7/1/03
• Base-emitter voltage vBE and
base-collector voltage vBC
determine currents in transistor
and are said to be positive when
they forward-bias their
respective pn junctions.
• The terminal currents are
collector current(iC ), base
current (iB) and emitter current
(iE).
• Primary difference between
BJT and FET is that iB is
significant while iG = 0.
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 4
npn Transistor: Forward Characteristics
Base current is given by


v

i  F  S exp BE  1
B 
V  

T  
F
F
20    500 is forward common-emitter
F
I
i










current gain
Emitter current is given by


v





S
BE
i i i 
 1
exp
E C B  
 V


T




F
I
Forward transport current is







v

i  i  I exp BE  1
C F
S
V  
T  





IS is saturation current
1018A  I 10 9 A
S
0.95  
F  1.0 is forward common 1
base current gain
F
In this forward active operation region,
VT = kT/q =0.025 V at room temperature
Jaeger/Blalock
7/1/03
F


i
C 
F
i
B
Microelectronic Circuit Design
McGraw-Hill
i
C 
F
i
E
Chap 5 - 5
npn Transistor: Reverse Characteristics
0    20 is reverse common-emitter
R
current gain
Base currents in forward and reverse modes
are different due to asymmetric doping levels
in emitter and collector regions.
Emitter current is given by


v





S
BC
i 
 1
exp
C
 V


 
T



R
I
Reverse transport current is







v

i  i  I exp BC  1
R
E
S
V  
T  





Base current is given by
R

R  0.95 is reverse common 1
base current gain
R


v

i  R  S exp BC  1
B 
V  

T  
R
R
i
I
Jaeger/Blalock
7/1/03





0 






Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 6
npn Transistor: Complete Transport
Model Equations for Any Bias







v

I
v
v






i  I exp BE   exp BC   S  exp BC 1
C
S
V 
 V

 V  
T 
T   R 

 T  













v

v

I
v




 BE
S
BC
BE
i  I exp
  exp
 
 exp
E
S
V 
 V

 V
T 
T   F 

 T












 
 1
 
 








I
v
v





i  S exp BE  1  S  exp BC 1
B 
V    
 V  
T



F
R
 T  
I










First term in both emitter and collector current expressions give current
transported completely across base region.
Symmetry exists between base-emitter and base-collector voltages in
establishing dominant current in bipolar transistor.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 7
Transport Model Calculations: Example
Evaluating the expressions for
terminal currents,
I  1.07mA
C
I 1.09mA
E
• Problem: Find terminal voltages and
currents.
• Given data: VBB = 0.75 V, VCC = 5.0
V, IS =10-16 A, F =50, R =1
• Assumptions: Room temperature
operation, VT =25.0 mV.
• Analysis: VBE =0.75 V,
VBC = VBB- VCC =0.75 V-5.00V=-4.25 V
Jaeger/Blalock
7/1/03
I
B
 21.04A
I
1.07mA
 C
 50
F I
0.0214mA
B
I
  C  1.07mA  0.982
F I
1.09mA
E

Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 8
pnp Transistor: Structure
• Voltages vEB and vCB are positive when they forward bias their
respective pn junctions.
• Collector current and base current exit transistor terminals and
emitter current enters the device.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 9
pnp Transistor: Forward Characteristics
Base current is given by

v

I 



S
F
EB
i 

 1
exp
B 
 V


 
T



F
F
i
Emitter current is given by
Forward transport current is







v


EB
i  i  I exp
 1
C F
S
V  
T  
Jaeger/Blalock
7/1/03





















v

i  i  i  I 1
exp EB  1
E C B
S
V  

T  
F
Microelectronic Circuit Design
McGraw-Hill
1





Chap 5 - 10
pnp Transistor: Reverse Characteristics
Base current is given by

v

I 



S
F
CB
i 

 1
exp
B 
 V


 
T



R
R
i
Emitter current is given by
Reverse transport current is







v


CB
i  i  I exp
 1
R
E
S
V  
T  
Jaeger/Blalock
7/1/03





















v

i   I 1
exp CB  1
C
S
V  

T  
R
Microelectronic Circuit Design
McGraw-Hill
1





Chap 5 - 11
pnp Transistor: Complete Transport
Model Equations for Any Bias







v

I
v
v






S
CB
i  I exp EB   exp CB  
1
 exp
C
S
V 
 V

 V  
T 
T   R 

 T  



















v

I
v
v






S
EB 1
i  I exp EB   exp CB  
 exp
E
S
V 
 V

 V  
T 
T   F 

 T  



















I
v
v



i  S exp EB  1  S  exp CB  1
B 
V    
 V  
T



F
R
 T  
I
Jaeger/Blalock
7/1/03










Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 12
Circuit Representation for Transport
Models
In npn transistor (expressions analogous for pnp transistors), total current
traversing base is modeled by current source given by:






v

v



BC
BE
i  i  i  I exp
  exp

T F R
S
V 
 V

T 
T 






Diode currents correspond directly to 2 components of base current.



v

I 
v




i  S exp BE  1  S exp BC  1
B 
V    
 V


T
T






F
R
I
Jaeger/Blalock
7/1/03










Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 13
Ebers-Moll Model
Forward characteristics (npn transistor)









v

I
v






S
BE
BE
i 
exp
I
 S
 1  I
 1
exp
where
E 
ES 
ES 
V  
 V


T
T






F
F




v

v









BE
BE
i  I exp
I
exp
 1  

 1

F ES 
C
S
 V

 V

T  
T  




I





Reverse characteristics (npn transistor)









v

I
v






S
BC
BC
i 
exp
 S
 1   I
 1 where I
exp
C
CS 
CS 
V  
 V



T
T






R
R
I














v

v





BC  1
i   I exp BC  1   I
exp
E
R CS 
S
V  
 V

T  
T  


Jaeger/Blalock
7/1/03





Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 14
Ebers-Moll Model (contd.)
Complete Ebers-Moll equations (npn transistor) are given by combining
forward and reverse characteristics:








v
v





BC 1
i I
exp BE  1  I
 exp
E
R CS 
ES
V  
 V  
T  

 T  




















v
v





BC
BE
i  I
exp
1
 1  I
 exp
F ES
C
V   CS 
 V  
T  

 T  





 I





F ES


 I
R CS








v
v










BC
BE
I
i  i  i  1  I
exp
exp

1
 1  1


 CS
B E C 
V   
F  ES
R





V
T  

 T  





Jaeger/Blalock
7/1/03





Microelectronic Circuit Design
McGraw-Hill


Chap 5 - 15
Ebers-Moll Model (contd.)
Complete Ebers-Moll equations (pnp transistor) are given by:








v
v





CB 1
i I
exp EB  1  I
 exp
E
R CS 
ES
V  
 V  
T  

 T  




















v
v





CB
EB
i  I
exp
1
 1  I
 exp
F ES
C
V   CS 
 V  
T  

 T  




















v
v







 CB  1
i  1  I
exp EB  1  1  I
 exp
B 
V   
F  ES
R  CS 
 V  
T  

 T  





Jaeger/Blalock
7/1/03





Microelectronic Circuit Design
McGraw-Hill


Chap 5 - 16
Operation Regions of Bipolar Transistor
Base-emitter junction
Forward Bias
Reverse Bias
Jaeger/Blalock
7/1/03
Base-collector junction
Reverse Bias
Forward Bias
Forward active region
Saturation region
(Normal active region)
(Not same as FET
(Good Amplifier)
saturation region)
(Closed switch)
Cutoff region
Reverse-active region
(Open switch)
(Inverse active region)
(Poor amplifier)
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 17
i-v Characteristics of Bipolar Transistor:
Common-Emitter Output Characteristics
For iB=0, transistor is cutoff. If iB >0, iC also
increases.
For vCE > vBE, npn transistor is in forward active
region, iC = F iB is independent of and vCE.
For vCE< vBE, transistor is in saturation.
For vCE< 0, roles of collector and emitter
reverse.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 18
i-v Characteristics of Bipolar Transistor:
Common-Base Output Characteristics
For vCB > 0, npn transistor is in forward active
region, iC = iE is independent of and vCE.
For vCB< 0, base-collector diode becomes
forward-biased and iC grows exponentially (in
negative direction) as base-collector diode
begins to conduct.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 19
i-v Characteristics of Bipolar Transistor:
Common-Emitter Transfer Characteristic
Defines relation between collector current
and base-emitter voltage of transistor.
Almost identical to transfer characteristic
of pn junction diode
Setting vBC =0 in the collector-current
expression,







v

i  I exp BE  1
C
S
V  
T  
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill





Chap 5 - 20
Junction Breakdown Voltages
• If reverse voltage across either of the two pn junctions in the transistor
is too large, corresponding diode will break down.
• Emitter is most heavily doped region and collector is most lightly
doped region.
• Due to doping differences, base-emitter diode has relatively low
breakdown voltage (3 to 10 V). Collector-base diode can be designed
to break down at much larger voltages.
• Transistors must be selected in accordance with possible reverse
voltages in circuit.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 21
Minority Carrier Transport in Base
Region
• BJT current dominated by diffusion
nbo is equilibrium electron density in pof minority carriers (electrons in npn
type base region.
and holes in pnp transistors) across
base region.
• Base current consists of hole
injection back into emitter and
collector and small additional current
to replenish holes lost to
recombination with electrons in base.
• Minority carrier concentrations at the
2 ends of base region are:






v

v



BE
BC
n(0)  n exp
 n(W )  n
exp


V 
bo
B
bo
 V

T 
 T 
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 22
Minority Carrier Transport in Base
Region (contd.)
• For narrow base, minority carrier density decreases linearly across
base, diffusion current in base is:
n
qADn n 2
i
I  qADn bo 
S
W
N
W
B
AB B
NAB= doping concentration in base
ni2= intrinsic carrier concentration (1010/cm3)
nbo = ni2 / NAB
•
p
qAD p n 2
i
bo 
Saturation current for pnp transistor is I S  qAD p
W
N
W
B
DB B
• Due to higher mobility of electrons than holes, npn transistor conducts
higher current than pnp for given set of applied voltages.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 23
Base Transit Time
• Forward transit time is the time constant
associated with storing minority-carrier charge
Q required to establish career gradient in base

W
v

region.




Q  qAn  exp BE  1 B
 2
bo
 V

T  




v

qADn




i 
n  exp BE  1

T
bo
 V


W
T




B
2
W 2
Q WB
B
 


F I
2 Dn 2V n
T
T
• Base transit time places upper limit on useful
operating frequency of transistor.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 24
Diffusion Capacitance
• For vBE and hence iC to change, charge stored in base region must also
change.
• Diffusion capacitance in parallel with forward-biased base-emitter
diode models the change in charge with vBE.
v

I


dQ
1 qAnboWB
BE
C 

exp
 T 
D dv
 V

V
2
V F
T


BE Q  point
T
T
• Since transport current normally represents collector current in
forward-active region,
I
C  C
D
Jaeger/Blalock
7/1/03
V F
T
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 25
Simplified Cutoff Region Model
If we assume that
4kT
v

BE
q
4kT
v

BC
q
where -4kT/q = -0.1 V, then the
transport model terminal current
equations simplify to
I
In cutoff region both junctions are
reverse-biased, transistor is said to
be in off state
vBE <0, vBC <0
Jaeger/Blalock
7/1/03
i  S
C

R
I
i  S
E

F
I
I
S
i 
 S
B


F
R
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 26
Simplified Cutoff Region Model
(Example)
•
•
•
•
Problem: Estimate terminal currents using simplified transport model
Given data: IS =10-16 A, F = 0.95, R = 0.25, VBE = 0 V, VBC = -5 V
Assumptions: Simplified transport model assumptions
Analysis: From given voltages, we know that transistor is in cutoff.







1
I  I 1
C
S








I
 S  4 1016A

R
R
I  I  1016A
E
S
I
I   S  31016A
B

R
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 27
Simplified Forward-Active Region
Model
In forward-active region, emitter-base junction is forward-biased and
collector-base junction is reverse-biased. vBE > 0, vBC < 0
4kT
4kT
If we assume that v

 0.1V v

 0.1V
BE
q
BC
q
then the transport model terminal current equations simplify to

v

I
v



S
BE
BE
i  I exp
 I exp


C
S
S
V  
 V

T 
T


R
v

v

I
I
I




S
S
S
BE
BE
i 
exp

exp


E 
V
 V





T
T




F
F
F
v

v

I
I
I
I




S
S
S
S
BE
BE
i 
exp


exp


B 
V
 V






T
T




F
F
R
F





i  i
FE
C
i  i
FB
C
i  (  1)i
E
F
B
BJT is often considered a current-controlled device, though fundamental
forward active behavior suggests a voltage- controlled current source.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 28
Simplified Forward-Active Region
Model (Example 1)
• Problem: Estimate terminal currents and base-emitter voltage
• Given data: IS =10-16 A, F = 0.95, VBC =VB - VC= -5 V, IE =100 A
• Assumptions: Simplified transport model assumptions, room
temperature operation, VT = 25.0 mV
• Analysis: Current source forward-biases base-emitter diode, VBE > 0,
VBC < 0, we know that transistor is in forward-active operation region.
I   I  0.95100μA  95μA
F E
C

  F  0.95  19
F 1
1 0.95
F
I
E  100μA  5μA
I 
B  1
20
F
 I
V
V ln F E  0.69V
BE
T
I
S
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
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Chap 5 - 29
Simplified Forward-Active Region Model
(Example 2)
• Problem: Estimate terminal currents, base-emitter and base-collector
voltages.
• Given data: IS =10-16 A, F = 0.95, VC= +5 V, IB =100 A
• Assumptions: Simplified transport model assumptions, room
temperature operation, VT = 25.0 mV
• Analysis: Current source causes base current to forward-bias baseemitter diode, VBE > 0, VBC <0, we know that transistor is in forward-active
operation region.
I   I 19100μA 1.90mA
F B
C
I  ( 1)I  20100μA  2.00mA
E
F
B
I
V
V ln C  0.764V
BE
T I
S
V
V V V
V  4.24V
B
BE
BC
C
C
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
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Chap 5 - 30
Simplified Circuit Model for ForwardActive Region
• Current in base-emitter diode is amplified by common-emitter current gain
F and appears at collector,base and collector currents are exponentially
related to base-emitter voltage.
• Base-emitter diode is replaced by constant voltage drop model(VBE = 0.7 V)
since it is forward-biased in forward-active region.
• Dc base and emitter voltages differ by 0.7 V diode voltage drop in forwardactive region.
Jaeger/Blalock
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Microelectronic Circuit Design
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Chap 5 - 31
-Cutoff Frequency, Transconductance
and Transit Time
• Forward-biased diffusion and reverse-biased pn junction capacitances of
BJT cause current gain to be frequency-dependent.
• Unity gain frequency is frequency at which current gain is unity


f = fT / F is -cutoff frequency
F
F
( f )

1








F
f
T
f







2
1







f
f
B







2
• Transconductance is defined by:

V
di
d

C
gm 

I exp BE
 S
 V
dV
dV
BE Q  point
BE 
 T
• Transit time is given by: 
Jaeger/Blalock
7/1/03
F

C

I

 C
V
 
T
  Q  point
D
gm
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 32
Simplified Forward-Active Region
Model (Example 3)
•
•
•
•
Problem: Find Q-point
Given data: F = 50, R = 1 VBC =VB - VC= -9 V
Assumptions: Forward-active region of operation, VBE = 0.7 V
Analysis:
 8200I V
0
BE
E
EE
8.3V
I 
 1.01mA
E 8200
I
E  1.02mA  19.8A
I 
B  1
51
F
I   I  0.990mA
F B
C
V
V
 (V
)  9  0.7  9.7V
BE
CE
CC
V
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 33
Simplified Reverse-Active Region
Model
In reverse-active region, basecollector diode is forward-biased
and base-emitter diode is reversebiased.
i  i
E
RC
i   i
E
RB
Simplified equations are:
I
v



S
BC
i 
exp

C
V



T


R
v



i   I exp BC 
E
 V

T 

v

I


S
BC
i 
exp

B 
 V

T


R
S
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 34
Simplified Reverse-Active Region
Model
• Problem: Find Q-point
• Given data: F = 50, R = 1 VBE =VB - VE = -9 V. Combination of R and
the voltage source forward biases base-collector junction.
• Assumptions: Reverse-active region of operation, VBC = 0.7 V
• Analysis:
 0.7V - (-9V)
 1.01mA
8200
I
1.01mA
I  C 
 0.505mA
B  1
2
R
 I  I  0.505mA
E
B
I 
C
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 35
Simplified Saturation Region Model
• In saturation region, both junctions are forward-biased and transistor
operates with small voltage between collector and emitter. vCESAT is
saturation voltage for npn BJT.
v

v

I
I

v

I




v
S
S



BC
BE
i

exp

exp




S
BC
BE
i  I exp
exp


B
V
V






C
S
V  
 V

T
T




T 
T 

F
R
R


i


C


1



i
(  1)i 
 1 

R
B  for i  C
v
V ln 

B 

T
CESAT
i

  

F
R  1 C




 i

F B 






No simplified expressions exist for
terminal currents other than iC + iB = iE.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 36
Early Effect and Early Voltage
• As reverse-bias across collector-base junction increases, width of collectorbase depletion layer increases and width of base decreases (base-width
modulation).
• In practical BJT, output characteristics have a positive slope in forwardactive region, collector current in not independent of vCE.
• Early effect: When output characteristics are extrapolated back to point of
zero iC, curves intersect at common point vCE = -VA (Early voltage) which
lies between 15 V and 150 V.


v


1  CE 
• Simplified equations (including Early effect):   


F
FO 







v
i  I exp BE
C
S
 V
 T
Jaeger/Blalock
7/1/03

  v
 1 CE 
 
V 
 
A 






V
A
v
i  S exp BE
B 
 V
 T
FO
Microelectronic Circuit Design
McGraw-Hill
I






Chap 5 - 37
BJT SPICE Model
• Besides capacitances associated with the
physical structure, additional components
are: diode current iS, capacitance CJS,
related to the large area pn junction that
isolates collector form substrate and one
transistor form next.
• RB is resistance between external base
contact and intrinsic base region.
• Collector current must pass through RC
on its way to active region of collectorbase junction.
• RE models any extrinsic emitter
resistance in device.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
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Chap 5 - 38
BJT SPICE Model Typical Values
Saturation Current = 3 e-17 A
Forward current gain = 100
Reverse current gain = 0.5
Forward Early voltage = 75 V
Base resistance = 250 
Collector Resistance = 50 
Emitter Resistance = 1 
Forward transit time = 0.15 ns
Reverse transit time = 15 ns
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
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Chap 5 - 39
High Performane BJTs
• Modern BJTs use combination of shallow and deep trench isolation
processes to reduce device capacitances and transit times.
• Have polysilicon emitters, narrow bases or SiGe base regions.
• SiGe transistors exhibit cutoff frequencies > 100 GHz.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
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Chap 5 - 40
Biasing for BJT
• Goal of biasing is to establish known Q-point which in turn establishes
initial operating region of transistor.
• In BJT, Q-point is represented by (IC, VCE) for npn transistor or (IC, VEC)
for pnp transistor.
• Q-point controls values of diffusion capacitance, transconductance,
input and output resistances.
• In general, during circuit analysis, we use simplified mathematical
relationships derived for specified operation region and Early voltage is
assumed to be infinite.
• The practical biasing circuits used for BJT are:
– Four-Resistor Bias network
– Two-Resistor Bias network
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 41
Four-Resistor Bias Network for BJT
R
RR
1
V
V
R
 1 2
EQ
CC R  R
EQ R  R
1
2
1 2
V
R
I V
R I
BE
E E
EQ
EQ B
4  12,000I  0.7 16,000(  1) I
B
F
B
4V - 0.7V
I 
 2.68μA
I   I  201μA
B
F B
C
6
1.2310 
I  ( 1)I  204μA
E
F
B
V
V
R I R I
E E
CE
CC
C C


R 
V
  R  F  I  4.32V
CC  C   C

F 

Q-point is (250 A, 4.17 V)
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 42
Four-Resistor Bias Network for BJT
(contd.)
• All calculated currents > 0, VBC = VBE - VCE = 0.7 - 4.32 = - 3.62 V
• Hence, base-collector junction is reverse-biased, assumption of forwardactive region operation is correct.


R 
• Load-line for the circuit is: V
V
  R  F  I  12 38,200I
CE
CC  C   C
C



F

The two points needed to plot the load
line are (0, 12 V) and (314 A,
0).Resulting load line is plotted on
common-emitter output characteristics.
IB= 2.7 A, intersection of corresponding
characteristic with load line gives Qpoint.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 43
Four-Resistor Bias Network for BJT:
Design Objectives
• We know that
V
I
E
 EQ
V
R
I
V
V
BE
BE for R
EQ B  EQ
I  (V
V
)
BE
EQ B
EQ
R
R
E
E
• This implies that IB << I2. So that I1 = I2. So base current doesn’t
disturb voltage divider action. Thus, Q-point is independent of base
current as well as current gain.
• Also, VEQ is designed to be large enough that small variations in VBE
assumed value of won’t affect IE.
• Current in base voltage divider network is limited by choosing I  I / 5
2 C
This ensures that power dissipation in bias resistors is < 17 % of total
quiescent power consumed by circuit and I2 >> IB for >50.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 44
Four-Resistor Bias Network for BJT:
Design Guidelines
• Choose Thevenin equivalent base voltage VCC V
4
V
 CC
EQ
2
V
• Select R1 to set I1 = 9IB.
• Select R2 to set I2 = 10IB.
R  EQ
1 9I
B
V
V
CC
EQ
R 
2
10 I
B
• RE is determined by VEQ and desired IC.
V
BE
EQ
R 
E
I
C
V
V
V
CE  R
E
I
C
• RC is determined by desired VCE. R  CC
C
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 45
Four-Resistor Bias Network for BJT:
Example
•
•
•
•
Problem: Design 4-resistor bias circuit with given parameters.
Given data: IC =750 A, F = 100, VCC = 15 V, VCE = 5 V
Assumptions: Forward-active operation region, VBE = 0.7 V
Analysis: Divide (VCC - VCE) equally between RE and RC.Thus, VE =5 V
and VC =10 V
V
V
CC
C  6.67kΩ
R 
C
I
C
V
R  E  6.60kΩ
E I
E
V  V V
 5.7V
B
E
BE
I
I  C  7.5A
B 
F
Jaeger/Blalock
7/1/03
I  10I  75A
B
2
I  9 I  67.5A
B
1
V
R  B  84.4kΩ
1 9I
B
V
V
B  124kΩ
CC
R 
2
10I
B
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 46
Two-Resistor Bias Network for BJT:
Example
• Problem: Find Q-point for pnp transistor in 2-resistor bias circuit with
given parameters.
• Given data: F = 50, VCC = 9 V
• Assumptions: Forward-active operation region, VEB = 0.7 V
• Analysis:
9 V
18,000I 1000( I  I )
EB
B
B
C
9 V
18,000I 1000(51) I
EB
B
B
9V  0.7V
 120μA
B 69,000
I  50I  6.01mA
B
C
I

V
 9 1000( I  I )  2.88V
B
C
 2.18V
V
EC
EC
Q-point is : (6.01 mA, 2.88 V)
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 47
BJT Current Mirror
• Collector terminal of a BJT in forwardactive region mimics behavior of a
current source.
• Output current is independent of VCC as
long as VCC > 0. Thus, BJT is in forwardactive region, since VBC =- VCC.
• Q1 and Q2 are assumed to be matched
(with identical IS, F, R, VA,)
V
V
BB
BE  I  I  I
I

REF
C1 B1 B2
R
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 48
BJT Current Mirror (contd.)








  V
V

I


 1 CE1   2 S exp BE 


 
 V 
V



 
 T 
A 
FO 
V
1 CE 2



V
  V
V




CE
2


BE
A


I
 I exp
1
I



REF
C2
S
V
 V  
V
2

1 BE 

 T  
A 
V

V
A
FO
1 CE 2
I
V
O
A
MR 

V
I
2
REF 1 BE 
V

A
FO
V
I
 I exp BE
REF
S
 V
 T
With infinite FO and VA, mirror ratio is unity. Finite current gain and Early
voltage introduce mismatch in output and reference current of mirror
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 49
BJT Current Mirror: Example
•
•
•
•
Problem: Find output current for given current mirror
Given data: FO = 75, VA = 50 V
Assumptions: Forward-active operation region, VBE = 0.7 V
Analysis:
V
V
BE  12V  0.7V  202A
REF
R
56kΩ
1 12
75  223A
I  MR.I
 (202A)
REF
O
0.7
1
 2
75 50
I
Jaeger/Blalock
7/1/03
 BB
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 50
BJT Current Mirror: Altering Mirror
Ratio
A
E
I I
S
SO A
where ISO is saturation current of BJT with
one unit of emitter area: AE =1(A). Actual
dimensions of A are technology-dependent.
Mirror ratio of BJT current mirror can be changed by changing relative
sizes of emitters in the transistors. For ideal case, mirror ratio is
determined only by ratio of the two emitter areas.
V
1 CE 2
V
A
I  n.I
REF
O
V
2
1 BE 
V

A
FO
Jaeger/Blalock
7/1/03
A
n  E2
A
E1
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 51
BJT Current Mirror: Output Resistance
• Current source using BJT doesn’t have an output current that is
completely independent of terminal voltage across it, due to finite early
voltage. Current source seems to have resistive component with it.
V
v
1 CE 2
1 o
V
V
A
A
io  i
I
I
REF
REF
C2
V
V
2
2
BE
1

1 BE 
V

V

A
FO
A
FO
Ro 







io
vo
Q  pt







1







Io
V V
A O






1
V
 A
I
O
• Ro is the small signal output resistance of the current mirror.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 52
Tolerances-Worst-Case Analysis:
Example
• Problem: Find worst-case values of IC and VCE.
• Given data: FO = 75 with 50% tolerance, VA = 50 V, 5 % tolerance on
VCC, 10% tolerance for each resistor.
V
V
BE
EQ
• Analysis:
I I 
C
E
R
E
To maximize IC , VEQ should be maximized,
RE should be minimized and opposite for
minimizing IC.
Extremes of RE are: 14.4 k and 17.6 k.
R
1
V
V
EQ
CC R  R
1
2
To maximize VEQ, VCC and R1 should be
maximized, R2 should be minimized and
opposite for minimizing VEQ.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 53
Tolerances-Worst-Case Analysis:
Example (contd.)
Extremes of VEQ are: 4.78 V and 3.31 V.
Using these values, extremes for IC are: 283 A and 148 A.
V
V
BE R
EQ
V
V
 R I  R I V
R I 
E E
CE
CC
C C
CC
C C
R
E
V
V
 R I V
V
BE
CE
CC
C C
EQ
E
To maximize VCE, IC and RC should be minimized, and opposite for
minimizing VEQ.
Extremes of VCE are: 7.06 V (forward-active region)
and 0.471 V (saturated, hence calculated values for
VCE and IC actually not correct).
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 54
Tolerances-Monte Carlo Analysis
• In real circuits, it is unlikely that various components will reach their
extremes at the same time, instead they will have some statistical
distribution. Hence worst-case analysis overestimates extremes of
circuit behavior.
• Monte Carlo analysis, values of each circuit parameter are randomly
selected from possible distributions of parameters and used to analyze
the circuit.
• Several random parameter sets are generated, the statistical behavior of
circuit is built up from analysis of many test cases.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 55
Tolerances-Monte Carlo Analysis:
Example
• Full results of Monte Carlo analysis of 500 cases of the 4-resistor bias
circuit yields mean values of 207 A and 4.06 V for IC and VCE
respectively which are close to values originally estimated from
nominal circuit elements. Standard deviations are 19.6 A and 0.64 V
respectively.
Jaeger/Blalock
7/1/03
Microelectronic Circuit Design
McGraw-Hill
Chap 5 - 56