Download Crack-guided effect on dynamic mechanical stress for foldable low

Microelectronics Reliability 64 (2016) 84–87
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Microelectronics Reliability
journal homepage: www.elsevier.com/locate/microrel
Crack-guided effect on dynamic mechanical stress for foldable low
temperature polycrystalline silicon thin film transistors
Sang Myung Lee, Chuntaek Park, Ilgu Yun ⁎
Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Republic of Korea
a r t i c l e
i n f o
Article history:
Received 26 June 2016
Accepted 7 July 2016
Available online 18 September 2016
Keywords:
Foldable device
Crack guidance
Dynamic mechanical stress test
Reliability
a b s t r a c t
In the thin film transistors (TFTs) device research for foldable display, the degradation effect by the mechanical
stress is crucial. Here, the crack position is critical for TFT reliability. However, it is difficult to characterize the
crack position due to the random generation of the crack by mechanical stress. In this paper, the crack-guided
low temperature polycrystalline silicon (LTPS) TFT test structures are fabricated and the crack-guided effects
on mechanical stress of the tested TFT structure are analyzed. To strain on the foldable LTPS TFTs, 50,000 cycles
of tensile and parallel direction dynamic mechanical stresses were applied with 2.5-mm bending radius. Based on
the results, the generating crack position can be guided and controlled and also TFT reliability for foldable display
can be enhanced.
© 2016 Elsevier Ltd. All rights reserved.
1. Introduction
2. Experiments and measurements
The low temperature polycrystalline silicon (LTPS) thin film transistor (TFT) is the attractive active material for the use in foldable display
because of the high mobility characteristic and low fabrication temperature. To use this foldable TFT device in the industry, the stress tests are
required to guarantee the device reliability. Here, the mechanical stress
is one of the main stresses, which can impact on the foldable device operation, and it can generate cracks on the foldable TFT resulted in a device failure. These effects are critical because they can generate defects
or cracks in TFTs that degrade operation characteristics and reliability.
Many studies have focused on the influence of compressive [1] or tensile
[2] stress on the TFTs with a single type of a mechanical stress direction.
However, the crack is randomly generated on the foldable TFT. Especially, a crack which generated on TFT area makes degradation or failure of
the device characteristic. If the crack position is controlled, the TFT reliability can be enhanced. However, previously the control methodology
of the position for randomly generated cracks on the foldable TFT has
not been investigated.
In this paper, the crack-guided tested LTPS TFT structures are fabricated to examine the effect of crack guidance on the TFT reliability. To
confirm the effect, the results of the dynamic mechanical stress test on
the tested LTPS TFTs are analyzed. A guideline for reliable circuit design
is then proposed based on the results of these tests.
2.1. Device structure and measurement conditions
⁎ Corresponding author.
E-mail address: [email protected] (I. Yun).
http://dx.doi.org/10.1016/j.microrel.2016.07.056
0026-2714/© 2016 Elsevier Ltd. All rights reserved.
The tested n-type LTPS TFTs in this work are fabricated on a polyimide (PI) substrate with Cu/MoTi used as the gate. Here, a SiO2 layer is
used as a gate insulator and the polycrystalline silicon active layer is
formed on bottom of the SiO2 layer. Finally, the Cu/MoTi source and
drain electrodes are deposited. The width/length ratio for the tested
TFTs is 0.152, which indicates the test structure has much longer channel length because longer channel length device has higher possibility
to generate cracks on the channel than short channel length device during the mechanical stress which is parallel direction strain. This based
on beam theory, and the length dependent critical strain can be
known as the following Eq. (1) [3]:
2
εcritical ¼
π2 hs
:
12L
ð1Þ
where hs is the substrate thickness. If the device forced high strain
which over the critical strain, the crack will be generated. According to
the Eq. (1), channel length increases, the critical strain is decreased.
Therefore, if the devices have the same structure except the channel
length, the crack is easily generated on the longer channel length due
to the small critical strain value.
Fig. 1 shows the schematic diagram of the tested n-type LTPS TFTs
with top-gate, top-contact structure. The current-voltage (I–V) characteristics of TFTs are measured using a Keithley 236 source measure
unit (SMU). The measurement is performed when the drain voltage
(VDS) is 2.1 V, the gate voltage (VGS) is swept from − 10 V to 15 V.
S.M. Lee et al. / Microelectronics Reliability 64 (2016) 84–87
Fig. 1. Schematic structure of the tested LTPS TFTs.
Here, VDS is set to be 2.1 V in this experiment since the drain voltage of
2.1 V shows clear differences on the degraded device operation characteristics by the mechanical stress test compared with the low drain
voltage.
2.2. Mechanical stress and crack guidance
The dynamic mechanical stress is applied using the flexible materials
tester of Hansung systems incorporation shown in Fig. 2(a). In this
work, 2.5-mm bending radius (2.5R) with 50,000 bending cycles is
used for the dynamic mechanical stress experiment, and the applied
strain is tensile and parallel direction to the current path.
To calculate the strain of the stress on the foldable TFTs, we assume
that the strain is applied to the tested TFT where a neutral plane is
formed in the middle of the total thickness. Using this approximation,
the strain on the TFT device can be calculated as the following equation
[4]:
ε¼
t substrate þ t TFT
;
2R
ð2Þ
Fig. 2. (a) Dynamic mechanical stress tester; (b) pencil hardness tester.
where ε is strain on the tested device, tsubstrate is thickness of the substrate, tTFT is the total stacked thickness of the TFT, and R is the bending
radius.
With this Eq. (2), the calculated strain for this dynamic mechanical
stress on the tested TFT is 0.37%.
The crack guidance is formed using the pencil hardness tester of
Ocean Science Company shown in Fig. 2(b). To generate crack guidance
with this equipment, the ISO-15184 instruction is followed in general.
The gold material tip is used for the pencil and the 100-gram weight is
used for the pattern generation to avoid film destruction by the gold
material tip.
3. Result and discussion
The dynamic mechanical stress causes device failure due to the generated crack on the TFTs. Generally, the cracks are randomly generated,
and that generated cracks usually cannot be controlled the position. To
analyze the effects of the crack guidance, the dynamic mechanical stress
test had done first without crack-guided structure on tested TFTs. That
result is shown in Fig. 3.
To analyze the experiment results, the on-current (Ion), the turn-on
voltage (Von), the mobility (μFE), and the subthreshold swing (Ssub) are
calculated with the normalized average and the standard deviation. In
this paper, the on-current is defined as the drain current corresponding
Fig. 3. The dynamic mechanical stress results without crack guidance.
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S.M. Lee et al. / Microelectronics Reliability 64 (2016) 84–87
to the VGS = 15 V and VDS = 2.1 V. Also, to the field effect mobility in the
linear region is calculated as [5]:
μ¼
LGm
:
WC i V DS
ð3Þ
The threshold voltage cannot be calculated with degraded data after
mechanical stress. Therefore, the turn-on voltage was used for an electrical characteristic analyzing. The normalized on-current is calculated
as:
N Ion ¼
Ion;Bending
;
Ion;Initial
ð4Þ
where N_Ion is normalized on-current, Ion,Initial is the on-current without
the mechanical stress, and Ion,Bending is the on-current following bending
cycles. The other normalized parameters are also calculated with this
method.
In this mechanical stress test, the strain direction is parallel to current path, and channel length is much longer than channel width.
Therefore, the crack generation is much easier. The generated crack on
the device disturbs current flow on the channel and it degrades the device characteristics [6].
For that reasons, the dynamic mechanical stress test result also
shows degraded characteristics of the TFTs in Fig. 3.
After the dynamic mechanical stress tests without crack-guided
structure, the same experiment was repeated with a crack-guided
structure on the TFT device. The dynamic mechanical stress test result
with generated crack guidance is shown in Fig. 4. The bold line is
crack guidance, and the thin three lines are generated crack. In the result, crack was generated around crack guidance and there were not
cracks on the TFT device.
In the dynamic mechanical stress test result without crack guidance,
the on-current decreased about 10% due to the generated crack on the
TFT. Also, turn-on voltage also increased. However, there is almost no
degradation on crack guidance device and that result shown in Fig. 5.
The other parameters have also the same tendency. It indicates that
the device with the crack guidance is not degraded with the dynamic
mechanical stress test.
The reason is crack guidance become a crack seed, and the stress intensity factor at any point along the crack front in a finite thickness plate
can be expressed with followed Eq. (5) [7]:
rffiffiffiffiffiffiffiffi
a
K ¼ St þ H j Sb
π Fj
Q
ð5Þ
where K is the stress intensity factor, St is the remote uniform tension
stress, Hj is the bending multiplier on stress intensity for remote bending, Sb is the remote bending stress on outer fiber, a is the depth of
Fig. 5. The dynamic mechanical stress results with crack guidance.
crack, Q is the shape factor for elliptical crack, and Fj is the boundarycorrection factor on stress intensity for remote tension. It can be concluded that around crack guidance, the stress intensity is higher than
the TFT area resulted in the reduction of a probability of the crack generation on the TFT.
In addition, increasing the bending cycles of dynamic mechanical
stress causes deeper crack generation on the substrate with followed
Eq. (6) [8]:
da
¼ CΔK n
dN
ð6Þ
where a is the depth of surface crack, N is the number of cycles, C is the
crack growth coefficient, and K is the stress intensity factor.
Therefore, if the crack-guided structure is placed on the foldable display circuit on the uncritical area, the probability of the crack generation
on TFTs will be reduced. Finally, the reliability of the foldable TFT by the
mechanical stress is enhanced with the crack guidance.
4. Conclusion
In this paper, reliability characteristics of the foldable TFT were analyzed with different crack generating conditions. To strain on the foldable LTPS TFT, the 50,000 cycles of the dynamic mechanical stress
with the tensile and parallel direction were applied with 2.5-mm radius.
The results of the dynamic mechanical stress tests without crack guidance generated cracks on the TFTs resulted in the degradation of the
TFT characteristics. On the other hand, the TFT test structure with the
crack-guided test pattern did not degrade the device operation, and
crack generated only around crack guidance. Based on the result, the reliability of the foldable TFTs can be enhanced with the crack-guided
structure. However, the controlled crack guidance structure should be
further studied such as its shape, depth, and width, which remains as
a future work.
Acknowledgements
Fig. 4. The crack guidance result of the 2.5R curvature dynamic mechanical stress test on
the LTPS TFTs (Inset: microscopic magnifying view of the crack-guided area).
This research was supported by the LG Display (2014-11-1905). This
work was also supported by Institute of BioMed-IT, Energy-IT and
Smart-IT Technology (BEST), a Brain Korea 21 plus program, Yonsei University (2016-11-0007).
S.M. Lee et al. / Microelectronics Reliability 64 (2016) 84–87
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