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EST7610
PC Power Supply Supervisor
GENERAL DESCRIPTION
The EST7610 provides protection circuits, power good output (PGO), fault protection latch
(FPL_N), and a protection detector function (PDON_N) control. It can minimize external components of
switching power supply systems in personal computer.
The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level. The Under Voltage
Detector (UVD) monitors 3.3V, 5V input voltage level. When OVD or UVD detect the fault voltage level,
the FPL_N is latched HIGH and PGO go low. The latch can be reset by PDON_N go HIGH. There is
2.4 ms delay time for PDON_N turn off FPL_N.
When OVD and UVD detect the right voltage level, the power good output (PGO) will be issue.
FEATURES
•
•
•
•
•
•
•
•
The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level.
The Under Voltage Detector (UVD) monitors 3.3V, 5V input voltage level.
Both of the power good output (PGO) and fault protection latch (FPL_N) are Open Drain Output.
75 ms time delay for UVD.
300 ms time delay for PGO.
38 ms for PDON_N input signal De–bounce.
73 us for internal signal De–glitches.
2.4 ms time delay for PDON_N turn-off FPL_N.
PIN ASSIGNMENT AND PACKAGE TYPE
PGI
1
8
PGO
GND
2
7
VCC
FPL_N
3
6
V5
PDON_N
4
5
V33
ORDERING INFORMATION
PACKAGE
MARKING
()
PACKING
8–Pin Plastic DIP
EST7610A
Tube
8–Pin Plastic SOP
EST7610AS
Tube or Tape&Reel
※(●)
PIN DESCRIPTION
Pin No. Pin Name TYPE
Description
1
PGI
I
power good input pin
2
GND
P Ground
3
FPL_N
O fault protection latch output pin(open drain output)
4
PDON_N
I
protection detector function ON/OFF control input pin
5
V33
I
3.3V input pin
6
V5
I
5V input pin
7
VCC
I
Supply voltage / 12V input pin
8
PGO
O power good output pin(open drain output)
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2006-01-A
EST7610
PC Power Supply Supervisor
FUNCTION TABLE
PGI
< 0.95V
< 0.95V
< 0.95V
0.95 < PGI < 1.2
0.95 < PGI < 1.2
0.95 < PGI < 1.2
PGI > 1.2
PGI > 1.2
PGI > 1.2
x
x = don’t care
PDON_N
L
L
L
L
L
L
L
L
L
H
UV
no
no
yes
no
no
yes
no
no
yes
x
OV
no
yes
no
no
yes
no
no
yes
no
x
FPL_N
L
H
L
L
H
H
L
H
H
H
PGO
L
L
L
L
L
L
H
L
L
L
BLOCK DIAGRAM
EN0158A_WT7510 BLOCK DIAGRAM
VCC
Power On Reset
150uA
VCC Low Voltage
3.6V
POR
Clock
Generator
LVRST
CLK PWR
CLK
PWR
CLK
PWR
RST
38ms
debounce
PDON_N
V33
- UN
CLK
- OV
clr
+
+
V5
clr
2.4ms
delay
PWR
75 ms
delay
- UN
CLK RST
- OV
73us
debounce
+
R
+
S
FPL_N
Q
VCC
- OV
+
CLK RST
VCC
CLK
PGO
- UN
PGI
+
73us
debounce
clr
300ms
delay
1.2V
+
-
0.95V
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EST7610
PC Power Supply Supervisor
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply voltage, VCC
Input voltage
Output voltage
Operating temperature
Output sink current
Conditions
Min.
4
Typ.
12
PDON_N, V5, V33, PGI
FPL_N
PGO
-40
FPL_N
PGO
Supply voltage rising time
Max.
15
7
15
7
125
30
10
1
Unit
V
V
V
V
℃
mA
mA
ms
ELECTRICAL CHARACTERISTICS, at Ta=25°C and VCC=5V.
Over Voltage Detection
Parameter
Over voltage threshold
Condition
V33
V5
Vcc / V12
ILEAKAGE Leakage current (FPL_N)
VOL Low level output voltage (FPL_N)
Min.
3.7
5.7
12.8
Typ.
3.9
6.1
13.4
5
0.3
0.7
Max.
4.1
6.5
13.9
Unit
V
V
V
uA
V
Min.
2.0
3.3
1.16
0.90
Typ.
2.2
3.5
1.20
0.95
5
0.4
Max.
2.4
3.7
1.24
1.00
Unit
V
V
V
Typ.
150
Max.
V(FPL_N) = 5V
Isink 10mA
Isink 30mA
PGI and PGO
Parameter
Under voltage threshold
Input threshold voltage(PGI)
Condition
V33
V5
PGI1
PGI2
PGO = 5V
ILEAKAGE Leakage current(PGO)
VOL
Low level output voltage(PGO)
PDON_N
Parameter
Condition
Input pull-up current
PDON_N= 0V
High-level input voltage
Low-level input voltage
TOTAL DEVICE
Parameter
Condition
Icc Supply current
PDON _N= 5V
Vcc low voltage
SWITCHING CHARACTERISTICS, Vcc=5V
Parameter
Condition
tdb1
De-bounce time (PDON_N)
tdleay1 Delay time (PGI to PGO)
tdb2
De-bounce time (PDON_N)
tg
De-glitch time
tdelay2 PDON_N to FPL_N delay time
tdelay3 Internal UVD delay time
FPL_N go low
every time PGI
0.95V
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3
Min.
uA
V
2.0
0.8
Min.
Typ.
Max.
1
3
Min.
Typ.
Max.
32
38
61
200
300
490
32
38
61
63
73
120
tdb2+2.0 tdb2+2.4 tdb2+3.8
&
65
75
122
>
Unit
uA
V
V
Unit
mA
V
Unit
mS
mS
mS
uS
mS
mS
2006-01-A
EST7610
PC Power Supply Supervisor
APPLICATION CIRCUIT
+5V
+5VSB
0.01uF
PGI
470
PDON_N
1
PGI
PGO
8
2
GND
VCC
7
3
FPL_N
V5
6
4
PDON_N
V33
5
+12V
+5V
+5VSB
+3.3V
0.01uF
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EST7610
PC Power Supply Supervisor
APPLICATION TIMMING
1.) PGI (UNDER_VOLTAGE):
PDON_N
tdelay2
FPL_N
tdb1
tdelay1+tg
PGO
tdb2
PGI
PDON_N
tdelay2
FPL_N
tdb1
tdelay1+tg
tdelay1+tg
PGO
tdb2
PGI
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EST7610
PC Power Supply Supervisor
2.) V33, V5 (UNDER_VOLTAGE):
PDON_N
tdelay2
FPL_N
tdb1
tdelay1+tg
PGO
tdb2
V33 / V5
tdelay3=75mS
PDON_N
tdelay2
tdelay3+t
FPL_N
g
tdb1
tdb1
PGO
tdelay1+tg
tdb2
PGI
V33 / V5
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EST7610
PC Power Supply Supervisor
3.) V33, V5, V12 (OVER_VOLTAGE):
PDON_N
tdelay2
FPL_N
tdb1
tdelay1+tg
PGO
tdb2
V33/V5/V12
PDON_N
tg
FPL_N
tdb1
tdelay2
tdb1
PGO
tdelay1+tg
tdb2
V33/V5/V12
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EST7610
PC Power Supply Supervisor
MECHANICAL INFORMATION
PLASTIC DUAL–IN–LINE PACKAGE
NOTE 1:All linear dimensions are in inches(millimeters).
NOTE 2:This drawing is subject to change without notice.
NOTE 3:Falls within JEDEC MS–001
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2006-01-A
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