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ABCStar for ATLAS Strips (Front-End Electronics for the ATLAS ITk Strip Detector) 1-June-16 Francis Anghinolfi CERN For the ATLAS ITk Strips Community Staves & Petals: Basic Integration Units Each of 4 barrels will be segmented into Staves. Pictured here is the top side of a double sided half-Stave. Two half-Staves butt together at Z=0, but don’t connect electrically. module bus tape under sensor strip sensors power board The End-cap disks will be segmented into petals. Pictured here is the hybrid front side of a doublesided Petal. FE-chip hybrid strip sensors module Hybrid control chip (HCCStar) Z=0 end EndOfStructure card (EoS) FE-chip (ABCStar) 1-June-16 FEE Workshop power board EndOfStructure card (EoS) ATLAS Silicon Strips Electronics 2 A Very Large Increase in Size and Complexity • Comparing the new ITk tracker to the existing ATLAS SCT: • A factor of 4 more modules to build and a factor of 10 more channels to operate. • Barrel Modules are built on sensors Hybrid Control Readout ASICs 9.8 cm x 9.8 cm in size. ASIC (HCC) (ABC) • The inner two barrels have 4 rows of 2.4 cm long strips serviced by 2 readout hybrids. • The outer two barrels have 2 rows of 4.8 cm long strips serviced by one hybrid. • End-cap modules use trapezoidal shaped sensors of varying size to fit the wedged shape petal. Silicon Sensor • The longest End-cap strip is 5.4 cm long. 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics Hybrid LV/HV power board Barrel Module with Short Strips 3 ABCStar – New Design • After the first ABC ASICs (named ABC130) were designed and fabricated on the IBM 130nm technology, the ATLAS trigger rate requirement was increased to 1 MHz. • The ABC130/HCC readout architecture could not support this 1 MHz rate and, therefore, a design change was required. • The fundamental change was the interface from ABCs to the HCC as shown here. • Serial transfer of data to the HCC was changed to direct communication from all ABCs to the HCC – hence the new ABCStar and HCCStar. • The “star” configuration removed a bottleneck in data transfer to the HCC, which had considerable bandwidth still available. • While both ASICs required changes, the HCCStar requires nearly a complete redesign as it must now essentially build events in parallel from fragments coming from all the ABCStar. 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics ABC130 ABCStar 4 ABCStar - Standard Binary Readout • The ABCStar front-end readout ASIC uses a similar binary readout as employed by the present ATLAS SCT tracker readout. • It includes amplifier, discriminator, pipeline for 256 channels, an event buffer and a cluster algorithm to compress data for output. • It is being designed to support more than one trigger mode: • L0 – Capture & readout everything. • L0/L1 – Capture data at L0, send requested data at L1. • L0/R3/L1– Capture data at L0, send requested ROI data with priority, send remaining requested data on L1. • The HCCStar manages these three trigger modes and sends the appropriate signals to the ABCStar depending upon what mode is in operation. • ABCStar is built on the GF130nm technology. 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 5 ABC130 Testing > First 130 hybrid glued and wirebonded in F mostly manually assembled) • The ABCStar and HCCStar are still in design. • The ABC130 & HCC130 are being used for testing and to exercise module assembly and test. • Even if the readout is different, the frontend part of ABCStar and ABC130 should be similar. Characteristics of the frontend are measured with the ABC130. Ingo Bloch | ITk Single chip test board 1-June-16 FEE Workshop Hybrid (endcap) ATLAS Silicon Strips Electronics Module (barrel) 6 ABC130 Testing • Typical 1 channel data on module : Vt50, Linearity, Noise (threshold scan) 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 7 ABC130 Testing • One chip data (256 ch.) : Vt50, Linearity, Noise (empty, short strips) 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 8 ABC130 Testing • One hybrid data (2560 ch.) : Vt50, Linearity, Noise (empty, short strips) 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 9 ABC130 Testing • The noise on ABC130 was found to be higher (and gain lower) than expected • Noise performance of the prototype front-end chip and the full ABC130 front-end was compared. • The prototype front-end allows comparison of performance of negative & positive signals. • ABC130 receives negative signal only, whereas the best performance in design was for positive signal ABC130 ENC on hybrid (ext cap.) ABC130 ENC on prelim. module Proto ENC for negative signal Proto ENC for positive signal 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 10 Response curves for positive and negative polarities (same biases – no optimization, 2.5ns calibration edge), measured on the prototype chip Transfer Function Transfer Function 600 Peak Height (mV) Peak Height (mV) 400 400 200 200 0 2 4 Charge (fC) 6 Positive input charge: - dynamic range <600mV - Linear range ~450mV (~5fC) 1-June-16 FEE Workshop 2 8 4 Charge (fC) 6 8 Negative input charge: - dynamic range ~600mV - Linear range ~400mV (~4fC) ATLAS Silicon Strips Electronics 11 Gain for positive and negative signals (2.5ns CAL edge) – Prototype chip Gain as a function of channel 100 Normal Polarity Inverted Polarity Gain (mV/fC) 90 80 70 60 0 10 20 Channel Number 30 ~20% effect! 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 12 ENC for positive and negative signals (2.5ns CAL edge) – Prototype chip ENC as a function of channel 500 Normal Polarity Inverted Polarity Enc (e-) 450 400 350 0 10 20 Channel Number 30 ~20% effect! 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 13 Gain degradation for negative signal (n-on-p detector) Primary candidate: asymmetry caused by active feedback (compression of the negative polarity signal caused by modulation of the transconductance of the active feedback by the signal) 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 14 Architecture of the single channel Input stage: active feedback (assymmetry for positive/negative input signals) 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 15 Transient simulation – analog out Discriminator input 2fC response Input signal POSITIVE NEGATIVE Only 6% effect on amplitude, effect not related to the amplitude of the input current Slight degradation of amplitude for 5ns signal due to ballistic deficit 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 16 Performance Difference with Signal Polarity • Noise performance is worse after sensor polarity swap: effect of signal compression. NEGATIVE (faster, lower in amplitude, more noisy) POSITIVE • Effect of compression for negative signals (modulation of feedback transistor gm) simulated at the 6% level, in reality (prototype measurements) as high as 20%. • This can be resolved by changing to a resistive feedback for ABCStar. 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 17 Irradiation Testing Changes for the ABCStar front-end • Feedback change to improve gain and noise (+20% impact on power) • Unexpected noise increase observed after ionizing radiation: • Possible reason: 1/f noise. • Simulated pre-rad contribution of the 1/f noise to ENC was at the level of 3%. • Radiation effects on 1/f noise under study. • Some reports for similar technology (130nm ST) show substantial increase of 1/f noise for regular NMOS devices and no change for the enclosed structures (influence of STI isolation?) • For new ABC front-end, all critical (for noise) NMOS devices will be in enclosed geometry. 1-June-16 FEE Workshop • ELT layout to reduce excess noise after radiation • Channel-to-channel mismatch improvements • Optimisation for the measured detector parameters after full radiations ATLAS Silicon Strips Electronics 18 Updated Backend for ABCStar • The increase to 1 MHz event readout rate was the main concern for the change to the “star” hybrid architecture. • The L1 rate can be equal to L0 (flush all L0) • The “regional” readout at reduced rate (~10% L0) is maintained. It is perceived as a Priority Readout (L0_Priority) with low latency (to deliver for the L1track trigger) ABC130 ABCSTAR baseline ABCSTAR extended ABCSTAR All L0 L0 (event tagging) 400KHz 1MHz 1MHz 1MHz R3 (L0-Priority) 10KHz 100KHz 100KHz - L1 (L0 read) 100KHz 400KHz < 1MHz 1MHz 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 19 FE Hit Detect Event Buffering in ABCStar L0 Pipeline 12.8 μs Event Buffer 128 slots Cluster Finder Seriali zer L0 Event tagging Fixed latency Start Low priority (L1) read with tag, free latency * L1 Queue Priority (R3) read with tag, free latency ** R3 Queue Priority * : up to the maximum possible number of events stored in the event buffer ** : limited by the L1-track construction (5us) 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 20 Managing the 1 MHz L0 Rate • The change to the “star” hybrid architecture was not the only concern with the increase to 1 MHz event readout rate: • The latency requirement for L0-P trigger is below 5us, to feed data to L1-Track • Here are simulations of the readout time at two different output bandwidths. The simulated latency for all data from 99% of all requests to arrive at the end of stave/petal for the highest occupancy Barrel and End-Cap layer module of the ITK as a function of the L0 rate for the scenario where all L0 events are read out from the detector. Detector occupancies commensurate with a mean occupancy of 200 separate pileup interactions per bunch crossing have been used. 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 21 Data formats and rates One 160Mb/s output signal to the HCCStar Physics data contains “cluster packet” of 12 bits (Channel ID + 3 adj. strips) Full packet made of 4 bits Header, 16 bits for event ID, then 4 cluster packets max. If more than 4 clusters a second Full packet is generated 68 bits The estimated average event size per chip is 2 to 3 clusters (therefore one 56 bits packet) The average data rate at the output of one ABCStar chip is 56 Mb/s 160Mb/s readout rate was rather chosen to reduce the transmission latency for L1-track 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 22 L0-Tag • ITk **may** employ a scheme to identify L0. • Each L0 trigger will be accompanied by a tag; that tag will be sent back as part of the event data; off-detector electronics will check for matching tags. • The off-detector electronics then will have responsibility to manage the counter identifiers. ves yy ide Group of 4BC 7 bits L0-Tag 1-June-16 FEE Workshop L0 distribution in 4BC ATLAS Silicon Strips Electronics 23 Summary ABCStar is currently under development with the following targets : • Front-end : • Adaptation to the detector signal polarity and to the detector parameters after irradiations • Removal of Excess noise after a few Mrads • Back-end : • Low latency Readout for L1_track • 1MHz full readout • Various readout scenarios “still” under considerations 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 24 Backup BACKUP 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics A.A. Grillo 25 Preamplifier output NEGATIVE POSITIVE Preamp response: only 1% effect on amplitude but different timing: negative pulse faster and shorter what can explain difference of 6% after the shaper 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 26 Shaper output NEGATIVE POSITIVE Shaper response: 6% effect on amplitude and different timing: negative pulse faster and shorter 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 27 Post Irradiation Testing At low temperature/low dose rate (2krads/hour) • Digital current rise with TID observed in ABC130. • Known effect: see e.g. F. Faccio and G. Cervelli, IEEE Trans. 52.6 (2005) 2413. • Digital current (D) peaks, then recovers. Function of dose rate and temperature. No effect in analogue current (A). ABC tested configured & unconfigured. • Tests underway at expected operating temperature and dose rate at HL-LHC. 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics A.A. Grillo 28 UVM functional verification setup 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 29 HCC* Block Diagram From ABC • The HCC* provides all I/O control for itself and the multi-ABC* readout system. • Trigger types and commands for configuration, calibration, etc. are received and passed onto ABC*s as needed. • Data from all ABC*s is grouped by event and then sent out. • It is also built on the GF130 nm technology. 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 30 Module is the Basic Building Block 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics Front-end Digital 6.8mm • This diagram depicts a short strip barrel module with a blow-up of an ABC130 front-end ASIC. • Each of the two readout hybrids contains 10 ABCs and one HCC module controller ASIC. • Sitting between the two readout hybrids is a power board. • A long strip barrel module would have one hybrid and one power board. • The power board includes a DC/DC converter to supply 1.5V, an HV switch for sensor bias and an AMAC (Autonomous Monitor & Control) ASIC. • AMAC is powered independent of the DC/DC converter, monitors temperature, voltage, etc. and controls an HV switch and power to hybrid(s). • Bidirectional communication with AMAC is provided via I2C bus from the SCA block of the LpGBT at end of stave or petal. • LV to the hybrid and HV to the sensor can be controlled based upon correct temperature and operating voltages and currents. • The End-cap modules differ in the size and shape of the sensor and in the number of ABC ASICs. 7.9mm SLVS I/O Power input SLVS I/O Power Board: DC/DC, HV Mux, AMAC Sensor Short Strip Barrel Module 31 Stave or Petal Connections One of Two Sides LpGBT (1 or 2) e-Links ABC* ... H C C ABC* * Readout Hybrid 1 or 2 Hybrids per sensor module Power Supplies US(A)15 ~48V?/~15V? A M D A C HVsw C ⁄ Power Board D C Cu-Kapton Bus Tape I2C Up to 14 Modules on Bus Tape PP3 DC/DC? ~48V->12V? D C ⁄ D C EOS VL+ Service Module PP2 Voltage Clamp? PP1 HV Supplies US(A)15 • Here are all the connections for readout, control & power. • I will focus on each part one by one. Optical Fibres ITk Data Handler Monitor/Calibration DCS TTC High Speed Network ATLAS DAQ FELIX L1 Track 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 32 End of Structure (EOS card) & PP1 • Each side of a petal and each side of a halfstave has an EOS card. • Petals with 14 HCC*s (Some modules have 2 hybrids and 2 HCC*s.) and outer barrel halfstaves with 14 HCC*s require 1 LpGBT – Inner barrel half-staves with 28 HCC*s require 2 LpGBTs, each with a complementary number of VL+s. • A DC/DC converter steps down the voltage for the EOS ASICs. • PP1 provides the connection point for harnesses from the outside and the Service Module will provide an orderly method to tie the PP1 connections to the EOS cards. LpGBT (1 or 2) D C ⁄ D C EOS VL+ Service Module PP1 Optical Fibres Concept of PP1 with Service Module behind 1-June-16 FEE Workshop ATLAS Silicon Strips Electronics 33