Download 1. How many times does the control unit refer to memory when it

1. How many times does the control unit refer to memory when it fetches and executes an
indirect addressing mode instruction if the instruction is (a) a computational type requiring an
operand from memory; (b) a branch type.
A. (a) One ; (b) two
B. (a) Two ; (b) two
C. (a) Three ; (b) two
D. (a) Three ; (b) three
2. Which memory reference instruction requires maximum number of microoperations to be
executed?
A. ISZ
B. BSA
C. LDA
D. BUN
3. What are the instructions needed in the basic computer in order to set the E flipflop to 1?
A. CME, CLE
B. CLR, CMR
C. CLR, ADD
D. CLE, CME, CMR
4. Which instruction is used to skip the next instruction in sequence based on the value of data
register?
A. ISZ
B. SPA
C. SZA
D. SKI
5. What would be the output of the mask operation (A mask B) for the operands A = 1110 and B
= 1001?
A. 1000
B. 1001
C. 1100
D. 1110
6. To perform the insert operation, which two operations should be used?
A. Mask, OR
B. XOR, OR
C. XOR, mask
D. Clear, AND
7. How many register reference instructions are there in the instruction set of the basic
computer?
A. 12
B. 6
C. 8
D. 10
8. A sequence counter (SC) for generating the timing signals for the basic computer can be
designed using
A. 3 bits
B. 4 bits
C. 3 bits or 4 bits
D. 2 bits
9. How many three-state buffers and decoders are needed to design a bus system having 4
registers of 8 bits?
A. 32 three-state buffers, one 2X4 decoder
B. 8 three-state buffers, one 2X4 decoder
C. 32 three-state buffers, four 2X4 decoders
D. 12 three-state buffers, four 2X4 decoders
10. Which of the following instructions requires minimum number of timing signals to complete
its execution?
A. SPA
B. LDA
C. STA
D. ADD
11. Starting from an initial value of A = 10110110, determine the final content of A after
performing logical shift right, circular shift left, arithmetic shift left and arithmetic shift right
operations in a sequence.
A. 11110110
B. 00110110
C. 11101100
D. 01101100
12. Which of the following register transfer statements is correct with respect to the
configuration of the basic computer?
A. xT: AR <- 0, AR <- PC
B. yT: AC <- DR, TR <- DR
C. zT: TR <- AC, DR <- TR
D. wT: INPR <- OUTR, AC <- INPR
13. What would be the output H in a 4-bit combinational shifter circuit if S=0, IL=0, A=1011 and
IR=1?
A. 1101
B. 0101
C. 0110
D. 0111
14. How many 16-bit registers are there in the basic computer?
A. 4
B. 3
C. 5
D. 6
15. A computer uses a memory unit with 64K words of 40 bits each. A binary instruction code is
stored in one word of memory. The instruction has five parts: an addressing mode bit,an
operation code, a register code part to specify one of 8 registers and two address parts to
specify the addresses of operands. How many instructions can be defined for this computer?
A. 16
B. 32
C. 25
D. 8
E. can not be determined
16. In the bus system of the basic computer, S2=1, S1=0, S0=0, LD of DR and Write input of
Memory are enabled. What would be the operation executed during the next clock transition?
A. DR <- AC
B. DR <- AC, M[AR] <- AC
C. AC <- DR, DR <- AC
D. DR <- IR, M[AR] <- IR
17. Which of the following microoperations can not be completed in a single clock cycle in the
basic computer?
A. DR <- DR + AC
B. AC <- DR, DR <- AC
C. AC <- DR + INPR
D. IR <- M[AR]
18. What is the instruction specified by the instruction code 1011000100100100?
A. indirect STA
B. indirect LDA
C. CIR
D. CMA
19. If we replace the ADD instruction of the basic computer with ADM instruction (M[AR] <M[AR]+AC, opcode: 001), then what is the minimum number of timing signals needed to
complete the execution of ADM? The value in AC should not be changed unless specified in the
instruction.
A. 7
B. 6
C. 8
D. 9
E. 5
20. If we replace the BUN instruction of the basic computer with BPA instruction (If(AC>0) then
PC<-AR, opcode: 100), then what is the minimum number of timing signals needed to complete
the execution of BPA? The value in AC should not be changed unless specified in the instruction.
A. 7
B. 6
C. 8
D. 9
E. 5
21. The content of PC in the basic computer is 2AE. The content of AC is A258. The content of
memory at address 2AE is 831F. The content of memory at address 31F is 0583. The content of
memory at address 583 is 9C2A. What is the instruction that will be fetched and executed next?
All values are in hexadecimal.
A. indirect AND
B. direct ADD
C. indirect ADD
D. indirect LDA
22. What would the content of PC and DR during the last timing signal required to execute an
indirect ISZ instruction? Initially PC is 7FF. The content of memory at address 7FF is EA9F. The
content of memory at address A9F is 0C35. The content of memory at address C35 is FFFF. All
values are in hexadecimal.
A. PC=801, DR=0000
B. PC=801, DR=FFFF
C. PC=800, DR=0000
D. PC=800, DR=FFFF
E. PC=7FF, DR=0C36
F. PC=801, DR=0C36
23. What would be the content of AC after executing CIR instruction? Initially, AC is
hexadecimal A937, PC is hexadecimal 035 and E is 1.
A. D49B
B. 526F
C. 549B
D. D26F