Download NTE1979 Integrated Circuit Negative 3 Terminal Voltage Regulator

Survey
yes no Was this document useful for you?
   Thank you for your participation!

* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project

Document related concepts

Immunity-aware programming wikipedia , lookup

Thermal runaway wikipedia , lookup

Analog-to-digital converter wikipedia , lookup

Nanogenerator wikipedia , lookup

Amplifier wikipedia , lookup

Radio transmitter design wikipedia , lookup

TRIAC wikipedia , lookup

Josephson voltage standard wikipedia , lookup

Multimeter wikipedia , lookup

Integrating ADC wikipedia , lookup

Two-port network wikipedia , lookup

CMOS wikipedia , lookup

Ohm's law wikipedia , lookup

Transistor–transistor logic wikipedia , lookup

Valve audio amplifier technical specification wikipedia , lookup

Current source wikipedia , lookup

Wilson current mirror wikipedia , lookup

Power MOSFET wikipedia , lookup

Valve RF amplifier wikipedia , lookup

Operational amplifier wikipedia , lookup

Surge protector wikipedia , lookup

Power electronics wikipedia , lookup

Schmitt trigger wikipedia , lookup

Resistive opto-isolator wikipedia , lookup

Voltage regulator wikipedia , lookup

Switched-mode power supply wikipedia , lookup

Current mirror wikipedia , lookup

Opto-isolator wikipedia , lookup

Rectiverter wikipedia , lookup

Transcript
NTE1979
Integrated Circuit
Negative 3 Terminal Voltage Regulator,
–8V, 100mA
Description:
The NTE1979 is a 3–terminal fixed negative output voltage regulatgor in a TO92 type package
designed for use in power circuits with current capacity up to 100mA. Stabilized fixed output voltage
is obtained from unstable DC input voltage without the use of external components.
Features:
D No External Components
D Output Current in Excess of 100mA
D Built–In Short–Circuit Current Limiting
D Built–In Thermal Overload Protection
Absolute Maximum Ratings: (TA = +25°C unless otherwise specified)
Input Voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –35V
Power Dissipation (Note 1), PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 650mW
Operating Ambient Temperature Range, Topr . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20° to +80°C
Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55° to +150°C
Note 1. When TJ exceeds +150°C, the internal circuit cuts off the output.
Electrical Characteristics: (TA = +25°C, VI = –14V, IO = 40mA, Ci = 2µF, Co = 1µF unless
otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Output Voltage
VO
TJ = +25°C
–7.68
–8.0
–8.32
V
Output Voltage Tolerance
VO
VI = –11V to –23V, IO = 1mA to 70mA,
TJ = 0° to +125°C
–7.6
–
–8.4
V
VI = –10V to –24V, TJ = +25°C
–
–
160
mV
VI = –11V to –21V, TJ = +25°C
–
–
80
mV
IO = 1mA to 100mA, TJ = +25°C
–
15
80
mV
IO = 1mA to 40mA, TJ = +25°C
–
7
40
mA
Line Regulation
Load Regulation
REGIN
REGL
Note 2. The specified condition TJ = +25°C means that the test should be carried out with the test
time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction
temperature can be ignored.
Electrical Characteristics (Cont’d):
Parameter
(TA = +25°C, VI = –14V, IO = 40mA, Ci = 2µF, Co = 1µF
unless otherwise specified)
Symbol
Min
Typ
Max
Unit
–
3
5
mA
∆IBIAS(IN) VI = –11V to –23V, TJ = +25°C
–
–
0.5
mA
∆IBIAS(L)
IO = 1mA to 40mA, TJ = +25°C
–
–
0.1
mA
Output Noise Voltage
Vno
f = 10Hz to 100kHz, TA = +25°C
–
52
–
µV
Ripple Rejection Ratio
RR
VI = –11V to –21V, f = 120Hz, TA = +25°C
54
–
–
dB
Bias Current
IBIAS
Input Bias Current Fluctuation
Test Conditions
TJ = +25°C
Minimum I/O Voltage Difference
VDIF(min)
TJ = +25°C
–
0.8
–
V
Output Short Circuit Current
IO(Short)
VI = –35V, TJ = +25°C
–
200
–
mA
Output Voltage Temperature
Coefficient
∆VO/TA
IO = 5mA, TJ = 0° to +125°C
–
–0.6
–
mV/°C
Note 2. The specified condition TJ = +25°C means that the test should be carried out with the test
time so short (within 10ms) that the drift in characteristic value due to the rise in chip junction
temperature can be ignored.
.135 (3.45) Min
.210
(5.33)
Max
Seating Plane
.500
(12.7)
Min
.021 (.445) Dia Max
Common
VOUT
VIN
.100 (2.54)
.050 (1.27)
.105 (2.67) Max
.205 (5.2) Max
.165 (4.2) Max
.105 (2.67) Max