Download R1 R2 R3 Rb Ra Ra Rb 1.5 meters 0.25 meters 0.25

EECS 211 Circuits I
Spring Semester 2014
Assignment #7 Due 11 March 2014
Reading: Sections 4.2 - 4.6, 5.1 - 5.3 in Irwin/Nelms; Sections 1.1, 1.2, 1.3, 2.1, 2.2, and 2.3 in Tront
(PSpice book)
Note: We will use the Capture tool in this class (and subsequent EECS classes), and the Tront supplement
describes the Capture tool. However, the latest version of this tool is called Design Entry (instead of
Capture). There is a similar, but not identical, tool called Schematics, which your textbook (Irwin)
introduces in section 5.5. Although much of the information about working with Schematics also applies
to Capture/Design Entry, some does not.
Learning Assessments: All in Reading assignment (do not hand in)
Problems
1.
Design Problem. The schematic below is a simplified representation of a rear window defroster
for a car.
1.5 meters
Ra
Rb
R1
R2
Ra
0.25 meters
Rb
0.25 meters
R3
V dc = 12V
The 12 V source represents a typical car battery. Current runs through the resistive defroster
wires, and the power is dissipated as heat, heating the glass and melting the frost. The discrete
resistors are representations of distributed resistance in the defroster wires. Resistors R1 , R2 , and
R3 represent resistance that is actually distributed over 1.5 meters (the length of the horizontal
wires). Resistors R a and R b represent resistance that is actually distributed over 0.25 meter (the
length of the vertical wires). Each of the wires can be made of different resistive material.
We want to design the defroster so that the glass heats up as uniformly as possible. Specifically,
the design specification is to have a uniform power dissipation of 10 W/meter along all of the
defroster wires. That is, resistors R1 through R3 should each dissipate (10W/m) ⋅ (1. 5m) = 15W
and resistors R a and R b should each dissipate (10W/m) ⋅ (0. 25m) = 2. 5W. Note that the symmetry
of the circuit ensures that the top two vertical resistors will have the same value (R a ) and similarly
for the two resistors R b . Determine all of the resistance values that will satisfy this design
specification. Use whatever technique (or combination of techniques) you choose.
Prof. Petr
Copyright 2014 David W. Petr
Spring 2014
EECS 211
-2-
Assignment #7
2.
Problem 4.15, p. 181. Use the ideal op-amp model. Note that the voltages shown (V s and V o ) are
node voltages with respect to ground (the reference node). Note that this is exactly the same basic
inverting amplifier configuration as we examined in the lecture, just drawn differently. The "gain"
that the problem refers to is the voltage gain V o /V s .
3.
Re-work problem 4.15 using the detailed op-amp model given in class and in Figure 4.4. Use
nodal analysis with the following parameter values: Ri = 1 MΩ, R o = 50Ω, and A = 106 . After
working the problem this way, do you see the advantages of using the ideal op-amp model?
4.
Problem 4.30, p. 175. Use ideal op-amp analysis.
5.
Problem 4.36, p. 176. You should consider voltages v1 , v2 , and v3 to be source (or input) voltages.
Your answer will be an expression for v o in terms of v1 , v2 , v3 , R1 , R2 , R3 , and R F .
6.
Problem 4.44, p. 185. Simple op-amp design problem. Note that it would be helpful to study
Example 4.9 before attempting to solve this problem.
7.
Problem 5.8, p. 228. Using superposition. In working the individual sub-problems, you may use
any analysis technique that you choose. Check your answer by using either nodal or mesh
analysis on the circuit, without using superposition.
8.
Solve the circuit of problem 3.102 (which contains 2 independent sources and one dependent
source) on p. 154 using superposition. Recall that superposition applies only to independent
sources. Also recall that superposition does not apply to power, so you will need to use
superposition to find the total current flowing through the 3 V source, then find the power
delivered by (i.e., supplied by) the 3 V source. More specifically, define I vs to be the current
flowing up through the 3 V source. Using superposition, you will find the portion of I vs due to the
3 V source alone (keeping the dependent source in the circuit), then find the portion of I vs due to
the 40 mA source alone (again keeping the dependent source), then add the two together to get I vs .
For the two sub-problems, you may use any method that you choose. Note: the quantity V x will in
general not be the same for the two sub-problems. Finally, after you have found I vs , find the
power delivered by the 3 V source.
9.
Following the same steps as your PSpice book provides in sections 2.1, 2.2, and 2.3, perform a
PSpice/Capture analysis for a circuit identical to the simple circuit shown in Figure 2 on p. 7 of
that book, but with specific values based on your 7-digit KUID number, as directed below. The
value of the independent voltage source (in volts) should be the first 3 digits of your KUID
number, the value of the resistor R1 (in kΩ) should be the next 2 digits of your KUID, and the
value of resistor R2 should be the last 2 digits of your KUID. For illustration purposes, suppose
your KUID is 1234567. For this KUID, the voltage source would have a value of 123 volts, R1
would have a value of 45 kΩ, and R2 would have a value of 67 kΩ. Note: if you are using one of
the EECS Windows computers in 1005A or 1005C Eaton or the EECS side of the computer
commons (it is not loaded on the engineering Windows computers), the startup sequence is
Start -> All Programs -> Cadence -> Release 16.3 -> Design Entry CIS. Then select "Allegro
PCB Design CIS L".
Hand in these printouts to show that you have completed this exercise: (1) the output file, a portion
of which is shown in Figures 15 and 16 of your PSpice book, and (2) the circuit schematic after
the PSpice simulation has been completed, showing the node voltages, as in Figure 17.
Prof. Petr
Copyright 2014 David W. Petr
Spring 2014