Download Circuits with Current Source Loads

Where we are going:
741 Op-Amp
Typical CMOS Amplifier
Drain Characteristics
Current Sources
Iout
Vout
Vb
M5
Current
Sink
GND
Vdd
Ever wonder how
we make one of these?
V1
M6
Current
Source
Iout
How “good” a current source?
Current versus Drain Voltage
Not flat due to Early effect
(channel length modulation)
Id = Id(sat) (1 + (Vd/VA) )
Ic = Ic(sat) (1 + (Vc/VA) )
Iout
or
Vd/VA
10mA
GND
Rout
Id = Id(sat) e
Vc/VA
Ic = Ic(sat) e
Current Mirrors
nFET Current Mirror
Iout
Iin
Vout
Mb
GND
pFET Current Mirror
Vb
M5
GND
Iout = ( (W/L)5 / (W/L)b ) Iin
Vdd
Vdd
Vb
M4
M7
Iin
Iout
Iout = ( (W/L)7 / (W/L)4 ) Iin
A good way to generate a bias current
Current Mirror
Iout1
Iin
Mb
GND
Iout2
Iout3
Vout1
Vout2
Vout3
M5
M6
M7
Vb
GND
Iout = ( (W/L)5 / (W/L)b ) Iin
GND
Iout / Iin =
GND
Iout / Iin =
( (W/L)6 / (W/L)b ) ( (W/L)7 / (W/L)b )
Basic One-Transistor Circuits
Common Source
Common Emitter
Common Gate
Common Base
Source Follower
Emitter Follower
The fundamental two-transisor circuit: Differential Pair
Signal Flow in Transistors
Rules of Thumb
• The collector or drain can never be an input terminal.
• The base or gate can never be an output terminal.
(Never is too
strong a word)
In addition it is important to note polarity reversals on these signal paths.
• The base-collector or gate-drain path inverts.
• All other paths are noninverting.
(This of course assumes that there are no reactive elements causing phase shifts)
Spectrum of Amplifier “Loads”
Vdd
Vdd
Vdd
10mA
R1
Vb
Vout
Vin
Vout
Vin
GND
Ideal Current
Source Load
Vout
Vin
GND
Transistor Current
Source Load
GND
Resistive
Load
Remember: On-chip resistors are expensive
Multiple Transistor Configurations
Vdd
Vdd
Vdd
100pA
500mA
Vout
Vout
Vin
Subthreshold
MOS
JFETs as well….
Vout
Vin
Vin
GND
10mA
GND
GND
Above threshold
MOS
BJT
Source or Emitter Follower
Vdd
Ideal current source
BJT or Subthreshold MOSFET:
Vin
Vout
Iref = Ieo e
(Vin -Vout )/UT
or
100mA
Iref = Iref e
GND
Vout = -UT ln(Ibias/Ieo) + Vin
(DVin -DVout )/UT
D Vout = D Vin
(SubVT MOS: D Vout = k D Vin )
Vdd
MOS (Above VT MOS ):
Vin
Vout
10nA
GND
Iref = (K/2) ( Vin - Vout - VT )2
Vout = Vin – sqrt(2 Iref / K) )
Small-Signal Analysis (CD or CC)
+ V Vin
Vout
rp
ro
gmV
GND
(Vin - Vout ) / rp + (Vin - Vout ) gm
= Vout / ro
GND
BJT (ro >> rp)
MOS (rp = 0)
Vout/Vin = 1/(1 + [(rp / ro)/(1 + rp gm)])
Vout (1 + ro gm) ~ ro gmVin
Vout/Vin ~ 1/(1 + [(rp / ro)/(rp gm)])
= 1/(1 + 1 / (rp gm) )
= 1/(1 + UT / VA ) ~ 1
Vout/Vin = 1/(1 + 1 / (rp gm) )
= 1/(1 + UT / VA )
~1
Common Drain or Emitter
Ideal current source
Vdd
BJT or Subthreshold MOSFET:
Iref
100mA
Vout
Vin
Vdd
Ibias = Ico e
Vin/UT
e
Vout /VA
Vout = -VA ln(Ibias/Ico) + - (k VA / UT) Vin
GND
100pA
Iref
Vout
kDVin/UT
DVout/VA
Ibias = Ibias e
e
DVout = - (k VA / UT) DVin
MOS (Above VT MOS ):
Operating region decreases (Vout > Vin - VT)
Derive using quadratic functions:
Vin
GND
Ibias = (K/2) ( Vin - VT )2 (1 + (Vout/VA) )
Common Drain
Vdd
Amplifies the input signal at the output
100pA
Ibias
Vout
Vin
Ibias = Ibias e
kDVin/UT
e
DVout/VA
DVout = - (k VA / UT) DVin
GND
Input conductance = 0
Common Drain
We must account for the other current source:
Vdd
Vb
M6
Ibias
Vout
Vin
M7
GND
-DVout/V
Ap
Id = Ibias e
kDVin/UT DVout/VAn
= Ibias e
e
DVout = - (k (VAn // VAp) UT) DVin
Common Drain
What about above-threshold operation:
Vdd
Operating region decreases (Vout > Vin - VT)
100mA
Derive using quadratic functions:
Ibias
Vout
Vin
GND
Ibias = (K/2) ( Vin - VT )2 (1 + (Vout/VA) )
Common Base
Common Base / Common Gate
Vdd
Amplifies the input signal at the output (non-inverting gain)
Ibias
100mA
Vout
Vb
Vin
Assuming an ideal current source:
Ibias = Ico e
(Vb -Vin )/UT
e
Vout /VA
Vout = -VA ln(Ibias/Ico) + (VA / UT) Vin
- (VA / UT) Vb
Gain = VA / UT = Av
Common Gate
Vdd
Using a subthreshold MOSFET :
100pA
Ibias
Vout
Ibias = Io e
(kVb -Vin )/UT
e
Vout /VA
Vout = -VA ln(Ibias/Io) + (VA / UT) Vin
- (k VA / UT) Vb
Vb
Vin
Gain = VA / UT = Av
Problem: Large input current
Cascode Circuits
Use a common-gate/base transistor to:
1. Improve the output resistance of another transistor.
2. Reduce the Gate-to-Drain capacitance effect
of another transistor.
Vdrain
Input resistance of common-gate is low
Source is nearly fixed
if connected to the
drain of a transistor
Vb
V1
Vgate
GND
Cascode Circuits
Vdrain
Vdrain
Vbias
Vgate
GND
V1
Vgate
Idrain = Io e
GND
(kVbias -V1 )/UT
kVgate/UT
e
kVbias /VA
e
Vdrain / (Av VA )
Vdrain /VA
Idrain = Io e
e
kVgate/UT V1 /VA
= Io e
e
V1 ~ kVbias - kVgate + (UT/VA) Vdrain
Drain is fixed
Fixes the voltage at V1 or isolates V1 from the output
Cascode Common-Drain Amp
Vdd
One Pole
V1
biasp
Ibias
Mb
GND
Vout
biasn
Vb
GND
High
Output
Resistance /
DC Gain